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725 lines
39 KiB
Python
725 lines
39 KiB
Python
# old deprecated code, in the process of moving this to the new emit/... modules
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class CodeGenerator:
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def _generate_goto_conditional_truthvalue(self, stmt: CallStmt) -> None:
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# the condition is just the 'truth value' of the single value,
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# this is translated into assembly by comparing the argument to zero.
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def branch_emitter_mmap(targetstr: str, is_goto: bool, target_indirect: bool) -> None:
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assert is_goto and not stmt.condition.comparison_op
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assert stmt.condition.lvalue and not stmt.condition.rvalue
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assert not target_indirect
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assert stmt.condition.ifstatus in ("true", "not", "zero")
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branch, inverse_branch = ("bne", "beq") if stmt.condition.ifstatus == "true" else ("beq", "bne")
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cv = stmt.condition.lvalue
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assert isinstance(cv, MemMappedValue)
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cv_str = cv.name or Parser.to_hex(cv.address)
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if cv.datatype == DataType.BYTE:
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self.p("\t\tsta " + Parser.to_hex(Zeropage.SCRATCH_B1)) # need to save A, because the goto may not be taken
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self.p("\t\tlda " + cv_str)
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self.p("\t\t{:s} {:s}".format(branch, targetstr))
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self.p("\t\tlda " + Parser.to_hex(Zeropage.SCRATCH_B1)) # restore A
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elif cv.datatype == DataType.WORD:
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self.p("\t\tsta " + Parser.to_hex(Zeropage.SCRATCH_B1)) # need to save A, because the goto may not be taken
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self.p("\t\tlda " + cv_str)
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if stmt.condition.ifstatus == "true":
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self.p("\t\t{:s} {:s}".format(branch, targetstr))
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self.p("\t\tlda {:s}+1".format(cv_str))
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self.p("\t\t{:s} {:s}".format(branch, targetstr))
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self.p("\t\tlda " + Parser.to_hex(Zeropage.SCRATCH_B1)) # restore A
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else:
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self.p("\t\t{:s} +".format(inverse_branch, targetstr))
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self.p("\t\tlda {:s}+1".format(cv_str))
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self.p("\t\t{:s} {:s}".format(branch, targetstr))
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self.p("+\t\tlda " + Parser.to_hex(Zeropage.SCRATCH_B1)) # restore A
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else:
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raise CodeError("conditions cannot yet use other types than byte or word", # @todo comparisons of other types
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cv.datatype, str(cv), stmt.sourceref)
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def branch_emitter_reg(targetstr: str, is_goto: bool, target_indirect: bool) -> None:
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assert is_goto and not stmt.condition.comparison_op
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assert stmt.condition.lvalue and not stmt.condition.rvalue
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assert not target_indirect
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assert stmt.condition.ifstatus in ("true", "not", "zero")
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branch, inverse_branch = ("bne", "beq") if stmt.condition.ifstatus == "true" else ("beq", "bne")
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line_after_branch = ""
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cv = stmt.condition.lvalue
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assert isinstance(cv, RegisterValue)
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if cv.register == 'A':
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self.p("\t\tcmp #0")
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elif cv.register == 'X':
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self.p("\t\tcpx #0")
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elif cv.register == 'Y':
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self.p("\t\tcpy #0")
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else:
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if cv.register == 'AX':
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line_after_branch = "+"
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self.p("\t\tcmp #0")
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self.p("\t\t{:s} {:s}".format(inverse_branch, line_after_branch))
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self.p("\t\tcpx #0")
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elif cv.register == 'AY':
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line_after_branch = "+"
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self.p("\t\tcmp #0")
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self.p("\t\t{:s} {:s}".format(inverse_branch, line_after_branch))
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self.p("\t\tcpy #0")
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elif cv.register == 'XY':
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line_after_branch = "+"
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self.p("\t\tcpx #0")
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self.p("\t\t{:s} {:s}".format(inverse_branch, line_after_branch))
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self.p("\t\tcpy #0")
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else:
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raise CodeError("invalid register", cv.register)
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self.p("\t\t{:s} {:s}".format(branch, targetstr))
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if line_after_branch:
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self.p(line_after_branch)
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def branch_emitter_indirect_cond(targetstr: str, is_goto: bool, target_indirect: bool) -> None:
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assert is_goto and not stmt.condition.comparison_op
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assert stmt.condition.lvalue and not stmt.condition.rvalue
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assert stmt.condition.ifstatus in ("true", "not", "zero")
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assert not target_indirect
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cv = stmt.condition.lvalue.value # type: ignore
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if isinstance(cv, RegisterValue):
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branch = "bne" if stmt.condition.ifstatus == "true" else "beq"
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self.p("\t\tsta " + Parser.to_hex(Zeropage.SCRATCH_B1)) # need to save A, because the goto may not be taken
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if cv.register == 'Y':
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self.p("\t\tlda ($00),y")
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elif cv.register == 'X':
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self.p("\t\tstx *+2\t; self-modify")
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self.p("\t\tlda $ff")
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elif cv.register == 'A':
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self.p("\t\tsta *+2\t; self-modify")
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self.p("\t\tlda $ff")
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else:
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self.p("\t\tst{:s} (+)+1\t; self-modify".format(cv.register[0].lower()))
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self.p("\t\tst{:s} (+)+2\t; self-modify".format(cv.register[1].lower()))
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self.p("+\t\tlda $ffff")
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self.p("\t\t{:s} {:s}".format(branch, targetstr))
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self.p("\t\tlda " + Parser.to_hex(Zeropage.SCRATCH_B1)) # restore A
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elif isinstance(cv, MemMappedValue):
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raise CodeError("memmapped indirect should not occur, use the variable without indirection")
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elif isinstance(cv, IntegerValue) and cv.constant:
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branch, inverse_branch = ("bne", "beq") if stmt.condition.ifstatus == "true" else ("beq", "bne")
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cv_str = cv.name or Parser.to_hex(cv.value)
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if cv.datatype == DataType.BYTE:
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self.p("\t\tsta " + Parser.to_hex(Zeropage.SCRATCH_B1)) # need to save A, because the goto may not be taken
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self.p("\t\tlda " + cv_str)
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self.p("\t\t{:s} {:s}".format(branch, targetstr))
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self.p("\t\tlda " + Parser.to_hex(Zeropage.SCRATCH_B1)) # restore A
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elif cv.datatype == DataType.WORD:
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self.p("\t\tsta " + Parser.to_hex(Zeropage.SCRATCH_B1)) # need to save A, because the goto may not be taken
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self.p("\t\tlda " + cv_str)
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if stmt.condition.ifstatus == "true":
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self.p("\t\t{:s} {:s}".format(branch, targetstr))
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self.p("\t\tlda {:s}+1".format(cv_str))
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self.p("\t\t{:s} {:s}".format(branch, targetstr))
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self.p("\t\tlda " + Parser.to_hex(Zeropage.SCRATCH_B1)) # restore A
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else:
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self.p("\t\t{:s} +".format(inverse_branch, targetstr))
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self.p("\t\tlda {:s}+1".format(cv_str))
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self.p("\t\t{:s} {:s}".format(branch, targetstr))
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self.p("+\t\tlda " + Parser.to_hex(Zeropage.SCRATCH_B1)) # restore A
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else:
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raise CodeError("conditions cannot yet use other types than byte or word", # @todo comparisons of other types
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cv.datatype, str(cv), stmt.sourceref)
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else:
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raise CodeError("weird indirect type", str(cv))
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cv = stmt.condition.lvalue
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if isinstance(cv, RegisterValue):
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self._generate_call_or_goto(stmt, branch_emitter_reg)
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elif isinstance(cv, MemMappedValue):
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self._generate_call_or_goto(stmt, branch_emitter_mmap)
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elif isinstance(cv, IndirectValue):
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if isinstance(cv.value, RegisterValue):
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self._generate_call_or_goto(stmt, branch_emitter_indirect_cond)
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elif isinstance(cv.value, MemMappedValue):
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self._generate_call_or_goto(stmt, branch_emitter_indirect_cond)
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elif isinstance(cv.value, IntegerValue) and cv.value.constant:
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self._generate_call_or_goto(stmt, branch_emitter_indirect_cond)
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else:
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raise CodeError("weird indirect type", str(cv))
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else:
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raise CodeError("need register, memmapped or indirect value", str(cv))
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def _generate_goto_conditional_comparison(self, stmt: CallStmt) -> None:
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# the condition is lvalue operator rvalue
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raise NotImplementedError("no comparisons yet") # XXX comparisons
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assert stmt.condition.ifstatus in ("true", "not", "zero")
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assert stmt.condition.lvalue != stmt.condition.rvalue # so we know we actually have to compare different things
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lv, compare_operator, rv = stmt.condition.lvalue, stmt.condition.comparison_op, stmt.condition.rvalue
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if lv.constant and not rv.constant:
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# if lv is a constant, swap the whole thing around so the constant is on the right
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lv, compare_operator, rv = stmt.condition.swap()
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if isinstance(rv, RegisterValue):
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# if rv is a register, make sure it comes first instead
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lv, compare_operator, rv = stmt.condition.swap()
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if lv.datatype != DataType.BYTE or rv.datatype != DataType.BYTE:
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raise CodeError("can only generate comparison code for byte values for now") # @todo compare non-bytes
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if isinstance(lv, RegisterValue):
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if isinstance(rv, RegisterValue):
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self.p("\t\tst{:s} {:s}".format(rv.register.lower(), Parser.to_hex(Zeropage.SCRATCH_B1)))
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if lv.register == "A":
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self.p("\t\tcmp " + Parser.to_hex(Zeropage.SCRATCH_B1))
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elif lv.register == "X":
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self.p("\t\tcpx " + Parser.to_hex(Zeropage.SCRATCH_B1))
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elif lv.register == "Y":
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self.p("\t\tcpy " + Parser.to_hex(Zeropage.SCRATCH_B1))
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else:
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raise CodeError("wrong lvalue register")
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elif isinstance(rv, IntegerValue):
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rvstr = rv.name or Parser.to_hex(rv.value)
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if lv.register == "A":
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self.p("\t\tcmp #" + rvstr)
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elif lv.register == "X":
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self.p("\t\tcpx #" + rvstr)
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elif lv.register == "Y":
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self.p("\t\tcpy #" + rvstr)
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else:
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raise CodeError("wrong lvalue register")
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elif isinstance(rv, MemMappedValue):
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rvstr = rv.name or Parser.to_hex(rv.address)
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if lv.register == "A":
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self.p("\t\tcmp " + rvstr)
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elif lv.register == "X":
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self.p("\t\tcpx #" + rvstr)
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elif lv.register == "Y":
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self.p("\t\tcpy #" + rvstr)
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else:
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raise CodeError("wrong lvalue register")
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else:
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raise CodeError("invalid rvalue type in comparison", rv)
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elif isinstance(lv, MemMappedValue):
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assert not isinstance(rv, RegisterValue), "registers as rvalue should have been swapped with lvalue"
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if isinstance(rv, IntegerValue):
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self.p("\t\tsta " + Parser.to_hex(Zeropage.SCRATCH_B1)) # need to save A, because the goto may not be taken
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self.p("\t\tlda " + (lv.name or Parser.to_hex(lv.address)))
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self.p("\t\tcmp #" + (rv.name or Parser.to_hex(rv.value)))
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line_after_goto = "\t\tlda " + Parser.to_hex(Zeropage.SCRATCH_B1) # restore A
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elif isinstance(rv, MemMappedValue):
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rvstr = rv.name or Parser.to_hex(rv.address)
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self.p("\t\tsta " + Parser.to_hex(Zeropage.SCRATCH_B1)) # need to save A, because the goto may not be taken
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self.p("\t\tlda " + (lv.name or Parser.to_hex(lv.address)))
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self.p("\t\tcmp " + rvstr)
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line_after_goto = "\t\tlda " + Parser.to_hex(Zeropage.SCRATCH_B1) # restore A
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else:
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raise CodeError("invalid rvalue type in comparison", rv)
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else:
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raise CodeError("invalid lvalue type in comparison", lv)
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def _generate_call_or_goto(self, stmt: CallStmt, branch_emitter: Callable[[str, bool, bool], None]) -> None:
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def generate_param_assignments() -> None:
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for assign_stmt in stmt.desugared_call_arguments:
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self.generate_assignment(assign_stmt)
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def generate_result_assignments() -> None:
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for assign_stmt in stmt.desugared_output_assignments:
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self.generate_assignment(assign_stmt)
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def params_load_a() -> bool:
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for assign_stmt in stmt.desugared_call_arguments:
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for lv in assign_stmt.leftvalues:
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if isinstance(lv, RegisterValue):
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if lv.register == 'A':
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return True
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return False
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def unclobber_result_registers(registers: Set[str], output_assignments: List[AssignmentStmt]) -> Set[str]:
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result = registers.copy()
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for a in output_assignments:
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for lv in a.leftvalues:
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if isinstance(lv, RegisterValue):
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if len(lv.register) == 1:
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result.discard(lv.register)
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else:
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for r in lv.register:
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result.discard(r)
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return result
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if stmt.target.name:
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symblock, targetdef = self.cur_block.lookup(stmt.target.name)
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else:
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symblock = None
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targetdef = None
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if isinstance(targetdef, SubroutineDef):
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if isinstance(stmt.target, MemMappedValue):
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targetstr = stmt.target.name or Parser.to_hex(stmt.address)
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else:
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raise CodeError("call sub target must be mmapped")
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if stmt.is_goto:
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generate_param_assignments()
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branch_emitter(targetstr, True, False)
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# no result assignments because it's a goto
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return
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clobbered = set() # type: Set[str]
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if targetdef.clobbered_registers:
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if stmt.preserve_regs is not None:
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clobbered = targetdef.clobbered_registers & stmt.preserve_regs
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clobbered = unclobber_result_registers(clobbered, stmt.desugared_output_assignments)
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with self.preserving_registers(clobbered, loads_a_within=params_load_a(), always_preserve=stmt.preserve_regs is not None):
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generate_param_assignments()
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branch_emitter(targetstr, False, False)
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generate_result_assignments()
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return
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if isinstance(stmt.target, IndirectValue):
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if stmt.target.name:
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targetstr = stmt.target.name
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elif stmt.address is not None:
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targetstr = Parser.to_hex(stmt.address)
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elif stmt.target.value.name:
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targetstr = stmt.target.value.name
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elif isinstance(stmt.target.value, RegisterValue):
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targetstr = stmt.target.value.register
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elif isinstance(stmt.target.value, IntegerValue):
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targetstr = stmt.target.value.name or Parser.to_hex(stmt.target.value.value)
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else:
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raise CodeError("missing name", stmt.target.value)
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if stmt.is_goto:
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# no need to preserve registers for a goto
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generate_param_assignments()
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if targetstr in REGISTER_WORDS:
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self.p("\t\tst{:s} {:s}".format(targetstr[0].lower(), Parser.to_hex(Zeropage.SCRATCH_B1)))
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self.p("\t\tst{:s} {:s}".format(targetstr[1].lower(), Parser.to_hex(Zeropage.SCRATCH_B2)))
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branch_emitter(Parser.to_hex(Zeropage.SCRATCH_B1), True, True)
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else:
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branch_emitter(targetstr, True, True)
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# no result assignments because it's a goto
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else:
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# indirect call to subroutine
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preserve_regs = unclobber_result_registers(stmt.preserve_regs or set(), stmt.desugared_output_assignments)
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with self.preserving_registers(preserve_regs, loads_a_within=params_load_a(),
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always_preserve=stmt.preserve_regs is not None):
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generate_param_assignments()
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if targetstr in REGISTER_WORDS:
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print("warning: {}: indirect register pair call is quite inefficient, use a jump table in memory instead?"
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.format(stmt.sourceref))
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if stmt.preserve_regs is not None:
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# cannot use zp scratch because it may be used by the register backup. This is very inefficient code!
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self.p("\t\tjsr il65_lib.jsr_indirect_nozpuse_"+targetstr)
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else:
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self.p("\t\tjsr il65_lib.jsr_indirect_"+targetstr)
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else:
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self.p("\t\tjsr +")
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self.p("\t\tjmp ++")
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self.p("+\t\tjmp ({:s})".format(targetstr))
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self.p("+")
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generate_result_assignments()
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else:
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# call to a label or immediate address
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if stmt.target.name:
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targetstr = stmt.target.name
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elif stmt.address is not None:
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targetstr = Parser.to_hex(stmt.address)
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elif isinstance(stmt.target, IntegerValue):
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targetstr = stmt.target.name or Parser.to_hex(stmt.target.value)
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else:
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raise CodeError("missing name", stmt.target)
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if stmt.is_goto:
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# no need to preserve registers for a goto
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generate_param_assignments()
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branch_emitter(targetstr, True, False)
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# no result assignments because it's a goto
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else:
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preserve_regs = unclobber_result_registers(stmt.preserve_regs or set(), stmt.desugared_output_assignments)
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with self.preserving_registers(preserve_regs, loads_a_within=params_load_a(),
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always_preserve=stmt.preserve_regs is not None):
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generate_param_assignments()
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branch_emitter(targetstr, False, False)
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generate_result_assignments()
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def generate_assignment(self, stmt: AssignmentStmt) -> None:
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def unwrap_indirect(iv: IndirectValue) -> MemMappedValue:
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if isinstance(iv.value, MemMappedValue):
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return iv.value
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elif iv.value.constant and isinstance(iv.value, IntegerValue):
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return MemMappedValue(iv.value.value, iv.datatype, 1, stmt.sourceref, iv.name)
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else:
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raise CodeError("cannot yet generate code for assignment: non-constant and non-memmapped indirect") # XXX
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rvalue = stmt.right
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if isinstance(rvalue, IndirectValue):
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rvalue = unwrap_indirect(rvalue)
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self.p("\t\t\t\t\t; " + stmt.lineref)
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if isinstance(rvalue, IntegerValue):
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for lv in stmt.leftvalues:
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if isinstance(lv, RegisterValue):
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self.generate_assign_integer_to_reg(lv.register, rvalue)
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elif isinstance(lv, MemMappedValue):
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self.generate_assign_integer_to_mem(lv, rvalue)
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elif isinstance(lv, IndirectValue):
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lv = unwrap_indirect(lv)
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self.generate_assign_integer_to_mem(lv, rvalue)
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else:
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raise CodeError("invalid assignment target (1)", str(stmt))
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elif isinstance(rvalue, RegisterValue):
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for lv in stmt.leftvalues:
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if isinstance(lv, RegisterValue):
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self.generate_assign_reg_to_reg(lv, rvalue.register)
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elif isinstance(lv, MemMappedValue):
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self.generate_assign_reg_to_memory(lv, rvalue.register)
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elif isinstance(lv, IndirectValue):
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lv = unwrap_indirect(lv)
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self.generate_assign_reg_to_memory(lv, rvalue.register)
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else:
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raise CodeError("invalid assignment target (2)", str(stmt))
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elif isinstance(rvalue, StringValue):
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r_str = self.output_string(rvalue.value, True)
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for lv in stmt.leftvalues:
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if isinstance(lv, RegisterValue):
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if len(rvalue.value) == 1:
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self.generate_assign_char_to_reg(lv, r_str)
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|
else:
|
|
self.generate_assign_string_to_reg(lv, rvalue)
|
|
elif isinstance(lv, MemMappedValue):
|
|
if len(rvalue.value) == 1:
|
|
self.generate_assign_char_to_memory(lv, r_str)
|
|
else:
|
|
self.generate_assign_string_to_memory(lv, rvalue)
|
|
elif isinstance(lv, IndirectValue):
|
|
lv = unwrap_indirect(lv)
|
|
if len(rvalue.value) == 1:
|
|
self.generate_assign_char_to_memory(lv, r_str)
|
|
else:
|
|
self.generate_assign_string_to_memory(lv, rvalue)
|
|
else:
|
|
raise CodeError("invalid assignment target (2)", str(stmt))
|
|
elif isinstance(rvalue, MemMappedValue):
|
|
for lv in stmt.leftvalues:
|
|
if isinstance(lv, RegisterValue):
|
|
self.generate_assign_mem_to_reg(lv.register, rvalue)
|
|
elif isinstance(lv, MemMappedValue):
|
|
self.generate_assign_mem_to_mem(lv, rvalue)
|
|
elif isinstance(lv, IndirectValue):
|
|
lv = unwrap_indirect(lv)
|
|
self.generate_assign_mem_to_mem(lv, rvalue)
|
|
else:
|
|
raise CodeError("invalid assignment target (4)", str(stmt))
|
|
elif isinstance(rvalue, FloatValue):
|
|
for lv in stmt.leftvalues:
|
|
if isinstance(lv, MemMappedValue) and lv.datatype == DataType.FLOAT:
|
|
self.generate_assign_float_to_mem(lv, rvalue)
|
|
elif isinstance(lv, IndirectValue):
|
|
lv = unwrap_indirect(lv)
|
|
assert lv.datatype == DataType.FLOAT
|
|
self.generate_assign_float_to_mem(lv, rvalue)
|
|
else:
|
|
raise CodeError("cannot assign float to ", str(lv))
|
|
else:
|
|
raise CodeError("invalid assignment value type", str(stmt))
|
|
|
|
def generate_assign_float_to_mem(self, mmv: MemMappedValue,
|
|
rvalue: Union[FloatValue, IntegerValue]) -> None:
|
|
floatvalue = float(rvalue.value)
|
|
mflpt = self.to_mflpt5(floatvalue)
|
|
target = mmv.name or Parser.to_hex(mmv.address)
|
|
with self.preserving_registers({'A'}):
|
|
self.p("\t\t\t\t\t; {:s} = {}".format(target, rvalue.name or floatvalue))
|
|
a_reg_value = None
|
|
for i, byte in enumerate(mflpt):
|
|
if byte != a_reg_value:
|
|
self.p("\t\tlda #${:02x}".format(byte))
|
|
a_reg_value = byte
|
|
self.p("\t\tsta {:s}+{:d}".format(target, i))
|
|
|
|
def generate_assign_reg_to_memory(self, lv: MemMappedValue, r_register: str) -> None:
|
|
# Memory = Register
|
|
lv_string = lv.name or Parser.to_hex(lv.address)
|
|
if lv.datatype == DataType.BYTE:
|
|
if len(r_register) > 1:
|
|
raise CodeError("cannot assign register pair to single byte memory")
|
|
self.p("\t\tst{:s} {}".format(r_register.lower(), lv_string))
|
|
elif lv.datatype == DataType.WORD:
|
|
if len(r_register) == 1:
|
|
self.p("\t\tst{:s} {}".format(r_register.lower(), lv_string)) # lsb
|
|
with self.preserving_registers({'A'}, loads_a_within=True):
|
|
self.p("\t\tlda #0")
|
|
self.p("\t\tsta {:s}+1".format(lv_string)) # msb
|
|
else:
|
|
self.p("\t\tst{:s} {}".format(r_register[0].lower(), lv_string))
|
|
self.p("\t\tst{:s} {}+1".format(r_register[1].lower(), lv_string))
|
|
elif lv.datatype == DataType.FLOAT:
|
|
# assigning a register to a float requires c64 ROM routines
|
|
if r_register in REGISTER_WORDS:
|
|
def do_rom_calls():
|
|
self.p("\t\tjsr c64flt.GIVUAYF") # uword AY -> fac1
|
|
self.p("\t\tldx #<" + lv_string)
|
|
self.p("\t\tldy #>" + lv_string)
|
|
self.p("\t\tjsr c64.FTOMEMXY") # fac1 -> memory XY
|
|
if r_register == "AY":
|
|
with self.preserving_registers({'A', 'X', 'Y'}):
|
|
do_rom_calls()
|
|
elif r_register == "AX":
|
|
with self.preserving_registers({'A', 'X', 'Y'}):
|
|
self.p("\t\tpha\n\t\ttxa\n\t\ttay\n\t\tpla") # X->Y (so we have AY now)
|
|
do_rom_calls()
|
|
else: # XY
|
|
with self.preserving_registers({'A', 'X', 'Y'}, loads_a_within=True):
|
|
self.p("\t\ttxa") # X->A (so we have AY now)
|
|
do_rom_calls()
|
|
elif r_register in "AXY":
|
|
|
|
def do_rom_calls():
|
|
self.p("\t\tjsr c64.FREADUY") # ubyte Y -> fac1
|
|
self.p("\t\tldx #<" + lv_string)
|
|
self.p("\t\tldy #>" + lv_string)
|
|
self.p("\t\tjsr c64.FTOMEMXY") # fac1 -> memory XY
|
|
|
|
if r_register == "A":
|
|
with self.preserving_registers({'A', 'X', 'Y'}):
|
|
self.p("\t\ttay")
|
|
do_rom_calls()
|
|
elif r_register == "X":
|
|
with self.preserving_registers({'A', 'X', 'Y'}, loads_a_within=True):
|
|
self.p("\t\ttxa")
|
|
self.p("\t\ttay")
|
|
do_rom_calls()
|
|
elif r_register == "Y":
|
|
with self.preserving_registers({'A', 'X', 'Y'}):
|
|
do_rom_calls()
|
|
else:
|
|
raise CodeError("invalid register to assign to float", r_register)
|
|
else:
|
|
raise CodeError("invalid lvalue type", lv.datatype)
|
|
|
|
def generate_assign_reg_to_reg(self, lv: RegisterValue, r_register: str) -> None:
|
|
if lv.register != r_register:
|
|
if lv.register == 'A': # x/y -> a
|
|
self.p("\t\tt{:s}a".format(r_register.lower()))
|
|
elif lv.register == 'Y':
|
|
if r_register == 'A':
|
|
# a -> y
|
|
self.p("\t\ttay")
|
|
else:
|
|
# x -> y, 6502 doesn't have txy
|
|
self.p("\t\tstx ${0:02x}\n\t\tldy ${0:02x}".format(Zeropage.SCRATCH_B1))
|
|
elif lv.register == 'X':
|
|
if r_register == 'A':
|
|
# a -> x
|
|
self.p("\t\ttax")
|
|
else:
|
|
# y -> x, 6502 doesn't have tyx
|
|
self.p("\t\tsty ${0:02x}\n\t\tldx ${0:02x}".format(Zeropage.SCRATCH_B1))
|
|
elif lv.register in REGISTER_WORDS:
|
|
if len(r_register) == 1:
|
|
# assign one register to a pair, so the hi byte is zero.
|
|
if lv.register == "AX" and r_register == "A":
|
|
self.p("\t\tldx #0")
|
|
elif lv.register == "AX" and r_register == "X":
|
|
self.p("\t\ttxa\n\t\tldx #0")
|
|
elif lv.register == "AX" and r_register == "Y":
|
|
self.p("\t\ttya\n\t\tldx #0")
|
|
elif lv.register == "AY" and r_register == "A":
|
|
self.p("\t\tldy #0")
|
|
elif lv.register == "AY" and r_register == "X":
|
|
self.p("\t\ttxa\n\t\tldy #0")
|
|
elif lv.register == "AY" and r_register == "Y":
|
|
self.p("\t\ttya\n\t\tldy #0")
|
|
elif lv.register == "XY" and r_register == "A":
|
|
self.p("\t\ttax\n\t\tldy #0")
|
|
elif lv.register == "XY" and r_register == "X":
|
|
self.p("\t\tldy #0")
|
|
elif lv.register == "XY" and r_register == "Y":
|
|
self.p("\t\ttyx\n\t\tldy #0")
|
|
else:
|
|
raise CodeError("invalid register combination", lv.register, r_register)
|
|
elif lv.register == "AX" and r_register == "AY":
|
|
# y -> x, 6502 doesn't have tyx
|
|
self.p("\t\tsty ${0:02x}\n\t\tldx ${0:02x}".format(Zeropage.SCRATCH_B1))
|
|
elif lv.register == "AX" and r_register == "XY":
|
|
# x -> a, y -> x, 6502 doesn't have tyx
|
|
self.p("\t\ttxa")
|
|
self.p("\t\tsty ${0:02x}\n\t\tldx ${0:02x}".format(Zeropage.SCRATCH_B1))
|
|
elif lv.register == "AY" and r_register == "AX":
|
|
# x -> y, 6502 doesn't have txy
|
|
self.p("\t\tstx ${0:02x}\n\t\tldy ${0:02x}".format(Zeropage.SCRATCH_B1))
|
|
elif lv.register == "AY" and r_register == "XY":
|
|
# x -> a
|
|
self.p("\t\ttxa")
|
|
elif lv.register == "XY" and r_register == "AX":
|
|
# x -> y, a -> x, 6502 doesn't have txy
|
|
self.p("\t\tstx ${0:02x}\n\t\tldy ${0:02x}".format(Zeropage.SCRATCH_B1))
|
|
self.p("\t\ttax")
|
|
elif lv.register == "XY" and r_register == "AY":
|
|
# a -> x
|
|
self.p("\t\ttax")
|
|
else:
|
|
raise CodeError("invalid register combination", lv.register, r_register)
|
|
else:
|
|
raise CodeError("invalid register " + lv.register)
|
|
|
|
def generate_assign_integer_to_mem(self, lv: MemMappedValue, rvalue: IntegerValue) -> None:
|
|
if lv.name:
|
|
symblock, sym = self.cur_block.lookup(lv.name)
|
|
if not isinstance(sym, VariableDef):
|
|
raise CodeError("invalid lvalue type " + str(sym))
|
|
assign_target = symblock.label + '.' + sym.name if symblock is not self.cur_block else lv.name
|
|
lvdatatype = sym.type
|
|
else:
|
|
assign_target = Parser.to_hex(lv.address)
|
|
lvdatatype = lv.datatype
|
|
r_str = rvalue.name if rvalue.name else "${:x}".format(rvalue.value)
|
|
if lvdatatype == DataType.BYTE:
|
|
if rvalue.value is not None and not lv.assignable_from(rvalue) or rvalue.datatype != DataType.BYTE:
|
|
raise OverflowError("value doesn't fit in a byte")
|
|
with self.preserving_registers({'A'}, loads_a_within=True):
|
|
self.p("\t\tlda #" + r_str)
|
|
self.p("\t\tsta " + assign_target)
|
|
elif lvdatatype == DataType.WORD:
|
|
if rvalue.value is not None and not lv.assignable_from(rvalue):
|
|
raise OverflowError("value doesn't fit in a word")
|
|
with self.preserving_registers({'A'}, loads_a_within=True):
|
|
self.p("\t\tlda #<" + r_str)
|
|
self.p("\t\tsta " + assign_target)
|
|
self.p("\t\tlda #>" + r_str)
|
|
self.p("\t\tsta {}+1".format(assign_target))
|
|
elif lvdatatype == DataType.FLOAT:
|
|
if rvalue.value is not None and not DataType.FLOAT.assignable_from_value(rvalue.value):
|
|
raise CodeError("value cannot be assigned to a float")
|
|
self.generate_assign_float_to_mem(lv, rvalue)
|
|
else:
|
|
raise CodeError("invalid lvalue type " + str(lvdatatype))
|
|
|
|
def generate_assign_mem_to_reg(self, l_register: str, rvalue: MemMappedValue) -> None:
|
|
r_str = rvalue.name if rvalue.name else "${:x}".format(rvalue.address)
|
|
if len(l_register) == 1:
|
|
if rvalue.datatype != DataType.BYTE:
|
|
raise CodeError("can only assign a byte to a register")
|
|
self.p("\t\tld{:s} {:s}".format(l_register.lower(), r_str))
|
|
else:
|
|
if rvalue.datatype == DataType.BYTE:
|
|
self.p("\t\tld{:s} {:s}".format(l_register[0].lower(), r_str))
|
|
self.p("\t\tld{:s} #0".format(l_register[1].lower()))
|
|
elif rvalue.datatype == DataType.WORD:
|
|
self.p("\t\tld{:s} {:s}".format(l_register[0].lower(), r_str))
|
|
self.p("\t\tld{:s} {:s}+1".format(l_register[1].lower(), r_str))
|
|
else:
|
|
raise CodeError("can only assign a byte or word to a register pair")
|
|
|
|
def generate_assign_mem_to_mem(self, lv: MemMappedValue, rvalue: MemMappedValue) -> None:
|
|
r_str = rvalue.name or Parser.to_hex(rvalue.address)
|
|
l_str = lv.name or Parser.to_hex(lv.address)
|
|
if lv.datatype == DataType.BYTE:
|
|
if rvalue.datatype != DataType.BYTE:
|
|
raise CodeError("can only assign a byte to a byte", str(rvalue))
|
|
with self.preserving_registers({'A'}, loads_a_within=True):
|
|
self.p("\t\tlda " + r_str)
|
|
self.p("\t\tsta " + l_str)
|
|
elif lv.datatype == DataType.WORD:
|
|
if rvalue.datatype == DataType.BYTE:
|
|
with self.preserving_registers({'A'}, loads_a_within=True):
|
|
self.p("\t\tlda " + r_str)
|
|
self.p("\t\tsta " + l_str)
|
|
self.p("\t\tlda #0")
|
|
self.p("\t\tsta {:s}+1".format(l_str))
|
|
elif rvalue.datatype == DataType.WORD:
|
|
with self.preserving_registers({'A'}, loads_a_within=True):
|
|
self.p("\t\tlda {:s}".format(r_str))
|
|
self.p("\t\tsta {:s}".format(l_str))
|
|
self.p("\t\tlda {:s}+1".format(r_str))
|
|
self.p("\t\tsta {:s}+1".format(l_str))
|
|
else:
|
|
raise CodeError("can only assign a byte or word to a word", str(rvalue))
|
|
elif lv.datatype == DataType.FLOAT:
|
|
if rvalue.datatype == DataType.FLOAT:
|
|
with self.preserving_registers({'A', 'X', 'Y'}, loads_a_within=True):
|
|
self.p("\t\tlda #<" + r_str)
|
|
self.p("\t\tsta c64.SCRATCH_ZPWORD1")
|
|
self.p("\t\tlda #>" + r_str)
|
|
self.p("\t\tsta c64.SCRATCH_ZPWORD1+1")
|
|
self.p("\t\tldx #<" + l_str)
|
|
self.p("\t\tldy #>" + l_str)
|
|
self.p("\t\tjsr c64flt.copy_mflt")
|
|
elif rvalue.datatype == DataType.BYTE:
|
|
with self.preserving_registers({'A', 'X', 'Y'}):
|
|
self.p("\t\tldy " + r_str)
|
|
self.p("\t\tjsr c64.FREADUY") # ubyte Y -> fac1
|
|
self.p("\t\tldx #<" + l_str)
|
|
self.p("\t\tldy #>" + l_str)
|
|
self.p("\t\tjsr c64.FTOMEMXY") # fac1 -> memory XY
|
|
elif rvalue.datatype == DataType.WORD:
|
|
with self.preserving_registers({'A', 'X', 'Y'}, loads_a_within=True):
|
|
self.p("\t\tlda " + r_str)
|
|
self.p("\t\tldy {:s}+1".format(r_str))
|
|
self.p("\t\tjsr c64flt.GIVUAYF") # uword AY -> fac1
|
|
self.p("\t\tldx #<" + l_str)
|
|
self.p("\t\tldy #>" + l_str)
|
|
self.p("\t\tjsr c64.FTOMEMXY") # fac1 -> memory XY
|
|
else:
|
|
raise CodeError("unsupported rvalue to memfloat", str(rvalue))
|
|
else:
|
|
raise CodeError("invalid lvalue memmapped datatype", str(lv))
|
|
|
|
def generate_assign_char_to_memory(self, lv: MemMappedValue, char_str: str) -> None:
|
|
# Memory = Character
|
|
with self.preserving_registers({'A'}, loads_a_within=True):
|
|
self.p("\t\tlda #" + char_str)
|
|
if not lv.name:
|
|
self.p("\t\tsta " + Parser.to_hex(lv.address))
|
|
return
|
|
# assign char value to a memory location by symbol name
|
|
symblock, sym = self.cur_block.lookup(lv.name)
|
|
if isinstance(sym, VariableDef):
|
|
assign_target = lv.name
|
|
if symblock is not self.cur_block:
|
|
assign_target = symblock.label + '.' + sym.name
|
|
if sym.type == DataType.BYTE:
|
|
self.p("\t\tsta " + assign_target)
|
|
elif sym.type == DataType.WORD:
|
|
self.p("\t\tsta " + assign_target)
|
|
self.p("\t\tlda #0")
|
|
self.p("\t\tsta {}+1".format(assign_target))
|
|
else:
|
|
raise CodeError("invalid lvalue type " + str(sym))
|
|
else:
|
|
raise CodeError("invalid lvalue type " + str(sym))
|
|
|
|
def generate_assign_integer_to_reg(self, l_register: str, rvalue: IntegerValue) -> None:
|
|
r_str = rvalue.name if rvalue.name else "${:x}".format(rvalue.value)
|
|
if l_register in ('A', 'X', 'Y'):
|
|
self.p("\t\tld{:s} #{:s}".format(l_register.lower(), r_str))
|
|
elif l_register in REGISTER_WORDS:
|
|
self.p("\t\tld{:s} #<{:s}".format(l_register[0].lower(), r_str))
|
|
self.p("\t\tld{:s} #>{:s}".format(l_register[1].lower(), r_str))
|
|
elif l_register == "SC":
|
|
# set/clear S carry bit
|
|
if rvalue.value:
|
|
self.p("\t\tsec")
|
|
else:
|
|
self.p("\t\tclc")
|
|
elif l_register == "SI":
|
|
# interrupt disable bit
|
|
if rvalue.value:
|
|
self.p("\t\tsei")
|
|
else:
|
|
self.p("\t\tcli")
|
|
else:
|
|
raise CodeError("invalid register in immediate integer assignment", l_register, rvalue.value)
|
|
|
|
def generate_assign_char_to_reg(self, lv: RegisterValue, char_str: str) -> None:
|
|
# Register = Char (string of length 1)
|
|
if lv.register not in ('A', 'X', 'Y'):
|
|
raise CodeError("invalid register for char assignment", lv.register)
|
|
self.p("\t\tld{:s} #{:s}".format(lv.register.lower(), char_str))
|
|
|
|
def generate_assign_string_to_reg(self, lv: RegisterValue, rvalue: StringValue) -> None:
|
|
if lv.register not in ("AX", "AY", "XY"):
|
|
raise CodeError("need register pair AX, AY or XY for string address assignment", lv.register)
|
|
if rvalue.name:
|
|
self.p("\t\tld{:s} #<{:s}".format(lv.register[0].lower(), rvalue.name))
|
|
self.p("\t\tld{:s} #>{:s}".format(lv.register[1].lower(), rvalue.name))
|
|
else:
|
|
raise CodeError("cannot assign immediate string, it must be a string variable")
|
|
|
|
def generate_assign_string_to_memory(self, lv: MemMappedValue, rvalue: StringValue) -> None:
|
|
if lv.datatype != DataType.WORD:
|
|
raise CodeError("need word memory type for string address assignment")
|
|
if rvalue.name:
|
|
assign_target = lv.name if lv.name else Parser.to_hex(lv.address)
|
|
self.p("\t\tlda #<{:s}".format(rvalue.name))
|
|
self.p("\t\tsta " + assign_target)
|
|
self.p("\t\tlda #>{:s}".format(rvalue.name))
|
|
self.p("\t\tsta {}+1".format(assign_target))
|
|
else:
|
|
raise CodeError("cannot assign immediate string, it must be a string variable")
|