mirror of https://github.com/mgcaret/rom4x.git
ROM5X preliminary code
This commit is contained in:
mgcaret
parent
cda85678ee
commit
adeb5e6b04
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@ -0,0 +1,25 @@
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MIG space references in ROM:
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CE00-CE1F - MIG RAM window
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CE20 - Increment page
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CE3D-CE3E - ?
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CE40 - write in E4D9,E503,E612,EF02
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read in 8E9C,E9A3,E9EB,EA15,EA2D,EA40,EE87,
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always around slot 6 I/O accesses.
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CE60 - read in routine at E4C7,E8C5,E974,EA6B,EE95
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write in routine at E4F2,E612,E652,EF02,EFC6,F54C
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always around slot 6 I/O accesses.
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CEA0 - Reset page 0
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CECD - ? from data
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CED5 - ? from data
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CF9A - ? from bank switch @C746 prob calling main bannk
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CFCF - ? from data
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CFFF - leftover from non //c ROM
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MIG page usage:
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Page 0 - 3.5 ROM - routines at CA12, E51D
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CE11 - slot I/O offset of ? (ldy CE11, lda C000,y in routine at CA12)
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Page 1 - used by routines at CA71,E54F,E534
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Page 2 - Appears used only by accelerator code
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Page 3 - used by routines at CA4B, CA71, E1E1, EB8B, ECCF
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Page 4+ - used all over the place
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@ -0,0 +1,27 @@
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Inventory of zeros of 5 bytes or more in the IIc Plus ROM
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Main Bank
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C1FB - 5 bytes
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C4EE - 12 bytes
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C5F3 - 5 bytes
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C6FB - 5 bytes
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C9A1 - 9 bytes
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CFF9 - 7 bytes
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Alt Bank
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C572 - 8 bytes
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C7FB - 8 bytes
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C7FC - 7 bytes
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CE00 - 512 bytes not usable (MIG space)
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D134 - 76 bytes
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D516 - 234 bytes
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D6CE - 306 bytes
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DB63 - 157 bytes
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DE00 - 512 bytes maybe not usable (second mig space?), none of the firmware
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touches it.
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F72D - 16 bytes not usable (some kind of data table)
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F7ED - 19 bytes
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FB3C - 196 bytes
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FC3C - 12 bytes
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FCC9 - 55 bytes
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FE96 - 352 bytes, but reserve 65816 vectors
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@ -0,0 +1,8 @@
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#include "iic+.defs"
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.text
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* = $cff9 ; 7 bytes available here
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lda #$a9 ; lda opcode
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nop ; jmp/jsr $cffa does lda #$ea
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jmp $fbdf ; jump to bell1 hijack
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; total 6 bytes.
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@ -0,0 +1,7 @@
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; patch PWRUP to call boot5x
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#include "iic+.defs"
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.text
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* = $fab4
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nop
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jmp gobt5x
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@ -0,0 +1,7 @@
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; patch RESET.X to call reset5x
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#include "iic+.defs"
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.text
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* = $fac8
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jmp gorst5x
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@ -0,0 +1,4 @@
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.text
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* = $fbdf
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sta $c028
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@ -1,5 +0,0 @@
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#include "iic+.defs"
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.text
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* = $fcde
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sta rombank
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@ -1,39 +0,0 @@
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#include "iic+.defs"
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.text
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* = rom5x
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asl butn1 ; check option key
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bcc rd5x ; not pressed, see if RD recoverable
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lda #"O" ; flashing "O"
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sta $7d0 ; tell user
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exit5x lda #>(r5xrtn-1)
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pha
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lda #<(r5xrtn-1)
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pha
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ldy #$00 ; in case someone assumes this later
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jmp swrts2
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rd5x jsr rdinit ; init ram card and registers
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lda pwrup,y ; get power up flag
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cmp #pwrbyte ; already initialized?
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beq exit5x ; exit if so
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jsr testsize ; does not wreck x or y
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lda numbanks,y ; get discovered # banks
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beq exit5x ; no memory
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stz addrl,x ; set slinky address 0
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stz addrm,x
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stz addrh,x
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lda data,x ; get first byte
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cmp #$01 ; boot block?
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bne exit5x ; nope
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lda data,x ; next byte
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beq exit5x ; not bootable if 0
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cmp #$ff ; other likely byte for fresh RAM
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beq exit5x ; not bootable if $ff
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lda #pwrbyte ; sta pwrup,y
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lda #"R" ; tell user
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sta $7d0 ; on screen
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bra exit5x
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rdinit bit rx_mslot*$100 ; activate registers
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ldy #rx_mslot ; slot offset
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ldy #rx_devno ; register offset
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rts
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@ -0,0 +1,112 @@
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#include "iic+.defs"
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.text
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* = boot5x ; 234 bytes available, code assembles to 231 when
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; next line uncommented
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; jsr ntitle ; TODO "Apple IIc +"
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jsr rdrecov ; try to recover ramdisk
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lda power2 + rx_mslot ; get action saved by reset5x
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beq boot4 ; if zero, continue boot
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jsr bann5x ; display ROM 5X footer
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lda power2 + rx_mslot ; boot selection
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btc2 cmp #$02 ; clear ramcard
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bne btc3
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jsr rdclear ; do clear
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bra boot4
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btc3 cmp #$03 ; Diags
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bne btc4
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jmp $c7c4
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btc4 cmp #$04 ; RX diags
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bne btc5
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ldx #$ff
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txs ; reset stack
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jsr rdinit ; get x and y loaded
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stx sl_devno ; diags need this
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jsr testsize ; compute card size
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lda #>(monitor-1) ; load "return" address
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pha ; into stack so that we
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lda #<(monitor-1) ; exit card test into
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pha ; the monitor
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lda numbanks,y ; get the card size in banks
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bne dordiag ; do diag if memory present
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jmp swrts2 ; otherwise jump to monitor
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dordiag jmp $db3a ; diags
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btc5 cmp #$05 ; boot smartport
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beq boot5
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; fall through if none of the above
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boot4 lda #rx_mslot ; boot slot 4
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bra bootsl
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boot5 lda #$c5 ; boot slot 5
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bra bootsl
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boot6 lda #$c6 ; boot slot 6
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bootsl ldx #$00 ; low byte of slot
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bootadr stx $0 ; store address
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sta $1 ; return to bank 0 does jmp (0)
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endbt4x lda #>(bt5xrtn-1)
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pha
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lda #<(bt5xrtn-1)
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pha
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lda $1
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jmp swrts2
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rdrecov jsr rdinit ; init ramcard
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lda pwrup,y ; get power up flag
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cmp #pwrbyte ; already initialized?
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beq recovdn ; exit if initialized
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jsr testsize ; does not wreck x or y
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lda numbanks,y ; get discovered # banks
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beq recovdn ; no mem
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stz addrl,x ; set slinky address 0
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stz addrm,x
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stz addrh,x
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lda data,x ; start check for bootable ramdisk
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cmp #$01
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bne recovdn ; not bootable
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lda data,x ; next byte should be nonzero and not $ff
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beq recovdn ; not bootable
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cmp #$ff
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beq recovdn ; not bootable
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lda #pwrbyte
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sta pwrup,y ; set power byte
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lda #"R" ; tell user
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sta $7d0 ; on screen
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recovdn rts
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; zero ram card space
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rdclear jsr rdinit ; init ramcard
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jsr testsize ; get size
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lda numbanks,y ; # of 64Ks to write
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beq clrdone ; no memory
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lda #$c0 ; 'A' - 1
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sta $400 ; upper left corner
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stz addrl,x ; slinky address 0
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stz addrm,x
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stz addrh,x
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clbnklp inc $400 ; poor mans progress meter
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ldy #$00
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cl64klp ldx #$00 ; loop for all pages in bank
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cl256lp txa ; loop for all bytes in page
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ldx #rx_devno
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stz data,x ; write a zero to card
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tax
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dex
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bne cl256lp ; 256 byte loop
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dey
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bne cl64klp ; 64K loop
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ldx #rx_mslot
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dec numbanks,x
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bne clbnklp ; if more banks
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clrdone ldx #rx_mslot
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stz pwrup,x ; zero powerup byte
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lda #$a0 ; ' '
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sta $400 ; clear progress
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rts
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rdinit bit rx_mslot*$100 ; activate registers
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ldy #rx_mslot ; slot offset
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ldx #rx_devno ; register offset
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rts
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; next is snippet of code to boot external 5.25
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bootext lda #$e0
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ldy #$01
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ldx #$60
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jmp $c60b
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bt4xend = *
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@ -0,0 +1,90 @@
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#include "iic+.defs"
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.text
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* = misc5x ; max 306 bytes
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bra domenu
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bra dobann
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bra gtkey
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bra confirm
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dobann jsr ntitle
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ldx #(msg2-msg1) ; msg display entry point
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jmp disp
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domenu jsr ntitle ; "Apple ||c +"
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ldx #$00 ; menu start
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jsr disp ; show it
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rts
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gtkey lda #$60
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sta ($0),y ; cursor
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sta kbdstrb ; clr keyboard
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kbdin lda kbd ; get key
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bpl kbdin
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sta kbdstrb ; clear keyboard
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sta ($0),y ; put it on screen
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rts
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; display message, input x = message start relative to msg1
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disp stz $0 ; load some safe defaults
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lda #$40
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sta $1
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ldy #$0 ; needs to be zero
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disp0 lda msg1,x ; get message byte
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bne disp1 ; proceed if nonzero
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rts ; exit if 0
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disp1 inx ; next byte either way
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cmp #$20 ; ' '
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bcc disp2 ; start of ptr if < 20
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eor #$80 ; invert high bit
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sta ($0),y ; write to mem
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inc $0 ; inc address low byte
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bra disp0 ; back to the beginning
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disp2 sta $1 ; write address high
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lda msg1,x ; get it
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sta $0 ; write address low
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inx ; set next msg byte
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bra disp0 ; back to the beginning
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confirm pha
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ldx #(msg3-msg1) ; ask confirm
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jsr disp
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jsr gtkey
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plx
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ora #$20 ; to lower
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cmp #$f9 ; "y"
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php
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txa
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plp
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rts
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; display "Apple IIc +" in a convoluted manner
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; ultimately, the rts instruction here "rts" to swrts2
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; which switches banks and "rts" to the title/banner firmware call
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; which then "rts" to swrts (same addr as swrts2, but main bank)
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; which then actually rts to our caller
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ntitle lda #>(swrts2-1) ; put return addr of swrts2 on stack
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pha
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lda #<(swrts2-1)
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pha
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lda #>(banner-1)
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pha
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lda #<(banner-1)
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pha
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lda #>(swrts2-1)
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pha
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lda #<(swrts2-1)
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pha
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rts ; jump to swrts2
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; msg format
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; A byte < $20 indicates high byte of address.
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; Next byte must be low byte of address. Anything
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; else are characters to display and will have their
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; upper bit inverted before being written to the screen.
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msg1 = *
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.db $05,$06,"0 Monitor"
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.db $05,$86,"1 Reboot"
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.db $06,$06,"2 Zero RAM Card"
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.db $06,$86,"3 Sys Diags"
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.db $07,$06,"4 RAM Card Diags"
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.db $07,$86,"5 Boot 3.5/SmartPort"
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.db $04,$2e,"6 Boot 5.25"
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; .db $04,$ae,"7 Accelerator"
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.db $07,$5f,"By M.G."
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msg2 .db $07,$db,"ROM 5X 02/08/17"
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.db $05,$ae,$00 ; cursor pos in menu
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msg3 .db $05,$b0,"SURE? ",$00
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@ -0,0 +1,42 @@
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#include "iic+.defs"
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.text
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* = reset5x ; max 157 bytes
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stz power2 + rx_mslot ; action = normal reset
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lda #>(rst5xrtn-1) ; common case
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pha
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lda #<(rst5xrtn-1)
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pha ; note that this stays on stack
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asl butn1 ; closed apple
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bcs ckdiag
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exitrst jmp swrts2
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; check to see if both apples are down
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ckdiag bit butn0 ; open apple
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bmi exitrst ; return to RESET.X
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; present menu because only closed apple is down
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menu jsr menu5x ; display menu
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jsr gkey5x
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cmp #$b0 ; "0"
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bne ckkey1
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ldx #$ff ; reset stack
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txs
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lda #>(monitor-1) ; monitor entry on stack
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pha
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lda #<(monitor-1)
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pha
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jmp swrts2 ; rts to enter monitor
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ckkey1 cmp #$b2 ; "2"
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beq doconf
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cmp #$b4 ; "4"
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bne ckkey2
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doconf jsr conf5x
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bne menu ; go back to menu4x
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ckkey2 sec
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sbc #$b0 ; ascii->number
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bmi menu ; < 0 not valid
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cmp #$08 ; we will use 7 for accelerator later
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bpl menu ; > 7 not valid
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sta power2 + rx_mslot ; for boot5x
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stz softev + 1 ; deinit coldstart
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stz pwerdup ; ditto
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bra exitrst
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@ -0,0 +1,17 @@
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#include "iic+.defs"
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.text
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* = $fbe2 ; ~29 bytes free here
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cmp #$a9 ; reset patch
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bne chk2
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jmp reset5x
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chk2: cmp #$ea ; boot patch
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bne dowait
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jmp boot5x
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dowait: jsr $fcb5 ; do delay if anything else
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lda #>($fbe2-1)
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pha
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lda #<($fbe2-1)
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pha
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lda #$00 ; in case someone assumes this
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jmp swrts2
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; 28 bytes, will have to move if we get bigger
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@ -1,6 +0,0 @@
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#include "iic+.defs"
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.text
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* = $fce1
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sta set80col ; instruction we patched over
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jmp rom5x
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@ -1,18 +1,26 @@
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# ROM 5X by MG
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## DO NOT EVEN TRY THIS YET :-)
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## PRELIMINARY, DO NOT EVEN TRY THIS YET :-)
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**Warning:** This has not been tested on an emulator or a real Apple IIc Plus.
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This is a patch for the Apple IIc Plus firmware that tries to recover a battery-backed
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RAM disk upon cold start. Because of the limited space in the Apple IIc ROM. it does not
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have the complete feature set of ROM 4X for the (non-Plus) //c.
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This is ROM4X revised to the Apple IIc Plus ROM version 5.
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Upon cold start, the patch checks for a potentially bootable RAM disk and restores the
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appropriate screen holes to prevent it from being destroyed and to enable boot. If a
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RAMdisk is recovered, a flashing "R" will appear in the lower left corner of the screen.
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There are almost no free bytes in the main bank of the IIc Plus firmware, so
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I had to get creative to get into the alternate bank, where I then had to split
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the code up across multiple smaller free spaces. Ironically this makes the
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code larger as well.
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For those interested, I hijack the monitor BEEP1 routine. The beep routine has
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an LDA #$40 and then calls WAIT with this value for a .1 second delay,
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presumably so that multiple beeps are distinct from each other.
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I patch the JSR WAIT to be STA $C028, which switches to the other bank.
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The code in the other bank checks the accumulator and for two values calls
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either reset5x or boot5x, and for any other value executes the WAIT (assuming
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that we got there from BEEP1).
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Then, in only 6 bytes I can create two entry points that load the value into
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A that we need for the reset or boot routines, and then jump to the above patch.
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To prevent the check and recovery, power on the machine with the Option key held down.
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A flashing "O" will appear in the lower left corner of the screen and the system will
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boot without checking for or recovering any RAM disk.
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@ -1,8 +1,10 @@
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; hardware
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set80col = $c001
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;set80col = $c001
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rombank = $c028
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butn0 = $c061
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butn1 = $c062
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kbd = $c000
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kbdstrb = $c010
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addrl = $bff8
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addrm = $bff9
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addrh = $bffa
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@ -20,8 +22,13 @@ sl_scrn7 = $778 - $c0
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sl_scrn8 = $7f8 - $c0
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numbanks = sl_scrn1
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pwrup = sl_scrn7
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power2 = sl_scrn8
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sl_devno = $778
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; locations
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softev = $3f2
|
||||
pwerdup = $3f4
|
||||
|
||||
; values
|
||||
pwrbyte = $a5
|
||||
rx_slot = $4
|
||||
|
|
@ -29,8 +36,35 @@ rx_mslot = rx_slot + $c0
|
|||
rx_devno = rx_slot * $10 + $88
|
||||
|
||||
; entry points
|
||||
r5xrtn = $fce1
|
||||
rom5x = $cf00
|
||||
gorst5x = $cff9
|
||||
gobt5x = $cffa
|
||||
rst5xrtn = $facb
|
||||
bt5xrtn = $fb19
|
||||
reset5x = $db63
|
||||
boot5x = $d516
|
||||
testsize = $d99f
|
||||
swrts2 = $c784
|
||||
monitor = $ff59
|
||||
misc5x = $d6ce
|
||||
menu5x = misc5x
|
||||
bann5x = menu5x+2
|
||||
gkey5x = bann5x+2
|
||||
conf5x = gkey5x+2
|
||||
banner = $fb60
|
||||
|
||||
; macros
|
||||
#define psa(addr) \
|
||||
lda #>(addr-1) \
|
||||
pha \
|
||||
lda #<(addr-1) \
|
||||
pha \
|
||||
jsr swrts2
|
||||
|
||||
#define rtj(addr) \
|
||||
psa(addr) \
|
||||
rts
|
||||
|
||||
#define rtl(addr) \
|
||||
psa(addr) \
|
||||
jmp swrts2
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue