5X: the Merlin fix

This commit is contained in:
mgcaret 2017-12-10 18:01:37 -08:00
parent e04fa4d5ce
commit d5969104cd
12 changed files with 132 additions and 108 deletions

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@ -2,16 +2,15 @@ Inventory of zeros of 5 bytes or more in the IIc Plus ROM
Main Bank Main Bank
C1FB - 5 bytes C1FB - 5 bytes
C4EE - 12 bytes C4EE - 12 bytes - delete key fix
C5F3 - 5 bytes C5F3 - 5 bytes
C6FB - 5 bytes C6FB - 5 bytes - but Disk II ID here at C6FF
C9A1 - 9 bytes C9A1 - 9 bytes - beep merlin fix part 2
CFF9 - 7 bytes - ROM 5X switcher CFF9 - 7 bytes - ROM 5X switcher
Aux Bank Aux Bank
C572 - 8 bytes C572 - 8 bytes
C7FB - 8 bytes C7FC - 7 bytes - ROM 5X dispatch jump at $C7FF
C7FC - 7 bytes
CE00 - 512 bytes not usable (MIG space) CE00 - 512 bytes not usable (MIG space)
D3B5 - 75 bytes - Accelerator menu text D3B5 - 75 bytes - Accelerator menu text
D516 - 234 bytes - ROM 5X boot D516 - 234 bytes - ROM 5X boot

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@ -0,0 +1,8 @@
; Code to fix merlin incompatibility with the beep patch
; this arises because switching to the aux firmware messes up the
; memory map slightly. The IIc Plus WAIT routine has a fix, we adopt it here.
.code
.pc02
.org $c2fc
phx
jmp $c9a1 ; next step

10
rom5x/B0_C7FC_5x_switch.s Normal file
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@ -0,0 +1,10 @@
; There's a bit of luck in the IIc Plus firmware
; there are 4 $00 bytes at $C7FC in the main bank, of which the last
; is "AppleTalk version" according to the ROM $03 source code
; in the tech ref, and should be left at $00.
; There are also 7 $00 bytes at $C7FC in the aux bank. So if we switch at
; $C7FC, then we get a 4 bytes in the aux bank, just enough for a jump.
.code
.org $c7fc
sta $c028

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@ -0,0 +1,7 @@
; see B0 C2FC patch for commentary
.code
.pc02
.org $c9a1
jsr $cfe5 ; get memory config we need to fix
jsr $c7fc ; call ROM 5X dispatch
jmp $c2f5 ; fix memory, restore x, a=$00

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@ -10,6 +10,6 @@
.org $cff9 ; 7 bytes available here, but don't count on $CFFF .org $cff9 ; 7 bytes available here, but don't count on $CFFF
lda #$a9 ; lda opcode lda #$a9 ; lda opcode
nop ; jmp/jsr $cffa does lda #$ea nop ; jmp/jsr $cffa does lda #$ea
jmp $fbdf ; jump to bell1 hijack jmp $c7fc ; jump to 5X dispatcher
; total 6 bytes. ; total 6 bytes.

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@ -1,21 +0,0 @@
; Hijack the BELL1 monitor routine to do our bidding.
; BELL1 implements the beep sound heard on reset or
; Ctrl-G, etc. It starts with
; LDA #$40
; JSR WAIT ; delay .1 sec
; followed by code to actually beep the speaker
; In our case, BELL1 always loads the accumulator with
; a fixed number, and executes a 3-byte instruction
; Well, it turns out that to switch banks we need
; 3 bytes, and as luck would have it the other bank
; is empty here.
; So the routine on the other side is the ROM 5X
; dispatcher. It will take what is in the accumulator
; and use that to determine the next action.
; Obviously, $40 should beep the speaker, anything
; else can do whatever we want.
.code
.org $fbdf
sta $c028

13
rom5x/B0_FBE6_beep_fix.s Normal file
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@ -0,0 +1,13 @@
; Fix the beep
; inspired by http://quinndunki.com/blondihacks/?p=2471
; see commentary in B1 FB3C patch
.code
.pc02
.org $fbe6
jmp $c2fc ; to 5X beep with merlin fix
.res $fbef-*,$ea ; fill up the rest with NOPs
.assert * = $fbef, error, "ROM 5X beep fix alignment problem"
; the rts at $fbef is sacred

5
rom5x/B1_C7FF_5x_jump.s Normal file
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@ -0,0 +1,5 @@
; See B0 C7FC patch for description
.code
.org $c7ff
jmp $fb3c ; to 5X dispatch

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@ -81,7 +81,7 @@ msg1 = *
.byte $04,$2e,"6 Boot 5.25" .byte $04,$2e,"6 Boot 5.25"
.byte $04,$ae,"7 Accelerator" .byte $04,$ae,"7 Accelerator"
.byte $07,$5f,"By M.G." .byte $07,$5f,"By M.G."
msg2: .byte $07,$db,"ROM 5X 04/08/17" msg2: .byte $07,$db,"ROM 5X 11/09/17"
.byte $05,$ae,$00 ; cursor pos in menu .byte $05,$ae,$00 ; cursor pos in menu
msg3: .byte $05,$b0,"SURE? ",$00 msg3: .byte $05,$b0,"SURE? ",$00
; metadata to identify build conditions ; metadata to identify build conditions

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@ -1,47 +1,44 @@
.code .code
.psc02 .psc02
.include "iic+.defs" .include "iic+.defs"
.org reset5x ; max 157 bytes .org reset5x ; max 157 bytes
stz power2 + rx_mslot ; action = normal reset stz power2 + rx_mslot ; action = normal reset
lda #>(rst5xrtn-1) ; common case lda #>(rst5xrtn-1) ; common case
pha pha
lda #<(rst5xrtn-1) lda #<(rst5xrtn-1)
pha ; note that this stays on stack pha ; note that this stays on stack
asl butn1 ; option (closed apple) asl butn1 ; option (closed apple)
bcs ckdiag bcs ckdiag
exitrst: jmp swrts2 exitrst: jmp swrts2
; check to see if cmd_option (both apples) are down ; check to see if cmd_option (both apples) are down
ckdiag: bit butn0 ; command (open apple) ckdiag: bit butn0 ; command (open apple)
bmi exitrst ; return to RESET.X bmi exitrst ; return to RESET.X
; present menu because only closed apple is down ; present menu because only closed apple is down
menu: jsr menu5x ; display menu menu: jsr menu5x ; display menu
jsr gkey5x jsr gkey5x
cmp #$b0 ; "0" cmp #$b0 ; "0"
bne ckkey1 bne ckkey1
ldx #$ff ; reset stack ldx #$ff ; reset stack
txs txs
lda #>(monitor-1) ; monitor entry on stack txa
pha jmp $fb3c ; now has crash-to-monitor function
lda #<(monitor-1) ckkey1: cmp #$b2 ; "2"
pha beq doconf
jmp swrts2 ; rts to enter monitor cmp #$b4 ; "4"
ckkey1: cmp #$b2 ; "2" bne ckkey2
beq doconf doconf: jsr conf5x
cmp #$b4 ; "4" bne menu ; go back to menu4x
bne ckkey2 ckkey2: cmp #$b7 ; "7"
doconf: jsr conf5x bne ckkey3
bne menu ; go back to menu4x jsr $fd02 ; accelerator menu
ckkey2: cmp #$b7 ; "7" bra menu
bne ckkey3 ckkey3: sec
jsr $fd02 ; accelerator menu sbc #$b0 ; ascii->number
bra menu bmi menu ; < 0 not valid
ckkey3: sec cmp #$07 ; we will use 7 for accelerator later
sbc #$b0 ; ascii->number bpl menu ; > 7 not valid
bmi menu ; < 0 not valid sta power2 + rx_mslot ; for boot5x
cmp #$07 ; we will use 7 for accelerator later stz softev + 1 ; deinit coldstart
bpl menu ; > 7 not valid stz pwerdup ; ditto
sta power2 + rx_mslot ; for boot5x bra exitrst
stz softev + 1 ; deinit coldstart
stz pwerdup ; ditto
bra exitrst

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@ -1,45 +1,51 @@
.code .code
.psc02 .psc02
.include "iic+.defs" .include "iic+.defs"
.org $fb3c ; ~165 bytes free here .org $fb3c ; ~165 bytes free here
cmp #$a9 ; reset patch .proc dispatch
bne chk2 cmp #$a9 ; reset patch
jmp reset5x bne :+
chk2: cmp #$ea ; boot patch jmp reset5x
bne chk3 : cmp #$ea ; boot patch
jmp boot5x bne :+
.if newbeep jmp boot5x
chk3: : cmp #$0c
.else beq oldbelle1
chk3: cmp #$40 ; beep ; jump to monitor
bne dowait lda #>(monitor-1) ; monitor entry on stack as return address
pha
lda #<(monitor-1)
pha
jmp swrts2 ; switch bank and rts to monitor
.endproc
; "classic air raid beep" ; "classic air raid beep"
; inspired by http://quinndunki.com/blondihacks/?p=2471 .proc oldbell
; jsr $fcb5 ; (new) WAIT for .1 sec delay ldy #$c0
jsr owait obell2: lda #$0c
ldy #$c0 dowait: jsr oldwait ; old wait for correct sound, we also enter here
obell2: lda #$0c lda $c030
jsr owait ; old wait for correct sound dey
lda $c030 bne obell2
dey jmp swrts2
bne obell2 .endproc
bra dexit ; back to caller ; We jump into the old bell routine mid-way because it's possible for
.endif ; someone to want to call the bell routine with a different duration
dowait: jsr $fcb5 ; do delay if anything else ; by putting a custom value in Y and calling fbe4 (BELL2)
lda #>($fbe2-1) ; return to other bank here (in BELL1) oldbelle1 := oldbell::dowait
pha ; by pushing address onto
lda #<($fbe2-1) ; the stack
pha
lda #$00 ; in case someone assumes this
dexit: jmp swrts2 ; back to other bank
; old wait - no ACIA access to enforce delay at ; old wait - no ACIA access to enforce delay at
; accelerated speeds, speaker delay tkes care of it ; accelerated speeds, speaker delay takes care of it
; when we do the old beep ; when we do the old beep
owait: sec .proc oldwait
owait2: pha sec
owait3: sbc #$01 owait2: pha
bne owait3 owait3: sbc #$01
pla bne owait3
sbc #$01 pla
bne owait2 sbc #$01
rts bne owait2
rts
.endproc
.assert * <= $fc00, error, "ROM 5X dispatch overruns $fc00"