mirror of https://github.com/mgcaret/rom4x.git
39 lines
1.2 KiB
Plaintext
39 lines
1.2 KiB
Plaintext
Inventory of zeros of 5 bytes or more in the IIc Plus ROM
|
|
|
|
Main Bank
|
|
C1FB - 5 bytes
|
|
C4EE - 12 bytes - delete key fix
|
|
C5F3 - 5 bytes
|
|
C6FB - 5 bytes - but Disk II ID here at C6FF
|
|
C9A1 - 9 bytes - beep merlin fix part 2
|
|
CFF9 - 7 bytes - ROM 5X switcher
|
|
|
|
Aux Bank
|
|
C572 - 8 bytes
|
|
C7FC - 7 bytes - ROM 5X dispatch jump at $C7FF
|
|
CE00 - 512 bytes not usable (MIG space)
|
|
D3B5 - 75 bytes - Accelerator menu text
|
|
D516 - 234 bytes - ROM 5X boot
|
|
D6CE - 306 bytes - ROM 5X misc routines
|
|
DB63 - 157 bytes - ROM 5X reset
|
|
DE00 - 512 bytes not usable (second view of MIG)
|
|
F72D - 16 bytes not usable (some kind of data table)
|
|
F7ED - 19 bytes
|
|
FB3C - 196 bytes - FBE2 ROM 5X dispatch
|
|
- Future: classic beep
|
|
FC3C - 12 bytes
|
|
FCC9 - 55 bytes - Accelerator speeds table
|
|
FE96 - 352 bytes - but reserve 65816 vectors
|
|
- Accelerator enhancements
|
|
|
|
Other potential usable space:
|
|
Aux Bank
|
|
D249-D32B - 227 bytes
|
|
This is the ROM checksum diagnostic, and we currently patch around it
|
|
because it fails with the ROM 5X patches in place, for obvious reasons.
|
|
We could fix the checksum, or reclaim the space.
|
|
To patch around it in a reclaimable fashion, a the JSR instruction at
|
|
C53D and the following carry check and JSR must be patched out, easiest
|
|
by placing BRA C555 at C53D.
|
|
|