mirror of https://github.com/mgcaret/rom4x.git
40 lines
1.2 KiB
Plaintext
40 lines
1.2 KiB
Plaintext
Inventory of zeros of 5 bytes or more in the IIc Plus ROM
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Main Bank
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C1FB - 5 bytes
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C4EE - 12 bytes
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C5F3 - 5 bytes
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C6FB - 5 bytes
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C9A1 - 9 bytes
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CFF9 - 7 bytes - ROM 5X switcher
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Aux Bank
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C572 - 8 bytes
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C7FB - 8 bytes
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C7FC - 7 bytes
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CE00 - 512 bytes not usable (MIG space)
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D3B5 - 75 bytes - Accelerator menu text
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D516 - 234 bytes - ROM 5X boot
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D6CE - 306 bytes - ROM 5X misc routines
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DB63 - 157 bytes - ROM 5X reset
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DE00 - 512 bytes not usable (second view of MIG)
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F72D - 16 bytes not usable (some kind of data table)
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F7ED - 19 bytes
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FB3C - 196 bytes - FBE2 ROM 5X dispatch
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- Future: classic beep
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FC3C - 12 bytes
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FCC9 - 55 bytes - Accelerator speeds table
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FE96 - 352 bytes - but reserve 65816 vectors
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- Accelerator enhancements
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Other potential usable space:
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Aux Bank
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D249-D32B - 227 bytes
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This is the ROM checksum diagnostic, and we currently patch around it
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because it fails with the ROM 5X patches in place, for obvious reasons.
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We could fix the checksum, or reclaim the space.
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To patch around it in a reclaimable fashion, a the JSR instruction at
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C53D and the following carry check and JSR must be patched out, easiest
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by placing BRA C555 at C53D.
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