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42 lines
1.6 KiB
Markdown
42 lines
1.6 KiB
Markdown
# ROM 5X by MG
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## PRELIMINARY, NOT EXTENSIVELY TESTED
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*I have not tested this with the A2Heaven RAM card yet, but all of the other
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functionality definitely works.*
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This is ROM 5X, providing the ROM 4X functionality to the Apple IIc Plus ROM
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version 5.
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There are almost no free bytes in the main bank of the IIc Plus firmware, so
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I had to get creative to get into the alternate bank, where I then had to split
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the code up across multiple smaller free spaces due to the massive 3.5 drive
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handling code. Ironically this makes the code larger as well.
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For those interested, I hijack the monitor BEEP1 routine. The beep routine has
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an LDA #$40 and then calls WAIT with this value for a .1 second delay,
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presumably so that multiple beeps are distinct from each other.
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I patch the JSR WAIT to be STA $C028, which switches to the other bank.
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The code in the other bank checks the accumulator and for two values calls
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either reset5x or boot5x, for a third value ($40 loaded by BEEP1) does the
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classic Apple II "air raid" beep sound, and for any other value executes the WAIT
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(assuming that we got there from BEEP1) and returns back to BEEP1.
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Then, in only 6 bytes I can create two entry points that load the right values
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into the A register that we need for the reset or boot routines, and then jump
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to the above patch.
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## Options
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The options directory contains one or more subdirectories with optional patches
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that change the default behavior of the Apple IIc Plus.
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### Accelerator Reverse
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The accelerator reverse patch is a 1-byte patch that causes the IIc Plus to boot up
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at the normal speed.
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Pressing <ESC> at reset time will make the machine run at 4 MHz.
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