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shave some cycles (split auxmem LFSR to reduce bank switches)

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4am 2020-11-22 01:10:10 -05:00
parent 7ce75c9092
commit 4d2ea22158
1 changed files with 52 additions and 13 deletions
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65
src/fx/fx.dhgr.2bit.fizzle.a
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@ -5,7 +5,7 @@
!to "build/FX/DHGR.FIZZLE2BIT",plain !to "build/FX/DHGR.FIZZLE2BIT",plain
*=$6000 *=$6000
addrs = $6100 ; [256 bytes, page-aligned, does not need to be duplicated to auxmem] addrs = $6100 ; [256 bytes, page-aligned, duplicated in auxmem]
copymasks = $6200 ; [256 bytes, page-aligned, duplicated in auxmem] copymasks = $6200 ; [256 bytes, page-aligned, duplicated in auxmem]
ldx #(end-start) ; copy LFSR code to zero page ldx #(end-start) ; copy LFSR code to zero page
@ -26,11 +26,17 @@ copymasks = $6200 ; [256 bytes, page-aligned, duplicated in a
asl asl
bne -- bne --
clc clc
-- ldy #$20 ; create address lookup table (main memory only) -- ldy #$20 ; create identical address tables in main and aux memory
tya tya
- sta addrs, x - sta addrs, x
sta $C005
sta addrs, x
sta $C004
eor #$80 eor #$80
sta addrs+1, x sta addrs+1, x
sta $C005
sta addrs+1, x
sta $C004
eor #$80 eor #$80
adc #1 adc #1
inx inx
@ -39,21 +45,32 @@ copymasks = $6200 ; [256 bytes, page-aligned, duplicated in a
bne - bne -
txa txa
bne -- bne --
jmp loop ; exit via LFSR code on zero page jmp copyaux ; exit via LFSR code on zero page
start start
!pseudopc 0 { !pseudopc 0 {
; in: X,Y=0
!byte %00000011 !byte %00000011
copyaux sta $C003
sta $C005
ldx #$20
ldy #$00
a lda $4000, y
b sta $A000, y
iny
bne a
inc a+2
inc b+2
dex
bne a
; X,Y=0 on entry to LFSR
loop txa loop txa
loop1 eor #$B4 ; LFSR form 0xB400 with period 65535 loop1 eor #$B4 ; LFSR form 0xB400 with period 65535
tax ; X is LFSR high byte, Y is LFSR low byte tax ; X is LFSR high byte, Y is LFSR low byte
loop2 lda addrs, x ; which means X is the index into the base address lookup table loop2 lda addrs, x ; which means X is the index into the base address lookup table
bpl + ; and Y is the offset from the base address bmi aux ; and Y is the offset from the base address
and #$7F ; which works out well with the available addressing modes sta $C002
sta $C003 ; (half the addresses have their high bit set, which we strip and sta $C004
sta $C005 ; use as an indicator to switch to auxmem) sta <dst+2
+ sta <dst+2
eor #$60 eor #$60
sta <src+2 sta <src+2
lda (<dst+1), y lda (<dst+1), y
@ -61,8 +78,6 @@ src eor $FD00, y ; merge source and destination bits
and copymasks, x ; isolate the bits to replace, zero the rest and copymasks, x ; isolate the bits to replace, zero the rest
eor (<dst+1), y ; unmerge source and destination bits, leaves 'to keep' destination bits intact eor (<dst+1), y ; unmerge source and destination bits, leaves 'to keep' destination bits intact
dst sta $FD00, y ; write the result dst sta $FD00, y ; write the result
sta $C002
sta $C004
txa txa
lsr lsr
tax tax
@ -75,8 +90,32 @@ dst sta $FD00, y ; write the result
bmi exit bmi exit
txa txa
bne loop1 bne loop1
lda $4000 ; last lousy byte (because LFSR never hits 0) exit lda $4000 ; last lousy byte (because LFSR never hits 0)
sta $2000 sta $2000
exit rts rts
aux sta $C003
sta $C005
sta <auxsrc+2
eor #$80
sta <auxdst+2
lda (<auxdst+1), y
auxsrc eor $FD00, y
and copymasks, x
eor (<auxdst+1), y
auxdst sta $FD00, y
txa
lsr
tax
tya
ror
tay
bcc loop2
bne loop
lda $C000
bmi exit
txa
bne loop1
beq exit
} }
end end