mirror of
https://github.com/a2-4am/4cade.git
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factor out more FX routines
This commit is contained in:
parent
efdbb8218e
commit
70f62c2e66
62
src/4cade.a
62
src/4cade.a
@ -159,38 +159,40 @@ gGlobalPrefsStore
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; be set to $55 as part of the 64K memory test,
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; be set to $55 as part of the 64K memory test,
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; which is apparently one of the acceptable values)
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; which is apparently one of the acceptable values)
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+DEFINE_INDIRECT_VECTOR iHGRPrecomputed3Bit, HGRPrecomputed3Bit
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+DEFINE_INDIRECT_VECTOR iHGRPrecomputed3Bit, HGRPrecomputed3Bit
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+DEFINE_INDIRECT_VECTOR iRippleCoordinates3Bit, RippleCoordinates3Bit
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+DEFINE_INDIRECT_VECTOR iRippleCoordinates3Bit, RippleCoordinates3Bit
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+DEFINE_INDIRECT_VECTOR iReverseCoordinates3Bit, ReverseCoordinates3Bit
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+DEFINE_INDIRECT_VECTOR iReverseCoordinates3Bit, ReverseCoordinates3Bit
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+DEFINE_INDIRECT_VECTOR iSetupPrecomputed3Bit, SetupPrecomputed3Bit
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+DEFINE_INDIRECT_VECTOR iSetupPrecomputed3Bit, SetupPrecomputed3Bit
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+DEFINE_INDIRECT_VECTOR iDHGRPrecomputed2Bit, DHGRPrecomputed2Bit
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+DEFINE_INDIRECT_VECTOR iDHGRDitherPrecomputed2Bit, DHGRDitherPrecomputed2Bit
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+DEFINE_INDIRECT_VECTOR iHGRPrecomputed2Bit, HGRPrecomputed2Bit
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+DEFINE_INDIRECT_VECTOR iDHGRPrecomputed2Bit, DHGRPrecomputed2Bit
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+DEFINE_INDIRECT_VECTOR iRippleCoordinates2Bit, RippleCoordinates2Bit
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+DEFINE_INDIRECT_VECTOR iHGRDitherPrecomputed2Bit, HGRDitherPrecomputed2Bit
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+DEFINE_INDIRECT_VECTOR iReverseCoordinates2Bit, ReverseCoordinates2Bit
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+DEFINE_INDIRECT_VECTOR iHGRPrecomputed2Bit, HGRPrecomputed2Bit
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+DEFINE_INDIRECT_VECTOR iRippleCoordinates2Bit, RippleCoordinates2Bit
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+DEFINE_INDIRECT_VECTOR iReverseCoordinates2Bit, ReverseCoordinates2Bit
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+DEFINE_INDIRECT_VECTOR iBuildDHGRSparseBitmasks2Bit, BuildDHGRSparseBitmasks2Bit
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+DEFINE_INDIRECT_VECTOR iBuildDHGRSparseBitmasks2Bit, BuildDHGRSparseBitmasks2Bit
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+DEFINE_INDIRECT_VECTOR iBuildHGRSparseBitmasks2Bit, BuildHGRSparseBitmasks2Bit
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+DEFINE_INDIRECT_VECTOR iBuildHGRSparseBitmasks2Bit, BuildHGRSparseBitmasks2Bit
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+DEFINE_INDIRECT_VECTOR iDHGRDitherPrecomputed1Bit, DHGRDitherPrecomputed1Bit
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+DEFINE_INDIRECT_VECTOR iDHGRDitherPrecomputed1Bit, DHGRDitherPrecomputed1Bit
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+DEFINE_INDIRECT_VECTOR iDHGRPrecomputed1Bit, DHGRPrecomputed1Bit
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+DEFINE_INDIRECT_VECTOR iDHGRPrecomputed1Bit, DHGRPrecomputed1Bit
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+DEFINE_INDIRECT_VECTOR iHGRDitherPrecomputed1Bit, HGRDitherPrecomputed1Bit
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+DEFINE_INDIRECT_VECTOR iHGRDitherPrecomputed1Bit, HGRDitherPrecomputed1Bit
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+DEFINE_INDIRECT_VECTOR iHGRPrecomputed1Bit, HGRPrecomputed1Bit
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+DEFINE_INDIRECT_VECTOR iHGRPrecomputed1Bit, HGRPrecomputed1Bit
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+DEFINE_INDIRECT_VECTOR iBuildDHGRSparseBitmasks1Bit, BuildDHGRSparseBitmasks1Bit
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+DEFINE_INDIRECT_VECTOR iBuildDHGRSparseBitmasks1Bit, BuildDHGRSparseBitmasks1Bit
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+DEFINE_INDIRECT_VECTOR iBuildHGRSparseBitmasks1Bit, BuildHGRSparseBitmasks1Bit
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+DEFINE_INDIRECT_VECTOR iBuildHGRSparseBitmasks1Bit, BuildHGRSparseBitmasks1Bit
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+DEFINE_INDIRECT_VECTOR iRippleCoordinates1Bit4, RippleCoordinates1Bit4
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+DEFINE_INDIRECT_VECTOR iRippleCoordinates1Bit4, RippleCoordinates1Bit4
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+DEFINE_INDIRECT_VECTOR iRippleCoordinates1Bit3, RippleCoordinates1Bit3
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+DEFINE_INDIRECT_VECTOR iRippleCoordinates1Bit3, RippleCoordinates1Bit3
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+DEFINE_INDIRECT_VECTOR iRippleCoordinates1Bit2, RippleCoordinates1Bit2
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+DEFINE_INDIRECT_VECTOR iRippleCoordinates1Bit2, RippleCoordinates1Bit2
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+DEFINE_INDIRECT_VECTOR iRippleCoordinates1Bit, RippleCoordinates1Bit
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+DEFINE_INDIRECT_VECTOR iRippleCoordinates1Bit, RippleCoordinates1Bit
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+DEFINE_INDIRECT_VECTOR iReverseCoordinates1Bit, ReverseCoordinates1Bit
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+DEFINE_INDIRECT_VECTOR iReverseCoordinates1Bit, ReverseCoordinates1Bit
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+DEFINE_INDIRECT_VECTOR iWaitForKeyWithTimeout, WaitForKeyWithTimeout
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+DEFINE_INDIRECT_VECTOR iWaitForKeyWithTimeout, WaitForKeyWithTimeout
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+DEFINE_INDIRECT_VECTOR iBuildDHGRDitherMasks, BuildDHGRDitherMasks
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+DEFINE_INDIRECT_VECTOR iBuildDHGRDitherMasks, BuildDHGRDitherMasks
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+DEFINE_INDIRECT_VECTOR iBuildHGRDitherMasks, BuildHGRDitherMasks
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+DEFINE_INDIRECT_VECTOR iBuildHGRDitherMasks, BuildHGRDitherMasks
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+DEFINE_INDIRECT_VECTOR iBuildDHGRMirrorCols, BuildDHGRMirrorCols
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+DEFINE_INDIRECT_VECTOR iBuildDHGRMirrorCols, BuildDHGRMirrorCols
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+DEFINE_INDIRECT_VECTOR iBuildHGRMirrorCols, BuildHGRMirrorCols
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+DEFINE_INDIRECT_VECTOR iBuildHGRMirrorCols, BuildHGRMirrorCols
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+DEFINE_INDIRECT_VECTOR iBuildHGRMirrorTables, BuildHGRMirrorTables
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+DEFINE_INDIRECT_VECTOR iBuildHGRMirrorTables, BuildHGRMirrorTables
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+DEFINE_INDIRECT_VECTOR iBuildHGRTables, BuildHGRTables
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+DEFINE_INDIRECT_VECTOR iBuildHGRTables, BuildHGRTables
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+DEFINE_INDIRECT_VECTOR iLoadFXDATA, LoadFXDATA
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+DEFINE_INDIRECT_VECTOR iLoadFXDATA, LoadFXDATA
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+DEFINE_INDIRECT_VECTOR iLoadXSingle, LoadXSingle
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+DEFINE_INDIRECT_VECTOR iLoadXSingle, LoadXSingle
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+DEFINE_INDIRECT_VECTOR iAddToPath, AddToPath
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+DEFINE_INDIRECT_VECTOR iAddToPath, AddToPath
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+DEFINE_INDIRECT_VECTOR iLoadFileDirect, LoadFileDirect
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+DEFINE_INDIRECT_VECTOR iLoadFileDirect, LoadFileDirect
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; SMC to RTS on a II+
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; SMC to RTS on a II+
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+DEFINE_INDIRECT_VECTOR WaitForVBL, WaitForVBL_iie
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+DEFINE_INDIRECT_VECTOR WaitForVBL, WaitForVBL_iie
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!if (RELBASE != $2000) and (* != UnwaitForVBL) { !serious "UnwaitForVBL=",*,", fix constants.a" }
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!if (RELBASE != $2000) and (* != UnwaitForVBL) { !serious "UnwaitForVBL=",*,", fix constants.a" }
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@ -201,8 +201,10 @@ iBuildDHGRSparseBitmasks2Bit = iBuildHGRSparseBitmasks2Bit-3
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iReverseCoordinates2Bit = iBuildDHGRSparseBitmasks2Bit-3
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iReverseCoordinates2Bit = iBuildDHGRSparseBitmasks2Bit-3
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iRippleCoordinates2Bit = iReverseCoordinates2Bit-3
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iRippleCoordinates2Bit = iReverseCoordinates2Bit-3
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iHGRPrecomputed2Bit = iRippleCoordinates2Bit-3
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iHGRPrecomputed2Bit = iRippleCoordinates2Bit-3
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iDHGRPrecomputed2Bit = iHGRPrecomputed2Bit-3
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iHGRDitherPrecomputed2Bit = iHGRPrecomputed2Bit-3
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iSetupPrecomputed3Bit = iDHGRPrecomputed2Bit-3
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iDHGRPrecomputed2Bit = iHGRDitherPrecomputed2Bit-3
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iDHGRDitherPrecomputed2Bit = iDHGRPrecomputed2Bit-3
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iSetupPrecomputed3Bit = iDHGRDitherPrecomputed2Bit-3
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iReverseCoordinates3Bit = iSetupPrecomputed3Bit-3
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iReverseCoordinates3Bit = iSetupPrecomputed3Bit-3
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iRippleCoordinates3Bit = iReverseCoordinates3Bit-3
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iRippleCoordinates3Bit = iReverseCoordinates3Bit-3
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iHGRPrecomputed3Bit = iRippleCoordinates3Bit-3
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iHGRPrecomputed3Bit = iRippleCoordinates3Bit-3
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266
src/fx.lib.a
266
src/fx.lib.a
@ -34,7 +34,9 @@
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; - ReverseCoordinates2Bit
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; - ReverseCoordinates2Bit
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; - RippleCoordinates2Bit
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; - RippleCoordinates2Bit
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; - HGRPrecomputed2Bit
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; - HGRPrecomputed2Bit
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; - HGRDitherPrecomputed2Bit
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; - DHGRPrecomputed2Bit
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; - DHGRPrecomputed2Bit
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; - DHGRDitherPrecomputed2Bit
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; - SetupPrecomputed3Bit
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; - SetupPrecomputed3Bit
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; - ReverseCoordinates3Bit
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; - ReverseCoordinates3Bit
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@ -448,7 +450,7 @@ HGRPrecomputed1Bit
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+ROW_X_TO_MIRROR_ADDRESSES .mirror_src1, .mirror_src2, .mirror_dest1, .mirror_dest2
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+ROW_X_TO_MIRROR_ADDRESSES .mirror_src1, .mirror_src2, .mirror_dest1, .mirror_dest2
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inc .input
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inc .input
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lda (.input), y
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lda (<.input), y
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+HIGH_3_LOW_5 .input
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+HIGH_3_LOW_5 .input
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; main 1x2 block in top-left quadrant
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; main 1x2 block in top-left quadrant
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@ -657,7 +659,7 @@ DHGRPrecomputed1Bit
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+ROW_X_TO_MIRROR_ADDRESSES .mirror_src1, .mirror_src2, .mirror_dest1, .mirror_dest2
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+ROW_X_TO_MIRROR_ADDRESSES .mirror_src1, .mirror_src2, .mirror_dest1, .mirror_dest2
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inc .input
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inc .input
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lda (.input), y
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lda (<.input), y
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+HIGH_3_LOW_5 .input
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+HIGH_3_LOW_5 .input
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sty <.y
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sty <.y
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clc
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clc
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@ -786,7 +788,7 @@ DHGRDitherPrecomputed1Bit
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+ROW_X_TO_MIRROR_ADDRESSES .mirror_src1, .mirror_src2, .mirror_dest1, .mirror_dest2
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+ROW_X_TO_MIRROR_ADDRESSES .mirror_src1, .mirror_src2, .mirror_dest1, .mirror_dest2
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iny
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iny
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lda (.input), y
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lda (<.input), y
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+HIGH_3_LOW_5 .input
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+HIGH_3_LOW_5 .input
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sty <.y
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sty <.y
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clc
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clc
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@ -1182,6 +1184,129 @@ HGRPrecomputed2Bit
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.end
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.end
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}
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}
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!zone {
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HGRDitherPrecomputed2Bit
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jsr BuildHGRDitherMasks
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jsr BuildHGRTables
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jsr BuildHGRMirrorCols
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jsr BuildHGRSparseBitmasks2Bit
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; phase 1 - in reverse, with additional masking (dithering)
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jsr .copytozp
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; set up starting coordinate for reading coordinates in reverse order
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+LDADDR Coordinates2Bit-2
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sta <.input
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sty <.input+1
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; set up EOF marker to stop reading coordinates in reverse order
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lda #$00
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sta Coordinates2Bit-2
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; set up logic to advance to next coordinates in reverse order
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ldx #(.next2_end-.next2_start-1)
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- lda .next2_start, x
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sta <.next, x
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dex
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bpl -
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jsr .InputLoop
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bit KBD
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bmi .start
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; phase 2 - in order, without additional masking
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jsr .copytozp
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; redirect additional masking pointers to an array that contains #$FFs (so no dithering)
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lda #<no_masks
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sta <.evenrow_ptr
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sta <.oddrow_ptr
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jmp .InputLoop
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.copytozp
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+COPY_TO_0 .start, .end
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.start
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!pseudopc 0 {
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.Exit2Bit rts
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.evenrow_ptr
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!word evenrow_masks
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.oddrow_ptr
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!word oddrow_masks
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.InputLoop
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ldy #0
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.input=*+1
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ldx Coordinates2Bit ; first value: HGR row + 1
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beq .Exit2Bit ; if 0 then we're done
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+ROW_X_TO_2BIT_BASE_ADDRESSES .src1, .src2, .dest1, .dest2
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iny
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lda (<.input), y
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+HIGH_3_LOW_5 .input
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; main 2x2 block in left half
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.src1=*+1
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lda $FDFD, y
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eor (<.dest1), y
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and copymasks2bit, x
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and (<.evenrow_ptr), y
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eor (<.dest1), y
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.dest1=*+1
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sta $FDFD, y
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.src2=*+1
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lda $FDFD, y
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eor (<.dest2), y
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and copymasks2bit, x
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and (<.oddrow_ptr), y
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eor (<.dest2), y
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.dest2=*+1
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sta $FDFD, y
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; corresponding 2x2 block in right half (same row, opposite column)
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lda mirror_cols, y
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tay
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lda (<.src1), y
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eor (<.dest1), y
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and mirror_copymasks2bit, x
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and (<.evenrow_ptr), y
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eor (<.dest1), y
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sta (<.dest1), y
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lda (<.src2), y
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eor (<.dest2), y
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and mirror_copymasks2bit, x
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and (<.oddrow_ptr), y
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eor (<.dest2), y
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sta (<.dest2), y
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.next
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inc <.input
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inc <.input
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bne .InputLoop
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bit KBD
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bmi .Exit2Bit
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inc <.input+1
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bne .InputLoop ; always branches
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}
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.end
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.next2_start
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!pseudopc .next {
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lda <.input
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php
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dec <.input
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dec <.input
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plp
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bne .InputLoop
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dec <.input+1
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bit KBD
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bpl .InputLoop
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rts
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}
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.next2_end
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}
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!zone {
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!zone {
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DHGRPrecomputed2Bit
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DHGRPrecomputed2Bit
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jsr BuildDHGRSparseBitmasks2Bit
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jsr BuildDHGRSparseBitmasks2Bit
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@ -1257,6 +1382,141 @@ DHGRPrecomputed2Bit
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.end
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.end
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}
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}
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!zone {
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DHGRDitherPrecomputed2Bit
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jsr BuildDHGRDitherMasks
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jsr BuildDHGRSparseBitmasks2Bit
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jsr BuildHGRTables
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jsr BuildDHGRMirrorCols
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; phase 1 - in reverse, with additional masking (dithering)
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jsr .copytozp
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; set up starting coordinate for reading coordinates in reverse order
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+LDADDR Coordinates2Bit-2
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sta <.input
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sty <.input+1
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; set up EOF marker to stop reading coordinates in reverse order
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lda #$00
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sta Coordinates2Bit-2
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; set up logic to advance to next coordinates in reverse order
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ldx #(.next2_end-.next2_start-1)
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- lda .next2_start, x
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sta <.next, x
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dex
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bpl -
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jsr .InputLoop
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bit KBD
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bmi .start
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; phase 2 - in order, without additional masking
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jsr .copytozp
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; redirect additional masking pointers to an array that contains #$FFs (so no dithering)
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lda #<no_masks
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sta <.evenrow_ptr
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sta <.oddrow_ptr
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jmp .InputLoop
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.copytozp
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+COPY_TO_0 .start, .end
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.start
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!pseudopc 0 {
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.Exit2Bit rts
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.evenrow_ptr
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!word evenrow_masks
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.oddrow_ptr
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!word oddrow_masks
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.InputLoop
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ldy #0
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.input=*+1
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ldx Coordinates2Bit ; first value: HGR row + 1
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beq .Exit2Bit ; if 0 then we're done
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+ROW_X_TO_2BIT_BASE_ADDRESSES .src1, .src2, .dest1, .dest2
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iny
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lda (<.input), y
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+HIGH_3_LOW_5 .input
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; main 2x2 block in left half
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clc
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- lda copymasks2bit, x
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beq +
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.src1=*+1
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lda $FDFD, y
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eor (<.dest1), y
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and copymasks2bit, x
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and (<.evenrow_ptr), y
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eor (<.dest1), y
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.dest1=*+1
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sta $FDFD, y
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.src2=*+1
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lda $FDFD, y
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eor (<.dest2), y
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||||||
|
and copymasks2bit, x
|
||||||
|
and (<.oddrow_ptr), y
|
||||||
|
eor (<.dest2), y
|
||||||
|
.dest2=*+1
|
||||||
|
sta $FDFD, y
|
||||||
|
+ bcs +
|
||||||
|
sta READAUXMEM
|
||||||
|
sta WRITEAUXMEM
|
||||||
|
sec
|
||||||
|
bcs -
|
||||||
|
+ sta READMAINMEM
|
||||||
|
sta WRITEMAINMEM
|
||||||
|
|
||||||
|
; corresponding 2x2 block in right half (same row, opposite column)
|
||||||
|
lda mirror_cols, y
|
||||||
|
tay
|
||||||
|
clc
|
||||||
|
- lda mirror_copymasks2bit, x
|
||||||
|
beq +
|
||||||
|
+COPY_BIT_DITHER .src1, .dest1, mirror_copymasks2bit, .evenrow_ptr
|
||||||
|
+COPY_BIT_DITHER .src2, .dest2, mirror_copymasks2bit, .oddrow_ptr
|
||||||
|
+ bcs +
|
||||||
|
sta READAUXMEM
|
||||||
|
sta WRITEAUXMEM
|
||||||
|
sec
|
||||||
|
bcs -
|
||||||
|
+ sta READMAINMEM
|
||||||
|
sta WRITEMAINMEM
|
||||||
|
|
||||||
|
.next
|
||||||
|
inc <.input
|
||||||
|
inc <.input
|
||||||
|
bne +
|
||||||
|
bit KBD
|
||||||
|
bmi ++
|
||||||
|
inc <.input+1
|
||||||
|
+ jmp .InputLoop
|
||||||
|
++ rts
|
||||||
|
|
||||||
|
}
|
||||||
|
.end
|
||||||
|
|
||||||
|
.next2_start
|
||||||
|
!pseudopc .next {
|
||||||
|
lda <.input
|
||||||
|
php
|
||||||
|
dec <.input
|
||||||
|
dec <.input
|
||||||
|
plp
|
||||||
|
bne +
|
||||||
|
dec <.input+1
|
||||||
|
bit KBD
|
||||||
|
bmi ++
|
||||||
|
+ jmp .InputLoop
|
||||||
|
++ rts
|
||||||
|
}
|
||||||
|
.next2_end
|
||||||
|
}
|
||||||
|
|
||||||
SetupPrecomputed3Bit
|
SetupPrecomputed3Bit
|
||||||
; build regular HGR lookup tables, then split them
|
; build regular HGR lookup tables, then split them
|
||||||
jsr BuildHGRTables
|
jsr BuildHGRTables
|
||||||
|
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
+FX_INITONCE_2BIT CoordinatesFile, Start
|
+FX_INITONCE_2BIT CoordinatesFile, Start
|
||||||
Start
|
Start
|
||||||
+FX_PRECOMPUTED_2BIT_DHGR_DITHER Coordinates2Bit, EndCoordinates2Bit
|
jmp iDHGRDitherPrecomputed2Bit
|
||||||
|
|
||||||
CoordinatesFile
|
CoordinatesFile
|
||||||
+PSTRING "BUTTERFLY.DATA"
|
+PSTRING "BUTTERFLY.DATA"
|
||||||
|
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
+FX_INITONCE_2BIT CoordinatesFile, Start
|
+FX_INITONCE_2BIT CoordinatesFile, Start
|
||||||
Start
|
Start
|
||||||
+FX_PRECOMPUTED_2BIT_DHGR_DITHER Coordinates2Bit, EndCoordinates2Bit
|
jmp iDHGRDitherPrecomputed2Bit
|
||||||
|
|
||||||
CoordinatesFile
|
CoordinatesFile
|
||||||
+PSTRING "HEART.DATA"
|
+PSTRING "HEART.DATA"
|
||||||
|
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
+FX_INITONCE_2BIT CoordinatesFile, Start
|
+FX_INITONCE_2BIT CoordinatesFile, Start
|
||||||
Start
|
Start
|
||||||
+FX_PRECOMPUTED_2BIT_DHGR_DITHER Coordinates2Bit, EndCoordinates2Bit
|
jmp iDHGRDitherPrecomputed2Bit
|
||||||
|
|
||||||
CoordinatesFile
|
CoordinatesFile
|
||||||
+PSTRING "MAPLE.DATA"
|
+PSTRING "MAPLE.DATA"
|
||||||
|
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
+FX_INITONCE_2BIT CoordinatesFile, Start
|
+FX_INITONCE_2BIT CoordinatesFile, Start
|
||||||
Start
|
Start
|
||||||
+FX_PRECOMPUTED_2BIT_DHGR_DITHER Coordinates2Bit, EndCoordinates2Bit
|
jmp iDHGRDitherPrecomputed2Bit
|
||||||
|
|
||||||
CoordinatesFile
|
CoordinatesFile
|
||||||
+PSTRING "SOFT.IRIS.DATA"
|
+PSTRING "SOFT.IRIS.DATA"
|
||||||
|
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
+FX_INITONCE_2BIT CoordinatesFile, Start
|
+FX_INITONCE_2BIT CoordinatesFile, Start
|
||||||
Start
|
Start
|
||||||
+FX_PRECOMPUTED_2BIT_DHGR_DITHER Coordinates2Bit, EndCoordinates2Bit
|
jmp iDHGRDitherPrecomputed2Bit
|
||||||
|
|
||||||
CoordinatesFile
|
CoordinatesFile
|
||||||
+PSTRING "STAR.DATA"
|
+PSTRING "STAR.DATA"
|
||||||
|
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
+FX_INITONCE_2BIT CoordinatesFile, Start
|
+FX_INITONCE_2BIT CoordinatesFile, Start
|
||||||
Start
|
Start
|
||||||
+FX_PRECOMPUTED_2BIT_DHGR_DITHER Coordinates2Bit, EndCoordinates2Bit
|
jmp iDHGRDitherPrecomputed2Bit
|
||||||
|
|
||||||
CoordinatesFile
|
CoordinatesFile
|
||||||
+PSTRING "STAR7.DATA"
|
+PSTRING "STAR7.DATA"
|
||||||
|
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
+FX_INITONCE_2BIT CoordinatesFile, Start
|
+FX_INITONCE_2BIT CoordinatesFile, Start
|
||||||
Start
|
Start
|
||||||
+FX_PRECOMPUTED_2BIT_DHGR_DITHER Coordinates2Bit, EndCoordinates2Bit
|
jmp iDHGRDitherPrecomputed2Bit
|
||||||
|
|
||||||
CoordinatesFile
|
CoordinatesFile
|
||||||
+PSTRING "WAVY.IRIS.DATA"
|
+PSTRING "WAVY.IRIS.DATA"
|
||||||
|
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
+FX_INITONCE_2BIT CoordinatesFile, Start
|
+FX_INITONCE_2BIT CoordinatesFile, Start
|
||||||
Start
|
Start
|
||||||
+FX_PRECOMPUTED_2BIT_DHGR_DITHER Coordinates2Bit, EndCoordinates2Bit
|
jmp iDHGRDitherPrecomputed2Bit
|
||||||
|
|
||||||
CoordinatesFile
|
CoordinatesFile
|
||||||
+PSTRING "W.IR.BLOOM.DATA"
|
+PSTRING "W.IR.BLOOM.DATA"
|
||||||
|
@ -2,137 +2,3 @@
|
|||||||
;(c) 2019-2020 by 4am
|
;(c) 2019-2020 by 4am
|
||||||
;
|
;
|
||||||
!source "src/fx/fx.hgr.precomputed.2bit.a"
|
!source "src/fx/fx.hgr.precomputed.2bit.a"
|
||||||
|
|
||||||
!macro FX_PRECOMPUTED_2BIT_DHGR_DITHER .coords, .endcoords {
|
|
||||||
jsr iBuildDHGRDitherMasks
|
|
||||||
jsr iBuildDHGRSparseBitmasks2Bit
|
|
||||||
jsr iBuildHGRTables
|
|
||||||
jsr iBuildDHGRMirrorCols
|
|
||||||
|
|
||||||
; phase 1 - in reverse, with additional masking (dithering)
|
|
||||||
jsr copytozp
|
|
||||||
|
|
||||||
; set up starting coordinate for reading coordinates in reverse order
|
|
||||||
+LDADDR .endcoords-2
|
|
||||||
sta <input
|
|
||||||
sty <input+1
|
|
||||||
|
|
||||||
; set up EOF marker to stop reading coordinates in reverse order
|
|
||||||
lda #$00
|
|
||||||
sta .coords-2
|
|
||||||
|
|
||||||
; set up logic to advance to next coordinates in reverse order
|
|
||||||
ldx #(next2_end-next2_start-1)
|
|
||||||
- lda next2_start, x
|
|
||||||
sta <next, x
|
|
||||||
dex
|
|
||||||
bpl -
|
|
||||||
|
|
||||||
jsr InputLoop
|
|
||||||
|
|
||||||
bit KBD
|
|
||||||
bmi start
|
|
||||||
|
|
||||||
; phase 2 - in order, without additional masking
|
|
||||||
jsr copytozp
|
|
||||||
|
|
||||||
; redirect additional masking pointers to an array that contains #$FFs (so no dithering)
|
|
||||||
lda #<no_masks
|
|
||||||
sta <evenrow_ptr
|
|
||||||
sta <oddrow_ptr
|
|
||||||
|
|
||||||
jmp InputLoop
|
|
||||||
|
|
||||||
copytozp
|
|
||||||
+COPY_TO_0 start, end
|
|
||||||
start
|
|
||||||
!pseudopc 0 {
|
|
||||||
Exit2Bit rts
|
|
||||||
evenrow_ptr
|
|
||||||
!word evenrow_masks
|
|
||||||
oddrow_ptr
|
|
||||||
!word oddrow_masks
|
|
||||||
InputLoop
|
|
||||||
ldy #0
|
|
||||||
input=*+1
|
|
||||||
ldx .coords ; first value: HGR row + 1
|
|
||||||
beq Exit2Bit ; if 0 then we're done
|
|
||||||
+ROW_X_TO_2BIT_BASE_ADDRESSES src1, src2, dest1, dest2
|
|
||||||
|
|
||||||
iny
|
|
||||||
lda (<input), y
|
|
||||||
+HIGH_3_LOW_5 input
|
|
||||||
|
|
||||||
; main 2x2 block in left half
|
|
||||||
clc
|
|
||||||
- lda copymasks2bit, x
|
|
||||||
beq +
|
|
||||||
src1=*+1
|
|
||||||
lda $FDFD, y
|
|
||||||
eor (<dest1), y
|
|
||||||
and copymasks2bit, x
|
|
||||||
and (<evenrow_ptr), y
|
|
||||||
eor (<dest1), y
|
|
||||||
dest1=*+1
|
|
||||||
sta $FDFD, y
|
|
||||||
src2=*+1
|
|
||||||
lda $FDFD, y
|
|
||||||
eor (<dest2), y
|
|
||||||
and copymasks2bit, x
|
|
||||||
and (<oddrow_ptr), y
|
|
||||||
eor (<dest2), y
|
|
||||||
dest2=*+1
|
|
||||||
sta $FDFD, y
|
|
||||||
+ bcs +
|
|
||||||
sta READAUXMEM
|
|
||||||
sta WRITEAUXMEM
|
|
||||||
sec
|
|
||||||
bcs -
|
|
||||||
+ sta READMAINMEM
|
|
||||||
sta WRITEMAINMEM
|
|
||||||
|
|
||||||
; corresponding 2x2 block in right half (same row, opposite column)
|
|
||||||
lda mirror_cols, y
|
|
||||||
tay
|
|
||||||
clc
|
|
||||||
- lda mirror_copymasks2bit, x
|
|
||||||
beq +
|
|
||||||
+COPY_BIT_DITHER src1, dest1, mirror_copymasks2bit, evenrow_ptr
|
|
||||||
+COPY_BIT_DITHER src2, dest2, mirror_copymasks2bit, oddrow_ptr
|
|
||||||
+ bcs +
|
|
||||||
sta READAUXMEM
|
|
||||||
sta WRITEAUXMEM
|
|
||||||
sec
|
|
||||||
bcs -
|
|
||||||
+ sta READMAINMEM
|
|
||||||
sta WRITEMAINMEM
|
|
||||||
|
|
||||||
next
|
|
||||||
inc <input
|
|
||||||
inc <input
|
|
||||||
bne +
|
|
||||||
bit KBD
|
|
||||||
bmi ++
|
|
||||||
inc <input+1
|
|
||||||
+ jmp InputLoop
|
|
||||||
++ rts
|
|
||||||
|
|
||||||
}
|
|
||||||
end
|
|
||||||
|
|
||||||
next2_start
|
|
||||||
!pseudopc next {
|
|
||||||
lda <input
|
|
||||||
php
|
|
||||||
dec <input
|
|
||||||
dec <input
|
|
||||||
plp
|
|
||||||
bne +
|
|
||||||
dec <input+1
|
|
||||||
bit KBD
|
|
||||||
bmi ++
|
|
||||||
+ jmp InputLoop
|
|
||||||
++ rts
|
|
||||||
}
|
|
||||||
next2_end
|
|
||||||
}
|
|
||||||
|
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
+FX_INITONCE_2BIT CoordinatesFile, Start
|
+FX_INITONCE_2BIT CoordinatesFile, Start
|
||||||
Start
|
Start
|
||||||
+FX_PRECOMPUTED_2BIT_DITHER Coordinates2Bit, EndCoordinates2Bit
|
jmp iHGRDitherPrecomputed2Bit
|
||||||
|
|
||||||
CoordinatesFile
|
CoordinatesFile
|
||||||
+PSTRING "BUTTERFLY.DATA"
|
+PSTRING "BUTTERFLY.DATA"
|
||||||
|
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
+FX_INITONCE_2BIT CoordinatesFile, Start
|
+FX_INITONCE_2BIT CoordinatesFile, Start
|
||||||
Start
|
Start
|
||||||
+FX_PRECOMPUTED_2BIT_DITHER Coordinates2Bit, EndCoordinates2Bit
|
jmp iHGRDitherPrecomputed2Bit
|
||||||
|
|
||||||
CoordinatesFile
|
CoordinatesFile
|
||||||
+PSTRING "HEART.DATA"
|
+PSTRING "HEART.DATA"
|
||||||
|
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
+FX_INITONCE_2BIT CoordinatesFile, Start
|
+FX_INITONCE_2BIT CoordinatesFile, Start
|
||||||
Start
|
Start
|
||||||
+FX_PRECOMPUTED_2BIT_DITHER Coordinates2Bit, EndCoordinates2Bit
|
jmp iHGRDitherPrecomputed2Bit
|
||||||
|
|
||||||
CoordinatesFile
|
CoordinatesFile
|
||||||
+PSTRING "MAPLE.DATA"
|
+PSTRING "MAPLE.DATA"
|
||||||
|
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
+FX_INITONCE_2BIT CoordinatesFile, Start
|
+FX_INITONCE_2BIT CoordinatesFile, Start
|
||||||
Start
|
Start
|
||||||
+FX_PRECOMPUTED_2BIT_DITHER Coordinates2Bit, EndCoordinates2Bit
|
jmp iHGRDitherPrecomputed2Bit
|
||||||
|
|
||||||
CoordinatesFile
|
CoordinatesFile
|
||||||
+PSTRING "SOFT.IRIS.DATA"
|
+PSTRING "SOFT.IRIS.DATA"
|
||||||
|
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
+FX_INITONCE_2BIT CoordinatesFile, Start
|
+FX_INITONCE_2BIT CoordinatesFile, Start
|
||||||
Start
|
Start
|
||||||
+FX_PRECOMPUTED_2BIT_DITHER Coordinates2Bit, EndCoordinates2Bit
|
jmp iHGRDitherPrecomputed2Bit
|
||||||
|
|
||||||
CoordinatesFile
|
CoordinatesFile
|
||||||
+PSTRING "STAR.DATA"
|
+PSTRING "STAR.DATA"
|
||||||
|
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
+FX_INITONCE_2BIT CoordinatesFile, Start
|
+FX_INITONCE_2BIT CoordinatesFile, Start
|
||||||
Start
|
Start
|
||||||
+FX_PRECOMPUTED_2BIT_DITHER Coordinates2Bit, EndCoordinates2Bit
|
jmp iHGRDitherPrecomputed2Bit
|
||||||
|
|
||||||
CoordinatesFile
|
CoordinatesFile
|
||||||
+PSTRING "STAR7.DATA"
|
+PSTRING "STAR7.DATA"
|
||||||
|
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
+FX_INITONCE_2BIT CoordinatesFile, Start
|
+FX_INITONCE_2BIT CoordinatesFile, Start
|
||||||
Start
|
Start
|
||||||
+FX_PRECOMPUTED_2BIT_DITHER Coordinates2Bit, EndCoordinates2Bit
|
jmp iHGRDitherPrecomputed2Bit
|
||||||
|
|
||||||
CoordinatesFile
|
CoordinatesFile
|
||||||
+PSTRING "WAVY.IRIS.DATA"
|
+PSTRING "WAVY.IRIS.DATA"
|
||||||
|
@ -33,125 +33,3 @@ InitOnce
|
|||||||
lda #$00
|
lda #$00
|
||||||
sta EndCoordinates2Bit
|
sta EndCoordinates2Bit
|
||||||
}
|
}
|
||||||
|
|
||||||
!macro FX_PRECOMPUTED_2BIT_DITHER .coords, .endcoords {
|
|
||||||
jsr iBuildHGRDitherMasks
|
|
||||||
jsr iBuildHGRTables
|
|
||||||
jsr iBuildHGRMirrorCols
|
|
||||||
jsr iBuildHGRSparseBitmasks2Bit
|
|
||||||
|
|
||||||
; phase 1 - in reverse, with additional masking (dithering)
|
|
||||||
jsr copytozp
|
|
||||||
|
|
||||||
; set up starting coordinate for reading coordinates in reverse order
|
|
||||||
+LDADDR .endcoords-2
|
|
||||||
sta <input
|
|
||||||
sty <input+1
|
|
||||||
|
|
||||||
; set up EOF marker to stop reading coordinates in reverse order
|
|
||||||
lda #$00
|
|
||||||
sta .coords-2
|
|
||||||
|
|
||||||
; set up logic to advance to next coordinates in reverse order
|
|
||||||
ldx #(next2_end-next2_start-1)
|
|
||||||
- lda next2_start, x
|
|
||||||
sta <next, x
|
|
||||||
dex
|
|
||||||
bpl -
|
|
||||||
|
|
||||||
jsr InputLoop
|
|
||||||
|
|
||||||
bit KBD
|
|
||||||
bmi start
|
|
||||||
|
|
||||||
; phase 2 - in order, without additional masking
|
|
||||||
jsr copytozp
|
|
||||||
|
|
||||||
; redirect additional masking pointers to an array that contains #$FFs (so no dithering)
|
|
||||||
lda #<no_masks
|
|
||||||
sta <evenrow_ptr
|
|
||||||
sta <oddrow_ptr
|
|
||||||
|
|
||||||
jmp InputLoop
|
|
||||||
|
|
||||||
copytozp
|
|
||||||
+COPY_TO_0 start, end
|
|
||||||
start
|
|
||||||
!pseudopc 0 {
|
|
||||||
Exit2Bit rts
|
|
||||||
evenrow_ptr
|
|
||||||
!word evenrow_masks
|
|
||||||
oddrow_ptr
|
|
||||||
!word oddrow_masks
|
|
||||||
InputLoop
|
|
||||||
ldy #0
|
|
||||||
input=*+1
|
|
||||||
ldx .coords ; first value: HGR row + 1
|
|
||||||
beq Exit2Bit ; if 0 then we're done
|
|
||||||
+ROW_X_TO_2BIT_BASE_ADDRESSES src1, src2, dest1, dest2
|
|
||||||
|
|
||||||
iny
|
|
||||||
lda (<input), y
|
|
||||||
+HIGH_3_LOW_5 input
|
|
||||||
|
|
||||||
; main 2x2 block in left half
|
|
||||||
src1=*+1
|
|
||||||
lda $FDFD, y
|
|
||||||
eor (<dest1), y
|
|
||||||
and copymasks2bit, x
|
|
||||||
and (<evenrow_ptr), y
|
|
||||||
eor (<dest1), y
|
|
||||||
dest1=*+1
|
|
||||||
sta $FDFD, y
|
|
||||||
src2=*+1
|
|
||||||
lda $FDFD, y
|
|
||||||
eor (<dest2), y
|
|
||||||
and copymasks2bit, x
|
|
||||||
and (<oddrow_ptr), y
|
|
||||||
eor (<dest2), y
|
|
||||||
dest2=*+1
|
|
||||||
sta $FDFD, y
|
|
||||||
|
|
||||||
; corresponding 2x2 block in right half (same row, opposite column)
|
|
||||||
lda mirror_cols, y
|
|
||||||
tay
|
|
||||||
lda (src1), y
|
|
||||||
eor (dest1), y
|
|
||||||
and mirror_copymasks2bit, x
|
|
||||||
and (<evenrow_ptr), y
|
|
||||||
eor (dest1), y
|
|
||||||
sta (dest1), y
|
|
||||||
|
|
||||||
lda (src2), y
|
|
||||||
eor (dest2), y
|
|
||||||
and mirror_copymasks2bit, x
|
|
||||||
and (<oddrow_ptr), y
|
|
||||||
eor (dest2), y
|
|
||||||
sta (dest2), y
|
|
||||||
|
|
||||||
next
|
|
||||||
inc <input
|
|
||||||
inc <input
|
|
||||||
bne InputLoop
|
|
||||||
bit KBD
|
|
||||||
bmi Exit2Bit
|
|
||||||
inc <input+1
|
|
||||||
bne InputLoop ; always branches
|
|
||||||
}
|
|
||||||
end
|
|
||||||
|
|
||||||
next2_start
|
|
||||||
!pseudopc next {
|
|
||||||
lda <input
|
|
||||||
php
|
|
||||||
dec <input
|
|
||||||
dec <input
|
|
||||||
plp
|
|
||||||
bne InputLoop
|
|
||||||
dec <input+1
|
|
||||||
bit KBD
|
|
||||||
bpl InputLoop
|
|
||||||
rts
|
|
||||||
}
|
|
||||||
next2_end
|
|
||||||
}
|
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15890352
|
!be24 15886779
|
||||||
!le16 5130
|
!le16 5130
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15835010
|
!be24 15831437
|
||||||
!le16 5732
|
!le16 5732
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15766777
|
!be24 15763204
|
||||||
!le16 4194
|
!le16 4194
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15781491
|
!be24 15777918
|
||||||
!le16 4652
|
!le16 4652
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15800206
|
!be24 15796633
|
||||||
!le16 5621
|
!le16 5621
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15821247
|
!be24 15817674
|
||||||
!le16 6199
|
!le16 6199
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15895482
|
!be24 15891909
|
||||||
!le16 410
|
!le16 410
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15896236
|
!be24 15892663
|
||||||
!le16 449
|
!le16 449
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15896685
|
!be24 15893112
|
||||||
!le16 303
|
!le16 303
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 12662995
|
!be24 12659422
|
||||||
!le16 1652
|
!le16 1652
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15843382
|
!be24 15839809
|
||||||
!le16 1640
|
!le16 1640
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15895968
|
!be24 15892395
|
||||||
!le16 67
|
!le16 67
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15890293
|
!be24 15886720
|
||||||
!le16 59
|
!le16 59
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15888713
|
!be24 15885140
|
||||||
!le16 1426
|
!le16 1426
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15873479
|
!be24 15869906
|
||||||
!le16 557
|
!le16 557
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15840742
|
!be24 15837169
|
||||||
!le16 2640
|
!le16 2640
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15845380
|
!be24 15841807
|
||||||
!le16 473
|
!le16 473
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15845853
|
!be24 15842280
|
||||||
!le16 7564
|
!le16 7564
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15895892
|
!be24 15892319
|
||||||
!le16 76
|
!le16 76
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15890139
|
!be24 15886566
|
||||||
!le16 154
|
!le16 154
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15896035
|
!be24 15892462
|
||||||
!le16 201
|
!le16 201
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15874036
|
!be24 15870463
|
||||||
!le16 4334
|
!le16 4334
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15878370
|
!be24 15874797
|
||||||
!le16 1733
|
!le16 1733
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15880103
|
!be24 15876530
|
||||||
!le16 1181
|
!le16 1181
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15881284
|
!be24 15877711
|
||||||
!le16 3394
|
!le16 3394
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15884678
|
!be24 15881105
|
||||||
!le16 3429
|
!le16 3429
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15888107
|
!be24 15884534
|
||||||
!le16 479
|
!le16 479
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15888586
|
!be24 15885013
|
||||||
!le16 127
|
!le16 127
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15896988
|
!be24 15893415
|
||||||
!le16 2370
|
!le16 2370
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15858822
|
!be24 15855249
|
||||||
!le16 5083
|
!le16 5083
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15863905
|
!be24 15860332
|
||||||
!le16 2485
|
!le16 2485
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15827446
|
!be24 15823873
|
||||||
!le16 7564
|
!le16 7564
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15757194
|
!be24 15753621
|
||||||
!le16 9583
|
!le16 9583
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15770971
|
!be24 15767398
|
||||||
!le16 10520
|
!le16 10520
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15786143
|
!be24 15782570
|
||||||
!le16 14063
|
!le16 14063
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15805827
|
!be24 15802254
|
||||||
!le16 15420
|
!le16 15420
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15845022
|
!be24 15841449
|
||||||
!le16 358
|
!le16 358
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15853417
|
!be24 15849844
|
||||||
!le16 5405
|
!le16 5405
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15866390
|
!be24 15862817
|
||||||
!le16 7089
|
!le16 7089
|
||||||
|
@ -4,5 +4,5 @@
|
|||||||
; This file is automatically generated
|
; This file is automatically generated
|
||||||
;
|
;
|
||||||
!byte 0
|
!byte 0
|
||||||
!be24 15752846
|
!be24 15749273
|
||||||
!le16 4348
|
!le16 4348
|
||||||
|
Loading…
x
Reference in New Issue
Block a user