mirror of
https://github.com/a2-4am/4cade.git
synced 2024-11-17 20:06:03 +00:00
IIc+ compatibility: after writing to LC, bank in again to flush values
This commit is contained in:
parent
d6fe1ce5db
commit
8fe02f92fc
@ -24,10 +24,10 @@
|
||||
sta $D45D
|
||||
sta $D5A3
|
||||
+
|
||||
bit $C083
|
||||
+LC_REBOOT
|
||||
+READ_RAM2_WRITE_RAM2
|
||||
jsr DisableAccelerator
|
||||
bit $C08B
|
||||
+READ_RAM1_WRITE_RAM1
|
||||
jmp $D400
|
||||
|
||||
callback1
|
||||
|
@ -16,6 +16,7 @@
|
||||
|
||||
callback
|
||||
+LC_REBOOT
|
||||
+READ_RAM2_WRITE_RAM2
|
||||
jsr DisableAccelerator
|
||||
jmp $21CD
|
||||
|
||||
|
@ -22,10 +22,9 @@
|
||||
lda #$2C
|
||||
sta $AF1D ; patch - don't decrease hit-points
|
||||
+
|
||||
bit $C083
|
||||
+LC_REBOOT
|
||||
+READ_RAM2_WRITE_RAM2
|
||||
jsr DisableAccelerator
|
||||
bit $C08B
|
||||
+READ_RAM1_WRITE_RAM1
|
||||
jmp $1953
|
||||
|
||||
!if * > $1C0 {
|
||||
|
2
src/prelaunch/thunderbombs.a → src/prelaunch/thunder.bombs.a
Executable file → Normal file
2
src/prelaunch/thunderbombs.a → src/prelaunch/thunder.bombs.a
Executable file → Normal file
@ -2,7 +2,7 @@
|
||||
;(c) 2019 by Frank M.
|
||||
|
||||
!cpu 6502
|
||||
!to "build/PRELAUNCH/THUNDERBOMBS",plain
|
||||
!to "build/PRELAUNCH/THUNDER.BOMBS",plain
|
||||
*=$106
|
||||
|
||||
!source "src/prelaunch/common.a"
|
@ -16,6 +16,7 @@
|
||||
|
||||
callback
|
||||
+LC_REBOOT
|
||||
+READ_RAM2_WRITE_RAM2
|
||||
lda MachineStatus
|
||||
and #CHEATS_ENABLED
|
||||
beq +
|
||||
|
Loading…
Reference in New Issue
Block a user