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some progress on IIc support

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This commit is contained in:
Peter Ferrie 2019-11-19 21:55:33 -08:00
parent 245ef92dd0
commit 938b69ae7a
23 changed files with 63 additions and 47 deletions
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8
src/4cade.a
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@ -81,6 +81,8 @@ ResetVector ; 6 bytes, copied to $100
+READ_RAM1_NO_WRITE
jmp Reenter
Ignore rti ; discard IRQs, particular on the IIc
; these routines will only be called after relocating to language card
!source "src/ui.search.mode.a" ; \__ execution falls through
!source "src/ui.animation.a" ; /
@ -130,8 +132,8 @@ SwitchToBank2
; 7 6 5 4 3 2 1 0
; | | | | | | | +- bit 0 reserved
; | | | | | | +--- bit 1 reserved
; | | | | | +----- bit 2 reserved
; | | | | +------- bit 3 = 1 if cheats are enabled
; | | | | | +----- bit 2 = 1 if cheats are enabled
; | | | | +------- bit 3 = 1 if IIc
; | | | +--------- bit 4 = 1 if IIgs
; | | +----------- bit 5 = 1 if VidHD
; | +------------- bit 6 = 1 if 128K
@ -140,7 +142,7 @@ SwitchToBank2
!byte $FD ; MachineStatus ($FFF9)
!word Reenter ; NMI vector ($FFFA-B)
!word Reenter ; reset vector ($FFFC-D)
!word Reenter ; IRQ vector ($FFFE-F)
!word Ignore ; IRQ vector ($FFFE-F)
}
LastMover
!if ((hdddataend & 255) > $ec) and ((hdddataend & 255) < $f0) {

11
src/4cade.init.a
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@ -32,7 +32,11 @@
sta zpMachineStatus
lda ROM_MACHINEID
cmp #$06
bne NotGS
bne @NotIIc
lda $FBC0
beq @IsIIc
@NotIIc clc
@IsIIc ror zpMachineStatus
sec
jsr $FE1F ; check for IIgs (allows super hi-res artwork)
bcs NotGS
@ -48,11 +52,12 @@ NotGS clc
jsr Has128K ; check for 128K (allows DHGR slideshows and 128K games)
ror zpMachineStatus
jsr HasJoystick ; check for joystick (absence is OK but we filter out some games that require a joystick)
ror zpMachineStatus ; now bit 4 = 1 if IIgs
ror zpMachineStatus ; now bit 3 = 1 if IIc
; bit 4 = 1 if IIgs
; bit 5 = 1 if VidHD
; bit 6 = 1 if 128K
; bit 7 = 1 if joystick
; and all other bits are 0 (we'll set bit 3 after copying it to LC RAM)
; and all other bits are 0 (we'll set bit 2 after copying it to LC RAM)
lda ROM_MACHINEID
cmp #$06

3
src/constants.a
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@ -117,4 +117,5 @@ EnableAccelerator = DisableAccelerator+3
; AND masks for MachineStatus
SUPPORTS_SHR = %00110000
CHEATS_ENABLED = %00001000
IS_IIC = %00001000
CHEATS_ENABLED = %00000100

1
src/fx/fx.hgr.1bit.fizzle.a
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@ -5,7 +5,6 @@
!to "build/FX/BIT.FIZZLE",plain
*=$6000
tmp=$fd
copymask=$ff
;init RNG

2
src/fx/fx.hgr.arrow.a
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@ -64,7 +64,7 @@ RowLoop
dec col
dec counter
+LBNE ColLoop
@exit rts
@exit jmp UnwaitForVBL
copymasks1
!byte %11111111

2
src/fx/fx.hgr.arrow.white.a
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@ -153,7 +153,7 @@ NextRow
dec col
dec counter
+LBNE ColLoop
@exit rts
@exit jmp UnwaitForVBL
copymasks1
!byte %11111111

5
src/fx/fx.hgr.cascade.a
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@ -74,6 +74,8 @@ maxline
lda $c000
bpl ---
done jmp UnwaitForVBL
vposn txa
pha
and #$c0
@ -96,7 +98,6 @@ vposn txa
and #$1f
ora $e6
sta $27
done rts
rts
!source "src/fx/hw.vbl.a"

5
src/fx/fx.hgr.center.by.pixel.a
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@ -8,10 +8,9 @@
copymask1 = $f2
copymask2 = $f3
skipcounter = $f7
counter = $f8
top = $f9
bottom = $fa
tmp = $fb
counter = $fb
maskindex = $fc
row = $fd
col1 = $fe
@ -102,7 +101,7 @@ SkipTopAndBottom
inc col1
dec col2
+LBNE ColLoop
Exit rts
Exit jmp UnwaitForVBL
copymasks1
!byte %11111111

2
src/fx/fx.hgr.diagonal.a
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@ -45,7 +45,7 @@ counter = $ff
dec col
dec counter
bne @colloop
@exit rts
@exit jmp UnwaitForVBL
copymasks
!byte %11111111

2
src/fx/fx.hgr.diagonal2.a
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@ -46,7 +46,7 @@ counter = $ff
inc col
dec counter
bne @colloop
@exit rts
@exit jmp UnwaitForVBL
copymasks
!byte %11111111

2
src/fx/fx.hgr.diagonal4.a
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@ -47,7 +47,7 @@ counter = $ff
dec col
dec counter
bne @colloop
@exit rts
@exit jmp UnwaitForVBL
copymasks
!byte %10000000

2
src/fx/fx.hgr.diamond.a
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@ -104,7 +104,7 @@ counter = $ff
dec counter
beq @exit
jmp @colloop
@exit rts
@exit jmp UnwaitForVBL
copymasks1
!byte %11111111

2
src/fx/fx.hgr.lattice.a
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@ -75,7 +75,7 @@ NextCol
bmi Exit
dec maskindex
+LBPL MaskLoop
Exit rts
Exit jmp UnwaitForVBL
even_maskslo
!byte <copymask_even6

2
src/fx/fx.hgr.lr.by.pixel.a
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@ -103,7 +103,7 @@ col = $ff
lda col
cmp #40
bne @colloop
@exit rts
@exit jmp UnwaitForVBL
clearmasks
!byte $80,$81,$83,$87,$8F,$9F,$BF
copymasks

3
src/fx/fx.hgr.meet.in.the.middle.a
View File

@ -5,7 +5,6 @@
!to "build/FX/MEETINTHEMIDDLE",plain
*=$6000
tmp = $fb
maskindex = $fc
row = $fd
col1 = $fe
@ -74,7 +73,7 @@ col2 = $ff
lda col1
cmp #20
bne @colloop
@exit rts
@exit jmp UnwaitForVBL
copymasks1
!byte %11111111
!byte %10111111

5
src/fx/fx.hgr.r.by.2.a
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@ -5,7 +5,6 @@
!to "build/FX/R.BY.2",plain
*=$6000
tmp = $fc
maskindex = $fd
row = $fe
col = $ff
@ -65,7 +64,7 @@ NextRow
cmp #40
+LBNE ColLoop
beq Phase2
Exit rts
Exit jmp UnwaitForVBL
Phase2
lda #0
@ -98,7 +97,7 @@ RowLoop2
lda col
cmp #40
+LBNE ColLoop2
Exit2 rts
Exit2 jmp UnwaitForVBL
copymask_even
!byte %11001100

5
src/fx/fx.hgr.r.by.palette.a
View File

@ -5,7 +5,6 @@
!to "build/FX/R.BY.PALETTE",plain
*=$6000
tmp = $fc
maskindex = $fd
row = $fe
col = $ff
@ -65,7 +64,7 @@ NextRow
cmp #40
+LBNE ColLoop
beq Phase2
Exit rts
Exit jmp UnwaitForVBL
Phase2
lda #0
@ -98,7 +97,7 @@ RowLoop2
lda col
cmp #40
+LBNE ColLoop2
Exit2 rts
Exit2 jmp UnwaitForVBL
copymask_even
!byte %11010101

3
src/fx/fx.hgr.r.by.pixel.a
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@ -5,7 +5,6 @@
!to "build/FX/R.BY.PIXEL",plain
*=$6000
tmp = $fc
maskindex = $fd
row = $fe
col = $ff
@ -56,7 +55,7 @@ col = $ff
lda col
cmp #40
bne @colloop
@exit rts
@exit jmp UnwaitForVBL
copymasks
!byte $FF,$BF,$9F,$8F,$87,$83,$81

3
src/fx/fx.hgr.soft.ud.a
View File

@ -5,7 +5,6 @@
!to "build/FX/SOFT.UD",plain
*=$6000
tmp = $fb
maskindex = $fc
row = $fd
@ -81,7 +80,7 @@ row = $fd
cmp #24
bcc @rowloop
@exit rts
@exit jmp UnwaitForVBL
masks
!byte %10000000

3
src/fx/fx.hgr.soft.ud.in.a
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@ -5,7 +5,6 @@
!to "build/FX/SOFT.UD.IN",plain
*=$6000
tmp = $fb
maskindex = $fc
row = $fd
@ -48,7 +47,7 @@ row = $fd
cmp #12
bcc @rowloop
@exit rts
@exit jmp UnwaitForVBL
do
asl

3
src/fx/fx.hgr.soft.ud.out.a
View File

@ -5,7 +5,6 @@
!to "build/FX/SOFT.UD.OUT",plain
*=$6000
tmp = $fb
maskindex = $fc
row = $fd
@ -50,7 +49,7 @@ row = $fd
cmp #12
bcc @rowloop
@exit rts
@exit jmp UnwaitForVBL
do
asl

2
src/fx/fx.hgr.split.ud.intro.a
View File

@ -119,7 +119,7 @@ row2 = $FF
cmp #$FE
beq @exit
jmp @outerloop
@exit rts
@exit jmp UnwaitForVBL
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"

34
src/fx/hw.vbl.a
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@ -6,25 +6,27 @@
;
!source "src/fx/macros.a"
!source "src/constants.a"
WaitForVBL
bit $FDFD
bit $FDFD ; SMC
pha
tya
pha
+READ_ROM_NO_WRITE
lda $FBB3
+READ_RAM1_WRITE_RAM1
cmp #$06
bne @nop
lda $FBC0
beq @iic
lda MachineStatus
and #IS_IIC
bne @iic
+LDADDR WaitForVBL_iie
bne +
@iic
sta $C07F ; enable access to VBL register
sta $C05B ; enable VBL polling
sta $C07E ; disable access to VBL register
lda #$EA
sta UnwaitForVBL
+LDADDR WaitForVBL_iic
bne +
@nop
@ -36,7 +38,6 @@ WaitForVBL
lda #$4C ; JMP opcode
sta WaitForVBL
+READ_RAM1_WRITE_RAM1
pla
tay
pla
@ -53,7 +54,22 @@ WaitForVBL_iie ; IIe/IIgs have a relatively sane VBL
rts
WaitForVBL_iic ; IIc is special
- bit $c019
sei
sta $C07F ; enable access to VBL register
sta $C05B ; enable VBL polling
sta $C07E ; disable access to VBL register
- bit $C019
bpl -
bit $c070 ;$c019 bit 7 is sticky, reset it
lda $C070 ; $c019 bit 7 is sticky, reset it
rts
UnwaitForVBL
rts ; SMC on IIc
- bit $C019
bpl -
lda $C070 ; $c019 bit 7 is sticky, reset it
sta $C07F ; enable access to VBL register
sta $C05A ; enable VBL polling
sta $C07E ; disable access to VBL register
cli
rts