shave some bytes

This commit is contained in:
4am 2021-12-12 22:13:46 -05:00
parent 3e27200935
commit 93e0b82214
7 changed files with 27 additions and 31 deletions

View File

@ -5,24 +5,22 @@
!to "build/DGR.FIZZLE",plain !to "build/DGR.FIZZLE",plain
*=$6000 *=$6000
ldx #(end-start) ; copy LFSR code to zero page ldx #(end-start+1) ; copy LFSR code to zero page
- ldy start-1, x - ldy start-2, x
sty $FF, x sty $81, x
dex dex
bne - bne -
jmp loop jmp loop
start start
!pseudopc 0 { !pseudopc $83 {
!byte 0
;X=0 ;X=0
;Y=0 ;Y=0
loop txa loop txa
loop1 eor #$05 ; LFSR form 0x0500 with period 2047 loop1 eor #$05 ; LFSR form 0x0500 with period 2047
ldx #$80 wait inx
wait dex bpl wait
bne wait
tax tax
loop2 tya loop2 tya
and #$78 and #$78
@ -31,13 +29,14 @@ loop2 tya
txa txa
ora #$04 ora #$04
sta <dst+2 sta <dst+2
lda <addrs, x txa
bmi aux ;C=0
adc #$7C
bpl aux
sta $C004 sta $C004
bpl + ; always branches !byte $24
aux and #$7F aux sta $C005
sta $C005 setsrc sta <src+2
+ sta <src+2
src lda $FD00, y ; SMC high byte src lda $FD00, y ; SMC high byte
dst sta $FD00, y ; SMC high byte dst sta $FD00, y ; SMC high byte
next txa next txa
@ -52,14 +51,12 @@ next txa
bmi exit bmi exit
txa txa
bne loop1 bne loop1
exit lda $4400 ; last lousy byte (because LFSR never hits 0) exit lda $7C00 ; last lousy byte (because LFSR never hits 0)
!if *+1 != $C0 {
!error *
}
sta $0400 sta $0400
sta $C004 sta $C004
rts rts
; source data is at $4000-$47FF/main
; $4000-$43FF/main -> $0400-$07FF/aux
; $4400-$47FF/main -> $0400-$07FF/main
addrs
!byte $44,$45,$46,$47,$C0,$C1,$C2,$C3
} }
end end

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@ -4,5 +4,5 @@
; This file is automatically generated ; This file is automatically generated
; ;
!byte 0 !byte 0
!be24 10956340 !be24 10956327
!le16 448 !le16 448

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@ -4,5 +4,5 @@
; This file is automatically generated ; This file is automatically generated
; ;
!byte 0 !byte 0
!be24 10956788 !be24 10956775
!le16 303 !le16 303

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@ -5,4 +5,4 @@
; ;
!byte 0 !byte 0
!be24 10956046 !be24 10956046
!le16 93 !le16 80

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@ -4,5 +4,5 @@
; This file is automatically generated ; This file is automatically generated
; ;
!byte 0 !byte 0
!be24 10956139 !be24 10956126
!le16 201 !le16 201

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@ -4,5 +4,5 @@
; This file is automatically generated ; This file is automatically generated
; ;
!byte 0 !byte 0
!be24 10957091 !be24 10957078
!le16 2370 !le16 2370

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@ -106,8 +106,8 @@ BlankDGR
LoadIndexedDGRFile LoadIndexedDGRFile
; in: caller has set IndexedDGRFilename ; in: caller has set IndexedDGRFilename
; out: all flags & registers clobbered ; out: all flags & registers clobbered
jsr LoadIndexedFile ; load index file into $4A00 jsr LoadIndexedFile ; load index file into $4000
- !word $4A00 - !word $4000
!word kDGRActionIndexRecord !word kDGRActionIndexRecord
jsr okvs_find jsr okvs_find
@ -116,10 +116,9 @@ IndexedDGRFilename
!word $FDFD ; SMC !word $FDFD ; SMC
+ST16 @indexRecordPtr +ST16 @indexRecordPtr
jsr LoadIndexedFile ; load entire DGR screenshot at $4000..$47FF jsr LoadIndexedFile ; load entire DGR screenshot at $7C00
!word $4000 ; because that's where the transition code expects to find it !word $7C00 ; because that's where the transition code expects to find it
; auxmem half is first ($4000..$43FF) ; auxmem half is first, mainmem second
; mainmem half is second ($4400..$47FF)
@indexRecordPtr @indexRecordPtr
!word $FDFD ; SMC !word $FDFD ; SMC
rts rts