4cade/src/fx/fx.dhgr.fizzle.a

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;license:MIT
;(c) 2017-2020 by qkumba/4am/John Brooks
;
!cpu 6502
!to "build/FX.INDEXED/DHGR.FIZZLE",plain
*=$6000
addrs=$C0 ; [$40 bytes]
ldx #$1F ; build address lookup table
- txa
eor #$20
sta addrs, x
eor #$A0
sta addrs+$20, x
dex
bpl -
ldx #(end-start) ; copy LFSR code to zero page
- lda start-1, x
sta $FF, x
dex
bne -
jmp copyaux
start
!pseudopc 0 {
copyaux sta $C003 ; copy $4000/aux to $8000/main
ldx #$20
ldy #$00
a lda $4000, y
b sta $8000, y
iny
bne a
inc a+2
inc b+2
dex
bne a
sta $C002
sta $C001 ; 80STORE mode
; X,Y=0 on entry to LFSR
; in: X,Y=0
loop txa
loop1 eor #$35 ; LFSR form 0x3500 with period 16383
tax
loop2 lda addrs, x
bmi aux
sta $C054 ; switch $2000 access to main memory
sta <dst+2
eor #$60
sta <src+2
src lda $FD00, y
dst sta $FD00, y
txa
lsr
tax
tya
ror
tay
bcc loop2
bne loop
bit $C000
bmi exit
txa
bne loop1
exit lda $4000 ; last lousy byte (because LFSR never hits 0)
sta $2000
sta $C000 ; 80STORE mode off
rts
aux sta $C055 ; switch $2000 access to aux memory (read/write!)
sta <auxsrc+2
eor #$A0
sta <auxdst+2
auxsrc lda $FD00, y
auxdst sta $FD00, y
txa
lsr
tax
tya
ror
tay
bcc loop2
bne loop
lda $C000
bmi exit
txa
bne loop1
beq exit
}
end