mirror of
https://github.com/a2-4am/4cade.git
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87 lines
1.9 KiB
Plaintext
87 lines
1.9 KiB
Plaintext
DHGR.FIZZLE2BIT
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DHGR.RIPPLE
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DHGR.SOFT.DIAG
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DHGR.48BOXES
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DHGR.BUBBLES
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DHGR.RADIAL
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DHGR.SOFT.IRIS
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DHGR.WAVY.RIP
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DHGR.48.SNAKE
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DHGR.SNOWFL.IN
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DHGR.MAPLE
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DHGR.SLOW.STAR
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DHGR.48.SNAKEC
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DHGR.HEART.RIP
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DHGR.CORNER4
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DHGR.STAR.IN
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DHGR.48.ARROW
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DHGR.REDLINES
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DHGR.BUTTERFLY
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DHGR.BLOOM.IN
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DHGR.48.SYNCC
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DHGR.RADIAL4
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DHGR.TWOPASS.LR
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DHGR.WAVY.IN
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DHGR.CORNER4RIP
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DHGR.STAR
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DHGR.48.LDIAGON
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DHGR.MAPLE.IN
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DHGR.BAR.DISSLV
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DHGR.BLOOM
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DHGR.SLOW.STARI
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DHGR.HEART
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DHGR.48.2SNAKES
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DHGR.RADIAL3
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DHGR.STAR.RIP
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DHGR.BFLY.IN
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DHGR.DIAGONAL
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DHGR.SNOWFLAKE
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DHGR.48.DOWN
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DHGR.SOFTIRISIN
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DHGR.RADIAL2
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DHGR.IRIS
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DHGR.BUBBLES.IN
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DHGR.SLOWST.RIP
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DHGR.48.SPIRAL
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DHGR.RADIAL5
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DHGR.FIZZLE
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DHGR.48.PAGEC
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DHGR.BFLY.RIP
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DHGR.IRIS.IN
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DHGR.SWIRL
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DHGR.48.SPIRALC
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DHGR.MAPLE.RIP
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DHGR.R.BY.PIXEL
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DHGR.HEART.IN
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DHGR.SNOWFL.RIP
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DHGR.48.SIDES
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DHGR.CORNER4.IN
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DHGR.WAVY.IRIS
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DHGR.BLOOM.RIP
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DHGR.48.SYNC
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DHGR.FLICK
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[eof]
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#
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# transition effects for DHGR slideshows
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#
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# Each Mega-Attract Module that is a DHGR slideshow (see attract.conf)
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# will use a single transition effect for the length of the module.
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# Transition effects are loaded in the order listed in this file. Each line
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# of this file is a filename (not including comments, like this one). The
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# name of the next transition effect is stored in the global prefs, so this
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# file should not contain duplicates.
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#
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# Transition effects are binary files loaded at $6000 and called with main
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# memory banked in, DHGR page 1 showing, and the next DHGR graphic already
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# loaded at $4000/main and $4000/aux. A transition effect has full use of
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# auxiliary memory, zero pages (both), text pages (both, but preserve screen
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# holes), and main memory $6000-$BEFF. $BF00-$BFFF/main is reserved for the
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# ProDOS shim. LC RAM banks 1 and 2 are reserved for the launcher.
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#
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# Important: LC RAM bank 1 will be read/write on entry and must be read/write
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# on exit. If you need ROM routines, you are responsible for switching to ROM
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# then switching back to RAM bank 1 (read/write) before returning.
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#
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