4cade/src/fx/hw.vbl.a
2019-10-24 14:03:17 -07:00

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;license:MIT
;(c) 2019 by 4am
;
; Public functions:
; - WaitForVBL
;
!source "src/fx/macros.a"
WaitForVBL
bit $FDFD
pha
tya
pha
+READ_ROM_NO_WRITE
lda $FBB3
cmp #$06
bne @nop
lda $FBC0
beq @iic
+LDADDR WaitForVBL_iie
bne +
@iic
sta $C07F ; enable access to VBL register
sta $C05B ; enable VBL polling
sta $C07E ; disable access to VBL register
+LDADDR WaitForVBL_iic
bne +
@nop
+LDADDR WaitForVBL_nop
bne + ; always branches
+
+STAY WaitForVBL+1
lda #$4C ; JMP opcode
sta WaitForVBL
+READ_RAM1_WRITE_RAM1
pla
tay
pla
jmp WaitForVBL
WaitForVBL_nop ; II/II+ have no easy VBL
rts
WaitForVBL_iie ; IIe/IIgs have a relatively sane VBL
- bit $c019
bpl -
- bit $c019
bmi -
rts
WaitForVBL_iic ; IIc is special
- bit $c019
bpl -
bit $c070 ;$c019 bit 7 is sticky, reset it
rts