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Full-speed: only do interrupt checking every 40 opcodes & simplify CYC macro (#651)

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tomcw 2019-06-02 14:30:54 +01:00
parent 98a733ba73
commit 1f2dc6ee8a
2 changed files with 15 additions and 12 deletions
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25
source/CPU.cpp
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@ -130,12 +130,7 @@ regsrec regs;
unsigned __int64 g_nCumulativeCycles = 0;
static ULONG g_nCyclesExecuted; // # of cycles executed up to last IO access
//static signed long g_uInternalExecutedCycles;
// Use IRQ_CHECK_TIMEOUT=128 when running at full-speed; else use IRQ_CHECK_TIMEOUT=1 (GH#651)
static const int IRQ_CHECK_TIMEOUT_FULL_SPEED = 128;
static const int IRQ_CHECK_TIMEOUT_NORMAL_SPEED = 1;
static signed int g_nIrqCheckTimeout = IRQ_CHECK_TIMEOUT_NORMAL_SPEED;
//
@ -417,21 +412,29 @@ static __forceinline void IRQ(ULONG& uExecutedCycles, BOOL& flagc, BOOL& flagn,
}
}
const int IRQ_CHECK_OPCODE_FULL_SPEED = 40; // ~128 cycles (assume 3 cycles per opcode)
static int g_fullSpeedOpcodeCount = IRQ_CHECK_OPCODE_FULL_SPEED;
static __forceinline void CheckInterruptSources(ULONG uExecutedCycles, const bool bVideoUpdate)
{
if (g_nIrqCheckTimeout < 0)
if (!bVideoUpdate)
{
MB_UpdateCycles(uExecutedCycles);
sg_Mouse.SetVBlank( !VideoGetVblBar(uExecutedCycles) );
g_nIrqCheckTimeout = bVideoUpdate ? IRQ_CHECK_TIMEOUT_NORMAL_SPEED : IRQ_CHECK_TIMEOUT_FULL_SPEED;
g_fullSpeedOpcodeCount--;
if (g_fullSpeedOpcodeCount >= 0)
return;
g_fullSpeedOpcodeCount = IRQ_CHECK_OPCODE_FULL_SPEED;
}
MB_UpdateCycles(uExecutedCycles);
sg_Mouse.SetVBlank( !VideoGetVblBar(uExecutedCycles) );
}
// GH#608: IRQ needs to occur within 17 cycles (6 opcodes) of configuring the timer interrupt
void CpuAdjustIrqCheck(UINT uCyclesUntilInterrupt)
{
if (g_bFullSpeed && uCyclesUntilInterrupt < IRQ_CHECK_TIMEOUT_FULL_SPEED)
g_nIrqCheckTimeout = uCyclesUntilInterrupt;
const UINT opcodesUntilInterrupt = uCyclesUntilInterrupt/3; // assume 3 cycles per opcode
if (g_bFullSpeed && opcodesUntilInterrupt < IRQ_CHECK_OPCODE_FULL_SPEED)
g_fullSpeedOpcodeCount = opcodesUntilInterrupt;
}
//===========================================================================

2
source/CPU/cpu_general.inl
View File

@ -49,7 +49,7 @@ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
| (flagz ? AF_ZERO : 0) \
| AF_RESERVED | AF_BREAK;
// CYC(a): This can be optimised, as only certain opcodes will affect uExtraCycles
#define CYC(a) uExecutedCycles += (a)+uExtraCycles; g_nIrqCheckTimeout -= (a)+uExtraCycles;
#define CYC(a) uExecutedCycles += (a)+uExtraCycles;
#define POP (*(mem+((regs.sp >= 0x1FF) ? (regs.sp = 0x100) : ++regs.sp)))
#define PUSH(a) *(mem+regs.sp--) = (a); \
if (regs.sp < 0x100) \