Serial-over-TCP: Receive wasn't setting the ASIC's Status register's interrupt bit. (Fix #308)

This commit is contained in:
tomcw 2017-12-19 21:35:04 +00:00
parent 792a79bb00
commit 7e38429766

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@ -401,6 +401,7 @@ void CSuperSerialCard::CommTcpSerialReceive()
if (m_bRxIrqEnabled && !m_qTcpSerialBuffer.empty())
{
CpuIrqAssert(IS_SSC);
m_vbRxIrqPending = true;
}
}
}