Commit Graph

17 Commits

Author SHA1 Message Date
tomcw
4377441c26 Fix 6502/65C02's D flag for BRK, IRQ, NMI and RESET. (Fixes #1099) 2023-01-02 21:41:31 +00:00
tomcw
fa18382757 Core emulation: simplify NMI & IRQ handling 2021-10-18 21:45:45 +01:00
TomCh
9553106f4e
Debugger: Add IRQ support to LBR and new command to Break on Interrupt (#987, PR #990)
Extend LBR so that it includes the control-flow on a taken interrupt
Add a new command 'brkint <0|1>' to support Break on Interrupt

Internal: in core emulation loop, moved IRQ/NMI check to start of loop so that just the "interrupt vectoring" case can be single-stepped (instead of previously opcode + interrupt vector).

Debugger help chm: update Breakpoints section to include BRK, BRKOP and BRKINT
2021-10-16 16:57:00 +01:00
TomCh
6125c2b12d
Support for synchronous events (PR #841)
Switched Mockingboard/6522 Timer interrupts & Mousecard's VBlank interrupt to use synchronous events.
This is a linked-list of ordered timer-based event, where only the head of the list needs updating after every opcode.
2020-10-11 16:08:05 +01:00
TomCh
ef913fe827
Removed 65d02 and used the regular 65c02/6502 headers instead (PR #825)
Removed 65d02.h and reconstructed this code using a combination of existing 6502.h/65c02.h and extra C Pre-Processor macros to include (or omit) the extra heatmap functionality.

We still end up with a normal 65c02 instance and also a debug 65c02 instance, but both will derive from the same 65c02.h file (+ same for the 6502 normal/debug instances).

Also:
. Added cpu_heatmap.inl for the built-in debugger's read/write operations.
. Support CpuRead/Write() from Z80 to hook the heatmap r/w.
2020-08-31 10:03:29 +01:00
tomcw
42d265a25c Fixed timing for 6502 opcodes: rol abs,x; lsr abs,x; ror abs,x. (Fixes #801) 2020-06-19 19:40:23 +01:00
tomcw
3a41061f83 Check interrupt sources after every opcode when in normal speed. (#651) 2019-06-01 16:54:58 +01:00
tomcw
3d6c10bad9 Debugger:
. Move the BRK and invalid opcodes checks out of main emulation's Fetch() and into DebugContinueStepping()
. Added a new break condition: when PC reads floating bus or I/O memory
. On a break condition, output a 'Stop Reason' message to the console
2017-03-07 21:35:38 +00:00
tomcw
0b6c5bbb91 Support for #384:
. Debug 'G(o)' cmd now defaults to normal speed (and precise video updates)
. New debug 'GG' cmd enables full speed (and periodic video updates)
. Single-stepping (normal or full speed) now routed through ContinueExecution()
. Removed Cpu6502()/Cpu65C02() check for debug breakpoints
. Removed the (undocumented) SHIFT+F7 feature to exit debugger for 'normal speed breakpoints'
. Removed the g_bDebugNormalSpeedBreakpoints variable
2017-02-25 22:32:46 +00:00
tomcw
002af587d4 Fix #372: do IRQ() before NTSC_VideoUpdateCycles() 2016-11-14 22:23:30 +00:00
tomcw
58671545bb Fix #366 (IRQ erroreously deducting extra cycles) 2016-10-22 19:50:35 +01:00
tomcw
04c9d09e38 When FullSpeed: don't do cycle-accurate graphics update
. means that disk accesses (eg. loading) is much quicker
Correct naming of video modes (in UI and code)
Pixel adjust for NTSC B&W and Color video modes to align with other video modes
2016-05-17 22:07:27 +01:00
tomcw
e98de27039 Manual merge from master @ c798157 2016-03-21 23:48:02 +00:00
michaelangel007
e98a0f5f7e Optimize rendering so it doesn't hog the CPU 2015-01-02 17:56:16 -08:00
michaelangel007
24ac8886c6 Cleanup: Global Func Pointer:
g_pNTSC_FuncVideoUpdate -> g_pFunc_NTSCVideoUpdateGraphics
 g_pNTSC_FuncVideoText -> g_pFunc_NTSCVideoUpdateText
2015-01-02 00:06:49 -08:00
michaelangel007
e116014742 First pass of NTSC integration 2014-12-31 14:13:36 -08:00
tomcw
d591dd006b Remove the top-level AppleWin folder 2014-05-23 22:59:02 +01:00