479 lines
9.2 KiB
C++
479 lines
9.2 KiB
C++
#include "stdafx.h"
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#include "../../source/Applewin.h"
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#include "../../source/CPU.h"
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// From Applewin.cpp
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eCPU g_ActiveCPU = CPU_6502;
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enum AppMode_e g_nAppMode = MODE_RUNNING;
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// From Memory.cpp
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LPBYTE memwrite[0x100]; // TODO: Init
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LPBYTE mem = NULL; // TODO: Init
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LPBYTE memdirty = NULL; // TODO: Init
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iofunction IORead[256] = {0}; // TODO: Init
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iofunction IOWrite[256] = {0}; // TODO: Init
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// From Debugger_Types.h
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enum AddressingMode_e // ADDRESSING_MODES_e
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{
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AM_IMPLIED // Note: SetDebugBreakOnInvalid() assumes this order of first 4 entries
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, AM_1 // Invalid 1 Byte
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, AM_2 // Invalid 2 Bytes
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, AM_3 // Invalid 3 Bytes
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};
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// From CPU.cpp
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#define AF_SIGN 0x80
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#define AF_OVERFLOW 0x40
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#define AF_RESERVED 0x20
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#define AF_BREAK 0x10
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#define AF_DECIMAL 0x08
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#define AF_INTERRUPT 0x04
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#define AF_ZERO 0x02
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#define AF_CARRY 0x01
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regsrec regs;
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static const int IRQ_CHECK_TIMEOUT = 128;
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static signed int g_nIrqCheckTimeout = IRQ_CHECK_TIMEOUT;
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static __forceinline int Fetch(BYTE& iOpcode, ULONG uExecutedCycles)
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{
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iOpcode = *(mem+regs.pc);
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regs.pc++;
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return 1;
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}
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#define INV IsDebugBreakOnInvalid(AM_1);
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inline int IsDebugBreakOnInvalid( int iOpcodeType )
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{
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return 0;
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}
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static __forceinline void DoIrqProfiling(DWORD uCycles)
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{
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}
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static __forceinline void CheckInterruptSources(ULONG uExecutedCycles)
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{
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}
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static __forceinline void NMI(ULONG& uExecutedCycles, UINT& uExtraCycles, BOOL& flagc, BOOL& flagn, BOOL& flagv, BOOL& flagz)
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{
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}
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static __forceinline void IRQ(ULONG& uExecutedCycles, UINT& uExtraCycles, BOOL& flagc, BOOL& flagn, BOOL& flagv, BOOL& flagz)
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{
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}
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void RequestDebugger()
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{
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}
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// From Debug.h
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inline int IsDebugBreakpointHit()
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{
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return 0;
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}
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// From Debug.cpp
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int g_bDebugBreakpointHit = 0;
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// From z80.cpp
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DWORD z80_mainloop(ULONG uTotalCycles, ULONG uExecutedCycles)
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{
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return 0;
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}
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//-------------------------------------
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#include "../../source/cpu/cpu_general.inl"
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#include "../../source/cpu/cpu_instructions.inl"
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#include "../../source/cpu/cpu6502.h" // MOS 6502
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#include "../../source/cpu/cpu65C02.h" // WDC 65C02
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void init(void)
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{
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//mem = new BYTE[64*1024];
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mem = (LPBYTE)VirtualAlloc(NULL,64*1024,MEM_COMMIT,PAGE_READWRITE);
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for (UINT i=0; i<256; i++)
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memwrite[i] = mem+i*256;
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memdirty = new BYTE[256];
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}
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void reset(void)
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{
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regs.a = 0;
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regs.x = 0;
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regs.y = 0;
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regs.pc = 0x300;
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regs.sp = 0x1FF;
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regs.ps = 0;
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regs.bJammed = 0;
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}
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//-------------------------------------
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int test_GH264(void)
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{
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reset();
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WORD abs = regs.pc+3;
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WORD dst = abs+2;
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mem[regs.pc+0] = 0x6c; // JMP (IND)
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mem[regs.pc+1] = abs&0xff;
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mem[regs.pc+2] = abs>>8;
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mem[regs.pc+3] = dst&0xff;
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mem[regs.pc+4] = dst>>8;
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DWORD cycles = Cpu6502(0);
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if (cycles != 5) return 1;
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if (regs.pc != dst) return 1;
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reset();
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cycles = Cpu65C02(0);
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if (cycles != 6) return 1;
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if (regs.pc != dst) return 1;
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return 0;
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}
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//-------------------------------------
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void ASL_ABSX(BYTE x, WORD base, BYTE d)
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{
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WORD addr = base+x;
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mem[addr] = d;
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reset();
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regs.x = x;
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mem[regs.pc+0] = 0x1e;
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mem[regs.pc+1] = base&0xff;
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mem[regs.pc+2] = base>>8;
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}
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void DEC_ABSX(BYTE x, WORD base, BYTE d)
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{
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WORD addr = base+x;
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mem[addr] = d;
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reset();
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regs.x = x;
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mem[regs.pc+0] = 0xde;
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mem[regs.pc+1] = base&0xff;
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mem[regs.pc+2] = base>>8;
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}
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void INC_ABSX(BYTE x, WORD base, BYTE d)
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{
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WORD addr = base+x;
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mem[addr] = d;
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reset();
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regs.x = x;
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mem[regs.pc+0] = 0xfe;
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mem[regs.pc+1] = base&0xff;
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mem[regs.pc+2] = base>>8;
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}
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int test_GH271(void)
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{
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// asl abs,x
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{
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const WORD base = 0x20ff;
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const BYTE d = 0x40;
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// no page-cross
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{
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const BYTE x = 0;
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ASL_ABSX(x, base, d);
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if (Cpu6502(0) != 7) return 1;
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if (mem[base+x] != ((d<<1)&0xff)) return 1;
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ASL_ABSX(x, base, d);
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if (Cpu65C02(0) != 6) return 1; // Non-PX case is optimised on 65C02
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if (mem[base+x] != ((d<<1)&0xff)) return 1;
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}
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// page-cross
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{
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const BYTE x = 1;
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ASL_ABSX(x, base, d);
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if (Cpu6502(0) != 7) return 1;
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if (mem[base+x] != ((d<<1)&0xff)) return 1;
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ASL_ABSX(x, base, d);
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if (Cpu65C02(0) != 7) return 1;
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if (mem[base+x] != ((d<<1)&0xff)) return 1;
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}
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}
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// dec abs,x
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{
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const WORD base = 0x20ff;
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const BYTE d = 0x40;
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// no page-cross
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{
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const BYTE x = 0;
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DEC_ABSX(x, base, d);
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if (Cpu6502(0) != 7) return 1;
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if (mem[base+x] != ((d-1)&0xff)) return 1;
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DEC_ABSX(x, base, d);
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if (Cpu65C02(0) != 7) return 1; // NB. Not optimised for 65C02
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if (mem[base+x] != ((d-1)&0xff)) return 1;
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}
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// page-cross
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{
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const BYTE x = 1;
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DEC_ABSX(x, base, d);
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if (Cpu6502(0) != 7) return 1;
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if (mem[base+x] != ((d-1)&0xff)) return 1;
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DEC_ABSX(x, base, d);
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if (Cpu65C02(0) != 7) return 1;
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if (mem[base+x] != ((d-1)&0xff)) return 1;
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}
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}
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// inc abs,x
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{
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const WORD base = 0x20ff;
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const BYTE d = 0x40;
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// no page-cross
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{
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const BYTE x = 0;
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INC_ABSX(x, base, d);
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if (Cpu6502(0) != 7) return 1;
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if (mem[base+x] != ((d+1)&0xff)) return 1;
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INC_ABSX(x, base, d);
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if (Cpu65C02(0) != 7) return 1; // NB. Not optimised for 65C02
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if (mem[base+x] != ((d+1)&0xff)) return 1;
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}
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// page-cross
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{
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const BYTE x = 1;
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INC_ABSX(x, base, d);
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if (Cpu6502(0) != 7) return 1;
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if (mem[base+x] != ((d+1)&0xff)) return 1;
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INC_ABSX(x, base, d);
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if (Cpu65C02(0) != 7) return 1;
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if (mem[base+x] != ((d+1)&0xff)) return 1;
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}
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}
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return 0;
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}
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//-------------------------------------
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DWORD AXA_ZPY(BYTE a, BYTE x, BYTE y, WORD base)
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{
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reset();
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mem[0xfe] = base&0xff;
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mem[0xff] = base>>8;
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regs.a = a;
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regs.x = x;
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regs.y = y;
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mem[regs.pc+0] = 0x93;
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mem[regs.pc+1] = 0xfe;
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return Cpu6502(0);
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}
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DWORD AXA_ABSY(BYTE a, BYTE x, BYTE y, WORD base)
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{
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reset();
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regs.a = a;
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regs.x = x;
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regs.y = y;
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mem[regs.pc+0] = 0x9f;
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mem[regs.pc+1] = base&0xff;
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mem[regs.pc+2] = base>>8;
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return Cpu6502(0);
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}
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DWORD SAY_ABSX(BYTE a, BYTE x, BYTE y, WORD base)
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{
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reset();
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regs.a = a;
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regs.x = x;
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regs.y = y;
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mem[regs.pc+0] = 0x9c;
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mem[regs.pc+1] = base&0xff;
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mem[regs.pc+2] = base>>8;
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return Cpu6502(0);
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}
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DWORD TAS_ABSY(BYTE a, BYTE x, BYTE y, WORD base)
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{
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reset();
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regs.a = a;
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regs.x = x;
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regs.y = y;
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mem[regs.pc+0] = 0x9b;
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mem[regs.pc+1] = base&0xff;
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mem[regs.pc+2] = base>>8;
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return Cpu6502(0);
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}
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DWORD XAS_ABSY(BYTE a, BYTE x, BYTE y, WORD base)
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{
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reset();
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regs.a = a;
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regs.x = x;
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regs.y = y;
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mem[regs.pc+0] = 0x9e;
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mem[regs.pc+1] = base&0xff;
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mem[regs.pc+2] = base>>8;
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return Cpu6502(0);
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}
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int test_GH282(void)
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{
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// axa (zp),y
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{
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WORD base = 0x20ff, addr = 0x20ff;
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mem[addr] = 0xcc;
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BYTE a = 0xea, x = 0xff, y = 0;
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DWORD cycles = AXA_ZPY(a, x, y, base);
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if (cycles != 6) return 1;
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if (mem[addr] != (a & x & ((base>>8)+1))) return 1;
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}
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// axa (zp),y (page-cross)
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{
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WORD base = 0x20ff, addr = 0x2000;
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mem[addr] = 0xcc;
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BYTE a = 0xea, x = 0xff, y = 1;
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DWORD cycles = AXA_ZPY(a, x, y, base);
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if (cycles != 6) return 1;
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if (mem[addr] != (a & x & ((base>>8)+1))) return 1;
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}
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//
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// axa abs,y
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{
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WORD base = 0x20ff, addr = 0x20ff;
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mem[addr] = 0xcc;
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BYTE a = 0xea, x = 0xff, y = 0;
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DWORD cycles = AXA_ABSY(a, x, y, base);
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if (cycles != 5) return 1;
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if (mem[addr] != (a & x & ((base>>8)+1))) return 1;
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}
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// axa abs,y (page-cross)
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{
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WORD base = 0x20ff, addr = 0x2000;
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mem[addr] = 0xcc;
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BYTE a = 0xea, x = 0xff, y = 1;
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DWORD cycles = AXA_ABSY(a, x, y, base);
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if (cycles != 5) return 1;
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if (mem[addr] != (a & x & ((base>>8)+1))) return 1;
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}
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//
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// say abs,x
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{
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WORD base = 0x20ff, addr = 0x20ff;
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mem[addr] = 0xcc;
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BYTE a = 0xea, x = 0, y=0x20;
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DWORD cycles = SAY_ABSX(a, x, y, base);
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if (cycles != 5) return 1;
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if (mem[addr] != (y & ((base>>8)+1))) return 1;
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}
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// say abs,x (page-cross)
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{
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WORD base = 0x20ff, addr = 0x2000;
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mem[addr] = 0xcc;
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BYTE a = 0xea, x = 1, y=0x20;
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DWORD cycles = SAY_ABSX(a, x, y, base);
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if (cycles != 5) return 1;
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if (mem[addr] != (y & ((base>>8)+1))) return 1;
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}
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//
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// tas abs,y
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{
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WORD base = 0x20ff, addr = 0x20ff;
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mem[addr] = 0xcc;
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BYTE a = 0xea, x = 0xff, y = 0;
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DWORD cycles = TAS_ABSY(a, x, y, base);
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if (cycles != 5) return 1;
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if (mem[addr] != (a & x & ((base>>8)+1))) return 1;
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if (regs.sp != (0x100 | (a & x))) return 1;
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}
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// tas abs,y (page-cross)
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{
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WORD base = 0x20ff, addr = 0x2000;
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mem[addr] = 0xcc;
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BYTE a = 0xea, x = 0xff, y = 1;
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DWORD cycles = TAS_ABSY(a, x, y, base);
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if (cycles != 5) return 1;
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if (mem[addr] != (a & x & ((base>>8)+1))) return 1;
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if (regs.sp != (0x100 | (a & x))) return 1;
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}
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//
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// xas abs,y
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{
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WORD base = 0x20ff, addr = 0x20ff;
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mem[addr] = 0xcc;
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BYTE a = 0xea, x = 0x20, y = 0;
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DWORD cycles = XAS_ABSY(a, x, y, base);
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if (cycles != 5) return 1;
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if (mem[addr] != (x & ((base>>8)+1))) return 1;
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}
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// xas abs,y (page-cross)
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{
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WORD base = 0x20ff, addr = 0x2000;
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mem[addr] = 0xcc;
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BYTE a = 0xea, x = 0x20, y = 1;
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DWORD cycles = XAS_ABSY(a, x, y, base);
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if (cycles != 5) return 1;
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if (mem[addr] != (x & ((base>>8)+1))) return 1;
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}
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return 0;
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}
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//-------------------------------------
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int _tmain(int argc, _TCHAR* argv[])
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{
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int res = 1;
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init();
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reset();
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res = test_GH264();
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if (res) return res;
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res = test_GH271();
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if (res) return res;
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res = test_GH282();
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if (res) return res;
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return 0;
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}
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