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220 lines
8.5 KiB
C
220 lines
8.5 KiB
C
/*** Z80Em: Portable Z80 emulator *******************************************/
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/*** ***/
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/*** Z80Codes.h ***/
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/*** ***/
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/*** This file contains various macros used by the emulation engine ***/
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/*** ***/
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/*** Copyright (C) Marcel de Kogel 1996,1997 ***/
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/*** You are not allowed to distribute this software commercially ***/
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/*** Please, notify me, if you make any changes to this file ***/
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/****************************************************************************/
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#define M_POP(Rg) \
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R.Rg.D=M_RDSTACK(R.SP.D)+(M_RDSTACK((R.SP.D+1)&65535)<<8); \
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R.SP.W.l+=2
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#define M_PUSH(Rg) \
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R.SP.W.l-=2; \
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M_WRSTACK(R.SP.D,R.Rg.D); \
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M_WRSTACK((R.SP.D+1)&65535,R.Rg.D>>8)
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#define M_CALL \
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{ \
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int q; \
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q=M_RDMEM_OPCODE_WORD(); \
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M_PUSH(PC); \
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R.PC.D=q; \
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Z80_ICount-=7; \
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}
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#define M_JP \
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R.PC.D=M_RDOP_ARG(R.PC.D)+((M_RDOP_ARG((R.PC.D+1)&65535))<<8)
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#define M_JR \
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R.PC.W.l+=((offset)M_RDOP_ARG(R.PC.D))+1; Z80_ICount-=5
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#define M_RET M_POP(PC); Z80_ICount-=6
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#define M_RST(Addr) M_PUSH(PC); R.PC.D=Addr
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#define M_SET(Bit,Reg) Reg|=1<<Bit
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#define M_RES(Bit,Reg) Reg&=~(1<<Bit)
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#define M_BIT(Bit,Reg) \
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R.AF.B.l=(R.AF.B.l&C_FLAG)|H_FLAG| \
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((Reg&(1<<Bit))? ((Bit==7)?S_FLAG:0):Z_FLAG)
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#define M_AND(Reg) R.AF.B.h&=Reg; R.AF.B.l=ZSPTable[R.AF.B.h]|H_FLAG
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#define M_OR(Reg) R.AF.B.h|=Reg; R.AF.B.l=ZSPTable[R.AF.B.h]
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#define M_XOR(Reg) R.AF.B.h^=Reg; R.AF.B.l=ZSPTable[R.AF.B.h]
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#define M_IN(Reg) \
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Reg=DoIn(R.BC.B.l,R.BC.B.h); \
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R.AF.B.l=(R.AF.B.l&C_FLAG)|ZSPTable[Reg]
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#define M_RLCA \
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R.AF.B.h=(R.AF.B.h<<1)|((R.AF.B.h&0x80)>>7); \
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R.AF.B.l=(R.AF.B.l&0xEC)|(R.AF.B.h&C_FLAG)
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#define M_RRCA \
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R.AF.B.l=(R.AF.B.l&0xEC)|(R.AF.B.h&0x01); \
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R.AF.B.h=(R.AF.B.h>>1)|(R.AF.B.h<<7)
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#define M_RLA \
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{ \
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int i; \
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i=R.AF.B.l&C_FLAG; \
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R.AF.B.l=(R.AF.B.l&0xEC)|((R.AF.B.h&0x80)>>7); \
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R.AF.B.h=(R.AF.B.h<<1)|i; \
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}
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#define M_RRA \
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{ \
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int i; \
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i=R.AF.B.l&C_FLAG; \
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R.AF.B.l=(R.AF.B.l&0xEC)|(R.AF.B.h&0x01); \
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R.AF.B.h=(R.AF.B.h>>1)|(i<<7); \
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}
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#define M_RLC(Reg) \
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{ \
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int q; \
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q=Reg>>7; \
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Reg=(Reg<<1)|q; \
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R.AF.B.l=ZSPTable[Reg]|q; \
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}
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#define M_RRC(Reg) \
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{ \
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int q; \
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q=Reg&1; \
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Reg=(Reg>>1)|(q<<7); \
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R.AF.B.l=ZSPTable[Reg]|q; \
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}
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#define M_RL(Reg) \
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{ \
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int q; \
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q=Reg>>7; \
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Reg=(Reg<<1)|(R.AF.B.l&1); \
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R.AF.B.l=ZSPTable[Reg]|q; \
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}
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#define M_RR(Reg) \
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{ \
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int q; \
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q=Reg&1; \
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Reg=(Reg>>1)|(R.AF.B.l<<7); \
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R.AF.B.l=ZSPTable[Reg]|q; \
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}
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#define M_SLL(Reg) \
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{ \
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int q; \
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q=Reg>>7; \
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Reg=(Reg<<1)|1; \
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R.AF.B.l=ZSPTable[Reg]|q; \
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}
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#define M_SLA(Reg) \
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{ \
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int q; \
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q=Reg>>7; \
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Reg<<=1; \
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R.AF.B.l=ZSPTable[Reg]|q; \
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}
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#define M_SRL(Reg) \
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{ \
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int q; \
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q=Reg&1; \
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Reg>>=1; \
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R.AF.B.l=ZSPTable[Reg]|q; \
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}
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#define M_SRA(Reg) \
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{ \
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int q; \
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q=Reg&1; \
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Reg=(Reg>>1)|(Reg&0x80); \
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R.AF.B.l=ZSPTable[Reg]|q; \
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}
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#define M_INC(Reg) \
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++Reg; \
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R.AF.B.l=(R.AF.B.l&C_FLAG)|ZSTable[Reg]| \
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((Reg==0x80)?V_FLAG:0)|((Reg&0x0F)?0:H_FLAG)
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#define M_DEC(Reg) \
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R.AF.B.l=(R.AF.B.l&C_FLAG)|N_FLAG| \
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((Reg==0x80)?V_FLAG:0)|((Reg&0x0F)?0:H_FLAG); \
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R.AF.B.l|=ZSTable[--Reg]
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#define M_ADD(Reg) \
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{ \
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int q; \
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q=R.AF.B.h+Reg; \
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R.AF.B.l=ZSTable[q&255]|((q&256)>>8)| \
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((R.AF.B.h^q^Reg)&H_FLAG)| \
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(((Reg^R.AF.B.h^0x80)&(Reg^q)&0x80)>>5); \
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R.AF.B.h=q; \
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}
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#define M_ADC(Reg) \
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{ \
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int q; \
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q=R.AF.B.h+Reg+(R.AF.B.l&1); \
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R.AF.B.l=ZSTable[q&255]|((q&256)>>8)| \
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((R.AF.B.h^q^Reg)&H_FLAG)| \
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(((Reg^R.AF.B.h^0x80)&(Reg^q)&0x80)>>5); \
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R.AF.B.h=q; \
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}
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#define M_SUB(Reg) \
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{ \
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int q; \
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q=R.AF.B.h-Reg; \
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R.AF.B.l=ZSTable[q&255]|((q&256)>>8)|N_FLAG| \
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((R.AF.B.h^q^Reg)&H_FLAG)| \
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(((Reg^R.AF.B.h)&(Reg^q)&0x80)>>5); \
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R.AF.B.h=q; \
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}
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#define M_SBC(Reg) \
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{ \
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int q; \
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q=R.AF.B.h-Reg-(R.AF.B.l&1); \
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R.AF.B.l=ZSTable[q&255]|((q&256)>>8)|N_FLAG| \
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((R.AF.B.h^q^Reg)&H_FLAG)| \
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(((Reg^R.AF.B.h)&(Reg^q)&0x80)>>5); \
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R.AF.B.h=q; \
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}
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#define M_CP(Reg) \
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{ \
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int q; \
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q=R.AF.B.h-Reg; \
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R.AF.B.l=ZSTable[q&255]|((q&256)>>8)|N_FLAG| \
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((R.AF.B.h^q^Reg)&H_FLAG)| \
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(((Reg^R.AF.B.h)&(Reg^q)&0x80)>>5); \
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}
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#define M_ADDW(Reg1,Reg2) \
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{ \
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int q; \
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q=R.Reg1.D+R.Reg2.D; \
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R.AF.B.l=(R.AF.B.l&(S_FLAG|Z_FLAG|V_FLAG))| \
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(((R.Reg1.D^q^R.Reg2.D)&0x1000)>>8)| \
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((q>>16)&1); \
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R.Reg1.W.l=q; \
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}
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#define M_ADCW(Reg) \
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{ \
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int q; \
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q=R.HL.D+R.Reg.D+(R.AF.D&1); \
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R.AF.B.l=(((R.HL.D^q^R.Reg.D)&0x1000)>>8)| \
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((q>>16)&1)| \
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((q&0x8000)>>8)| \
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((q&65535)?0:Z_FLAG)| \
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(((R.Reg.D^R.HL.D^0x8000)&(R.Reg.D^q)&0x8000)>>13); \
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R.HL.W.l=q; \
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}
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#define M_SBCW(Reg) \
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{ \
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int q; \
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q=R.HL.D-R.Reg.D-(R.AF.D&1); \
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R.AF.B.l=(((R.HL.D^q^R.Reg.D)&0x1000)>>8)| \
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((q>>16)&1)| \
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((q&0x8000)>>8)| \
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((q&65535)?0:Z_FLAG)| \
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(((R.Reg.D^R.HL.D)&(R.Reg.D^q)&0x8000)>>13)| \
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N_FLAG; \
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R.HL.W.l=q; \
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}
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