From a217a0a096f6873e73799eb721d982678ec1a82c Mon Sep 17 00:00:00 2001 From: Christopher Mosher Date: Thu, 19 Dec 2013 19:44:06 -0500 Subject: [PATCH] replace cpu with 6502 emulator --- src/Circuit.cpp | 78 + src/Circuit.h | 49 + src/Common.cpp | 83 + src/Common.h | 88 ++ src/Cpu6502.cpp | 63 + src/Cpu6502.h | 45 + src/Cpu6502Helper.cpp | 72 + src/Cpu6502Helper.h | 37 + src/Emu6502.cpp | 8 + src/Emu6502.h | 57 + src/Makefile.am | 8 +- src/SegmentCache.cpp | 53 + src/SegmentCache.h | 58 + src/SegmentTypes.h | 21 + src/StateCalculator.cpp | 69 + src/StateCalculator.h | 36 + src/Trace.cpp | 103 ++ src/Trace.h | 35 + src/TransCache.cpp | 13 + src/TransCache.h | 47 + src/TransNetwork.cpp | 27 + src/TransNetwork.h | 36 + src/apple2.cpp | 5 +- src/apple2.h | 6 +- src/ptr_less.h | 20 + src/trans.h | 92 ++ transistors | 3239 +++++++++++++++++++++++++++++++++++++++ 27 files changed, 4444 insertions(+), 4 deletions(-) create mode 100644 src/Circuit.cpp create mode 100644 src/Circuit.h create mode 100644 src/Common.cpp create mode 100644 src/Common.h create mode 100644 src/Cpu6502.cpp create mode 100644 src/Cpu6502.h create mode 100644 src/Cpu6502Helper.cpp create mode 100644 src/Cpu6502Helper.h create mode 100644 src/Emu6502.cpp create mode 100644 src/Emu6502.h create mode 100644 src/SegmentCache.cpp create mode 100644 src/SegmentCache.h create mode 100644 src/SegmentTypes.h create mode 100644 src/StateCalculator.cpp create mode 100644 src/StateCalculator.h create mode 100644 src/Trace.cpp create mode 100644 src/Trace.h create mode 100644 src/TransCache.cpp create mode 100644 src/TransCache.h create mode 100644 src/TransNetwork.cpp create mode 100644 src/TransNetwork.h create mode 100644 src/ptr_less.h create mode 100644 src/trans.h create mode 100644 transistors diff --git a/src/Circuit.cpp b/src/Circuit.cpp new file mode 100644 index 0000000..c3377dc --- /dev/null +++ b/src/Circuit.cpp @@ -0,0 +1,78 @@ +/* + * File: Circuit.cpp + * Author: Christopher + * + * Created on December 12, 2013, 7:04 PM + */ + +#include "Circuit.h" +#include "trans.h" + +/* + * Adds segment extendFrom, and all segments electrically connected to it. + * This happens recursively, but we don't recurse past ground or voltage supply. + */ +void Circuit::extend(Segment* extendFrom) { + auto ret = this->segs.insert(extendFrom); + if (!ret.second) { + /* We've already processed this segment. */ + return; + } + + /* Don't recurse past ground or voltage supply. */ + if (extendFrom->vss || extendFrom->vcc) { + return; + } + + /* + * For every ON transistor this seg is connected to via a leg (source or + * drain), add the seg that's connected to the OTHER leg of the transistor. + * This is a RECURSIVE addition. + * + * Also note that, upon system startup, all transistors are initialized + * to OFF, so at the time of the very first recalcAll call, *no* other + * segments will be added here. + */ + for (auto t : extendFrom->c1c2s) { + if (t->on) { + if (t->c1 == extendFrom) { + extend(t->c2); + } else if (t->c2 == extendFrom) { + extend(t->c1); + } + } + } +} + +/* + * Upon system startup, this will return the "pullup" value of + * each segment, except for VCC and VSS (which will of course be + * ON and OFF respectively). + */ +bool Circuit::getValue() { + /* If group contains ground, it's OFF, */ + for (auto s : this->segs) { + if (s->vss) { + return false; + } + } + + /* + * otherwise, if any segment in the group is not floating, + * return that segment as the value, otherwise if any floating + * segment is ON, then return ON as the value. + */ + for (auto s : this->segs) { + if (s->pull != Pull::FLOAT) { + return (s->pull == Pull::UP); + } else if (s->on) { + return true; + } + } + + /* + * otherwise, if we get here, it means that all segments in the + * group are floating and OFF, so return OFF as the value. + */ + return false; +} diff --git a/src/Circuit.h b/src/Circuit.h new file mode 100644 index 0000000..37d4cb8 --- /dev/null +++ b/src/Circuit.h @@ -0,0 +1,49 @@ +/* + * File: Circuit.h + * Author: Christopher + * + * Created on December 12, 2013, 7:04 PM + */ + +#ifndef CIRCUIT_H +#define CIRCUIT_H + +#include "SegmentTypes.h" +#include + +/* + * Builds a circuit, given one segment in that circuit. + * Extends the given segment by traversing the ON + * transistors it is connected to, recursively, until + * hitting ground and voltage supply. Provides iterators + * for retrieving all the circuit's segments, and a method + * to get the ON value of the circuit. + */ +class Circuit final { +public: + + Circuit(Segment* extendFrom) { + extend(extendFrom); + } + + bool getValue(); + + SegmentSet::iterator begin() { + return this->segs.begin(); + } + + SegmentSet::iterator end() { + return this->segs.end(); + } + +private: + + Circuit(const Circuit&) = delete; + Circuit& operator=(const Circuit&) = delete; + + void extend(Segment* extendFrom); + + SegmentSet segs; +}; + +#endif /* CIRCUIT_H */ diff --git a/src/Common.cpp b/src/Common.cpp new file mode 100644 index 0000000..f2fd562 --- /dev/null +++ b/src/Common.cpp @@ -0,0 +1,83 @@ +/* + * File: Common.cpp + * Author: Christopher + * + * Created on December 14, 2013, 8:47 PM + */ + +#include "Common.h" +#include "TransNetwork.h" +#include "SegmentCache.h" +#include "trans.h" + +Common::Common(const TransNetwork& tn) : +Common( + tn.segs.get("-vss"), tn.segs.get("+vcc"), + tn.segs.get("-clk0"), + tn.segs.get("-irq"), tn.segs.get("-res"), tn.segs.get("-nmi"), + tn.segs.get("+rdy"), tn.segs.get("+so"), + tn.segs.get("-db0"), tn.segs.get("-db1"), tn.segs.get("-db2"), tn.segs.get("-db3"), tn.segs.get("-db4"), tn.segs.get("-db5"), tn.segs.get("-db6"), tn.segs.get("-db7"), + tn.segs.get("-ab0"), tn.segs.get("-ab1"), tn.segs.get("-ab2"), tn.segs.get("-ab3"), tn.segs.get("-ab4"), tn.segs.get("-ab5"), tn.segs.get("-ab6"), tn.segs.get("-ab7"), + tn.segs.get("-ab8"), tn.segs.get("-ab9"), tn.segs.get("-ab10"), tn.segs.get("-ab11"), tn.segs.get("-ab12"), tn.segs.get("-ab13"), tn.segs.get("-ab14"), tn.segs.get("-ab15"), + tn.segs.get("-rw"), tn.segs.get("-sync"), + tn.segs.get("-clk1out"), tn.segs.get("-clk2out"), + tn.segs.get("-a0"), tn.segs.get("-a1"), tn.segs.get("-a2"), tn.segs.get("-a3"), tn.segs.get("-a4"), tn.segs.get("-a5"), tn.segs.get("-a6"), tn.segs.get("-a7"), + tn.segs.get("-x0"), tn.segs.get("-x1"), tn.segs.get("-x2"), tn.segs.get("-x3"), tn.segs.get("-x4"), tn.segs.get("-x5"), tn.segs.get("-x6"), tn.segs.get("-x7"), + tn.segs.get("-y0"), tn.segs.get("-y1"), tn.segs.get("-y2"), tn.segs.get("-y3"), tn.segs.get("-y4"), tn.segs.get("-y5"), tn.segs.get("-y6"), tn.segs.get("-y7"), + tn.segs.get("-pcl0"), tn.segs.get("-pcl1"), tn.segs.get("-pcl2"), tn.segs.get("-pcl3"), tn.segs.get("-pcl4"), tn.segs.get("-pcl5"), tn.segs.get("-pcl6"), tn.segs.get("-pcl7"), + tn.segs.get("-pch0"), tn.segs.get("-pch1"), tn.segs.get("-pch2"), tn.segs.get("-pch3"), tn.segs.get("-pch4"), tn.segs.get("-pch5"), tn.segs.get("-pch6"), tn.segs.get("-pch7"), + tn.segs.get("+Pout0"), tn.segs.get("+Pout1"), tn.segs.get("+Pout2"), tn.segs.get("+Pout3"), tn.segs.get("+Pout4"), /*no P5 */tn.segs.get("+Pout6"), tn.segs.get("+Pout7"), + tn.segs.get("-s0"), tn.segs.get("-s1"), tn.segs.get("-s2"), tn.segs.get("-s3"), tn.segs.get("-s4"), tn.segs.get("-s5"), tn.segs.get("-s6"), tn.segs.get("-s7")) { +} + +unsigned short Common::rAddr() const { + return Segment::asWord(this->AB15, this->AB14, this->AB13, this->AB12, this->AB11, this->AB10, this->AB9, this->AB8, this->AB7, this->AB6, this->AB5, this->AB4, this->AB3, this->AB2, this->AB1, this->AB0); +} + +unsigned char Common::rData() const { + return Segment::asByte(this->DB7, this->DB6, this->DB5, this->DB4, this->DB3, this->DB2, this->DB1, this->DB0); +} + +unsigned char Common::rA() const { + return Segment::asByte(this->A7, this->A6, this->A5, this->A4, this->A3, this->A2, this->A1, this->A0); +} + +unsigned char Common::rX() const { + return Segment::asByte(this->X7, this->X6, this->X5, this->X4, this->X3, this->X2, this->X1, this->X0); +} + +unsigned char Common::rY() const { + return Segment::asByte(this->Y7, this->Y6, this->Y5, this->Y4, this->Y3, this->Y2, this->Y1, this->Y0); +} + +unsigned char Common::rS() const { + return Segment::asByte(this->S7, this->S6, this->S5, this->S4, this->S3, this->S2, this->S1, this->S0); +} + +unsigned short Common::rPC() const { + return Segment::asWord(this->PCH7, this->PCH6, this->PCH5, this->PCH4, this->PCH3, this->PCH2, this->PCH1, this->PCH0, this->PCL7, this->PCL6, this->PCL5, this->PCL4, this->PCL3, this->PCL2, this->PCL1, this->PCL0); +} + +PinSettings Common::getDataPinSettings(const unsigned char data) const { + unsigned char x = data; + + PinSettings ps; + + ps.insert(std::make_pair(this->DB0,x & 1)); + x >>= 1; + ps.insert(std::make_pair(this->DB1,x & 1)); + x >>= 1; + ps.insert(std::make_pair(this->DB2,x & 1)); + x >>= 1; + ps.insert(std::make_pair(this->DB3,x & 1)); + x >>= 1; + ps.insert(std::make_pair(this->DB4,x & 1)); + x >>= 1; + ps.insert(std::make_pair(this->DB5,x & 1)); + x >>= 1; + ps.insert(std::make_pair(this->DB6,x & 1)); + x >>= 1; + ps.insert(std::make_pair(this->DB7,x & 1)); + + return ps; +} diff --git a/src/Common.h b/src/Common.h new file mode 100644 index 0000000..51655e2 --- /dev/null +++ b/src/Common.h @@ -0,0 +1,88 @@ +/* + * File: Common.h + * Author: Christopher + * + * Created on December 14, 2013, 8:47 PM + */ + +#ifndef COMMON_H +#define COMMON_H + +#include "SegmentTypes.h" + +class TransNetwork; + +class Common final { +public: + + Segment * const VSS, * const VCC; + Segment * const CLK0; + Segment * const IRQ, * const RES, * const NMI; + Segment * const RDY, * const SO; + Segment * const DB0, * const DB1, * const DB2, * const DB3, * const DB4, * const DB5, * const DB6, * const DB7; + Segment * const AB0, * const AB1, * const AB2, * const AB3, * const AB4, * const AB5, * const AB6, * const AB7, * const AB8, * const AB9, * const AB10, * const AB11, * const AB12, * const AB13, * const AB14, * const AB15; + Segment * const RW, * const SYNC; + Segment * const CLK1OUT, * const CLK2OUT; + Segment * const A0, * const A1, * const A2, * const A3, * const A4, * const A5, * const A6, * const A7; + Segment * const X0, * const X1, * const X2, * const X3, * const X4, * const X5, * const X6, * const X7; + Segment * const Y0, * const Y1, * const Y2, * const Y3, * const Y4, * const Y5, * const Y6, * const Y7; + Segment * const PCL0, * const PCL1, * const PCL2, * const PCL3, * const PCL4, * const PCL5, * const PCL6, * const PCL7; + Segment * const PCH0, * const PCH1, * const PCH2, * const PCH3, * const PCH4, * const PCH5, * const PCH6, * const PCH7; + Segment * const P0, * const P1, * const P2, * const P3, * const P4, /* no P5 */ * const P6, * const P7; + Segment * const S0, * const S1, * const S2, * const S3, * const S4, * const S5, * const S6, * const S7; + + + + Common(const TransNetwork& segs); + + unsigned char rA() const; + unsigned char rX() const; + unsigned char rY() const; + unsigned char rS() const; + unsigned short rPC() const; + unsigned short rAddr() const; + unsigned char rData() const; + + PinSettings getDataPinSettings(const unsigned char data) const; + + + +private: + + Common( + Segment* VSS, Segment* VCC, + Segment* CLK0, + Segment* IRQ, Segment* RES, Segment* NMI, + Segment* RDY, Segment* SO, + Segment* DB0, Segment* DB1, Segment* DB2, Segment* DB3, Segment* DB4, Segment* DB5, Segment* DB6, Segment* DB7, + Segment* AB0, Segment* AB1, Segment* AB2, Segment* AB3, Segment* AB4, Segment* AB5, Segment* AB6, Segment* AB7, + Segment* AB8, Segment* AB9, Segment* AB10, Segment* AB11, Segment* AB12, Segment* AB13, Segment* AB14, Segment* AB15, + Segment* RW, Segment* SYNC, + Segment* CLK1OUT, Segment* CLK2OUT, + Segment* A0, Segment* A1, Segment* A2, Segment* A3, Segment* A4, Segment* A5, Segment* A6, Segment* A7, + Segment* X0, Segment* X1, Segment* X2, Segment* X3, Segment* X4, Segment* X5, Segment* X6, Segment* X7, + Segment* Y0, Segment* Y1, Segment* Y2, Segment* Y3, Segment* Y4, Segment* Y5, Segment* Y6, Segment* Y7, + Segment* PCL0, Segment* PCL1, Segment* PCL2, Segment* PCL3, Segment* PCL4, Segment* PCL5, Segment* PCL6, Segment* PCL7, + Segment* PCH0, Segment* PCH1, Segment* PCH2, Segment* PCH3, Segment* PCH4, Segment* PCH5, Segment* PCH6, Segment* PCH7, + Segment* P0, Segment* P1, Segment* P2, Segment* P3, Segment* P4, /* no P5 */ Segment* P6, Segment* P7, + Segment* S0, Segment* S1, Segment* S2, Segment* S3, Segment* S4, Segment* S5, Segment* S6, Segment* S7) : + VSS(VSS), VCC(VCC), + CLK0(CLK0), + IRQ(IRQ), RES(RES), NMI(NMI), + RDY(RDY), SO(SO), + DB0(DB0), DB1(DB1), DB2(DB2), DB3(DB3), DB4(DB4), DB5(DB5), DB6(DB6), DB7(DB7), + AB0(AB0), AB1(AB1), AB2(AB2), AB3(AB3), AB4(AB4), AB5(AB5), AB6(AB6), AB7(AB7), + AB8(AB8), AB9(AB9), AB10(AB10), AB11(AB11), AB12(AB12), AB13(AB13), AB14(AB14), AB15(AB15), + RW(RW), SYNC(SYNC), + CLK1OUT(CLK1OUT), CLK2OUT(CLK2OUT), + A0(A0), A1(A1), A2(A2), A3(A3), A4(A4), A5(A5), A6(A6), A7(A7), + X0(X0), X1(X1), X2(X2), X3(X3), X4(X4), X5(X5), X6(X6), X7(X7), + Y0(Y0), Y1(Y1), Y2(Y2), Y3(Y3), Y4(Y4), Y5(Y5), Y6(Y6), Y7(Y7), + PCL0(PCL0), PCL1(PCL1), PCL2(PCL2), PCL3(PCL3), PCL4(PCL4), PCL5(PCL5), PCL6(PCL6), PCL7(PCL7), + PCH0(PCH0), PCH1(PCH1), PCH2(PCH2), PCH3(PCH3), PCH4(PCH4), PCH5(PCH5), PCH6(PCH6), PCH7(PCH7), + P0(P0), P1(P1), P2(P2), P3(P3), P4(P4), /* no P5 */ P6(P6), P7(P7), + S0(S0), S1(S1), S2(S2), S3(S3), S4(S4), S5(S5), S6(S6), S7(S7) { + } +}; + +#endif /* COMMON_H */ diff --git a/src/Cpu6502.cpp b/src/Cpu6502.cpp new file mode 100644 index 0000000..995a927 --- /dev/null +++ b/src/Cpu6502.cpp @@ -0,0 +1,63 @@ +/* + * File: Cpu6502.cpp + * Author: Christopher + * + * Created on December 12, 2013, 10:14 PM + */ + +#include "Cpu6502.h" +#include "addressbus.h" +#include "StateCalculator.h" +#include "Trace.h" +#include "Common.h" +#include "trans.h" + + + +#define TRACEREG 1 +//#define TRACESEG 1 + + + + +void Cpu6502::setPins(const PinSettings& ps) { + SegmentSet rec; + for (auto p : ps) { + p.first->set(p.second); + rec.insert(p.first); + } + StateCalculator::recalc(rec); +} + +void Cpu6502::clock(bool phase) { + setPins(PinSettings{std::make_pair(common.CLK0,phase)}); + rw(); + +#ifdef TRACEREG + this->trace.dumpRegisters(); +#endif + +#ifdef TRACESEG + this->trace.dumpSegments(); +#endif +} + +void Cpu6502::rw() { + /* database read/write happens (only) during Clock Phase 2 */ + if (common.CLK2OUT->on) { + readData(); + writeData(); + } +} + +void Cpu6502::readData() { + if (this->common.RW->on) { + setPins(this->common.getDataPinSettings(this->addressBus.read(this->common.rAddr()))); + } +} + +void Cpu6502::writeData() { + if (!this->common.RW->on) { + this->addressBus.write(this->common.rAddr(), this->common.rData()); + } +} diff --git a/src/Cpu6502.h b/src/Cpu6502.h new file mode 100644 index 0000000..d5bd3f7 --- /dev/null +++ b/src/Cpu6502.h @@ -0,0 +1,45 @@ +/* + * File: Cpu6502.h + * Author: Christopher + * + * Created on December 12, 2013, 10:14 PM + */ + +#ifndef CPU6502_H +#define CPU6502_H + +#include "SegmentTypes.h" +#include "Trace.h" + +class AddressBus; +class Trace; +class Common; + +class Cpu6502 final { +public: + + Cpu6502(AddressBus& addressBus, Trace& trace, Common& common) : addressBus(addressBus), trace(trace), common(common) { +#if 0 + trace.dumpTransistors(); +#endif + } + + void setPins(const PinSettings& ps); + void clock(bool phase); + + +private: + + Cpu6502(const Cpu6502&) = delete; + Cpu6502& operator=(const Cpu6502&) = delete; + + void rw(); + void readData(); + void writeData(); + + AddressBus& addressBus; + Trace& trace; + Common& common; +}; + +#endif /* CPU6502_H */ diff --git a/src/Cpu6502Helper.cpp b/src/Cpu6502Helper.cpp new file mode 100644 index 0000000..8b38e29 --- /dev/null +++ b/src/Cpu6502Helper.cpp @@ -0,0 +1,72 @@ +/* + * File: Cpu6502Helper.cpp + * Author: Christopher + * + * Created on December 12, 2013, 10:22 PM + */ + +#include "Cpu6502Helper.h" +#include "Cpu6502.h" +#include "Common.h" +#include "SegmentTypes.h" + +void Cpu6502Helper::powerOn() { + PinSettings ps; + + // set voltage supply and ground. + ps.insert(std::make_pair(this->common.VCC, true)); + ps.insert(std::make_pair(this->common.VSS, false)); + + // don't do the set-overflow overriding functionality + ps.insert(std::make_pair(this->common.SO, false)); + + // ready to run (i.e., do not do single-stepping of instructions) + ps.insert(std::make_pair(this->common.RDY, true)); + + // pull up to indicate that we are not interrupting now + ps.insert(std::make_pair(this->common.IRQ, true)); + ps.insert(std::make_pair(this->common.NMI, true)); + + + /* + * RES_BAR pin means "not resetting". Since it is a negated pin, pulling it low means "resetting" + * and pulling it high means "not resetting" or equivalently "running". + */ + + /* + * RES_BAR false: resetting now (i.e., in power-up now; pull high to begin normal operation) + * We want to hold RES_BAR low for a while, indicating power-up phase during which the + * CPU does not start up normal operations yet. The caller can set RES_BAR high (by calling + * reset) whenever he is ready to start the CPU running. + */ + ps.insert(std::make_pair(this->common.RES, false)); + + this->cpu.setPins(ps); + + this->nextPhase = true; +} + +void Cpu6502Helper::tick() { + step(); + step(); +} + +void Cpu6502Helper::step() { + /* + * We cheat a little bit here: instead of requiring the + * caller to toggle clock-zero pin, we let him just call + * "step" and *we* keep track of which phase we are in. + * To do this, we just use the CLK0 segment value (as + * a kind of temporary variable), and just toggle it in + * order to know which phase we are going into. + * + * The real 6502, of course, does not do this. + */ + this->nextPhase = !this->nextPhase; + + this->cpu.clock(this->nextPhase); +} + +void Cpu6502Helper::reset() { + this->cpu.setPins(PinSettings{std::make_pair(this->common.RES, true)}); +} diff --git a/src/Cpu6502Helper.h b/src/Cpu6502Helper.h new file mode 100644 index 0000000..e9782b8 --- /dev/null +++ b/src/Cpu6502Helper.h @@ -0,0 +1,37 @@ +/* + * File: Cpu6502Helper.h + * Author: Christopher + * + * Created on December 12, 2013, 10:22 PM + */ + +#ifndef CPU6502HELPER_H +#define CPU6502HELPER_H + +class Cpu6502; +class Common; + +class Cpu6502Helper final { +public: + + Cpu6502Helper(Cpu6502& cpu, Common& common) : cpu(cpu), common(common), nextPhase(true) { + } + + void powerOn(); + void tick(); + void reset(); + +private: + + Cpu6502Helper(const Cpu6502Helper&) = delete; + Cpu6502Helper& operator=(const Cpu6502Helper&) = delete; + + void step(); + + Cpu6502& cpu; + Common& common; + + bool nextPhase; +}; + +#endif /* CPU6502HELPER_H */ diff --git a/src/Emu6502.cpp b/src/Emu6502.cpp new file mode 100644 index 0000000..c063d99 --- /dev/null +++ b/src/Emu6502.cpp @@ -0,0 +1,8 @@ +/* + * File: Emu6502.cpp + * Author: Christopher + * + * Created on December 15, 2013, 12:43 AM + */ + +#include "Emu6502.h" diff --git a/src/Emu6502.h b/src/Emu6502.h new file mode 100644 index 0000000..ab27c07 --- /dev/null +++ b/src/Emu6502.h @@ -0,0 +1,57 @@ +/* + * File: Emu6502.h + * Author: Christopher + * + * Created on December 15, 2013, 12:43 AM + */ + +#ifndef EMU6502_H +#define EMU6502_H + +#include "Cpu6502Helper.h" +#include "Cpu6502.h" +#include "Trace.h" +#include "Common.h" +#include "TransNetwork.h" +#include "TransCache.h" +#include "SegmentCache.h" +#include + +class AddressBus; + +class Emu6502 { +public: + + Emu6502(std::istream& transistors, AddressBus& mem) : tn(transistors, segs, transes), c(tn), trace(segs, transes, c), cpu(mem, trace, c), cpuhelper(cpu, c) { + } + + virtual ~Emu6502() { + } + + void powerOn() { + this->cpuhelper.powerOn(); + } + + void tick() { + this->cpuhelper.tick(); + } + + void reset() { + this->cpuhelper.reset(); + } + +private: + + Emu6502(const Emu6502&) = delete; + Emu6502 operator=(const Emu6502&) = delete; + + SegmentCache segs; + TransCache transes; + TransNetwork tn; + Common c; + Trace trace; + Cpu6502 cpu; + Cpu6502Helper cpuhelper; +}; + +#endif /* EMU6502_H */ diff --git a/src/Makefile.am b/src/Makefile.am index 22da04f..33ff7a0 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -20,7 +20,9 @@ epple2_SOURCES = a2colorsobserved.cpp addressbus.cpp analogtv.cpp apple2.cpp \ screenimage.cpp slots.cpp speakerclicker.cpp standardin.cpp \ standardinproducer.cpp standardout.cpp steppermotor.cpp textcharacters.cpp \ timable.cpp video.cpp videoaddressing.cpp videomode.cpp \ - videostaticgenerator.cpp + videostaticgenerator.cpp \ + Circuit.cpp Common.cpp Cpu6502.cpp Cpu6502Helper.cpp Emu6502.cpp SegmentCache.cpp \ + StateCalculator.cpp Trace.cpp TransCache.cpp TransNetwork.cpp v6502.cpp noinst_HEADERS = a2colorsobserved.h addressbus.h analogtv.h apple2.h applentsc.h \ card.h cassette.h clipboardhandler.h clockcard.h configep2.h cpu.h diskbytes.h \ @@ -30,4 +32,6 @@ noinst_HEADERS = a2colorsobserved.h addressbus.h analogtv.h apple2.h applentsc.h powerupreset.h raminitializer.h screenimage.h slots.h speakerclicker.h \ standardin.h standardinproducer.h standardout.h steppermotor.h \ textcharacterimages.h textcharacters.h timable.h util.h \ - videoaddressing.h video.h videomode.h videostaticgenerator.h + videoaddressing.h video.h videomode.h videostaticgenerator.h \ + Circuit.h Common.h Cpu6502.h Cpu6502Helper.h Emu6502.h SegmentCache.h SegmentTypes.h \ + StateCalculator.h Trace.h TransCache.h TransNetwork.h addressbus.h ptr_less.h trans.h diff --git a/src/SegmentCache.cpp b/src/SegmentCache.cpp new file mode 100644 index 0000000..164c0f3 --- /dev/null +++ b/src/SegmentCache.cpp @@ -0,0 +1,53 @@ +/* + * File: SegmentCache.cpp + * Author: cmosher + * + * Created on December 10, 2013, 9:56 PM + */ + +#include "SegmentCache.h" +#include "trans.h" +#include +#include +#include + +bool SegmentCache::cached(const std::string& id) const { + return this->cache.find(id) != this->cache.end(); +} + +Segment* SegmentCache::getOrAdd(const std::string& id) { + if (!cached(id)) { + this->cache[id] = std::make_shared(id); + + /* + * We want to optimize VSS and VCC checking in + * the rest of the program, so we check here + * for those two special cases, and flag them. + * So, for example, checking (s->vss) is equivalent + * to checking (s==VCC). + */ + if (id == "-vss") { + this->cache[id]->vss = true; + } else if (id == "+vcc") { + this->cache[id]->vcc = true; + } + } + + return get(id); +} + +Segment* SegmentCache::get(const std::string& id) const { + if (!cached(id)) { + throw "Cannot find segment: " + id; + } + + return this->cache.at(id).get(); +} + +SegmentSet SegmentCache::all() const { + SegmentSet s; + for (auto i : this->cache) { + s.insert(i.second.get()); + } + return s; +} diff --git a/src/SegmentCache.h b/src/SegmentCache.h new file mode 100644 index 0000000..8a662cc --- /dev/null +++ b/src/SegmentCache.h @@ -0,0 +1,58 @@ +/* + * File: SegmentCache.h + * Author: Christopher + * + * Created on December 10, 2013, 9:56 PM + */ + +#ifndef SEGMENTCACHE_H +#define SEGMENTCACHE_H + +#include "SegmentTypes.h" +#include +#include +#include +#include + +class Common; + +class SegmentCache final { +public: + + SegmentCache() { + } + + Segment* getOrAdd(const std::string& id); + + SegmentSet all() const; + + + + typedef std::map> Map; + + Map::const_iterator begin() const { + return this->cache.begin(); + } + + Map::const_iterator end() const { + return this->cache.end(); + } + + Map::size_type size() const { + return this->cache.size(); + } + +private: + + Map cache; + + SegmentCache(const SegmentCache&) = delete; + SegmentCache& operator=(const SegmentCache&) = delete; + + Segment* get(const std::string& id) const; + bool cached(const std::string& id) const; + + friend Common; +}; + +#endif /* SEGMENTCACHE_H */ diff --git a/src/SegmentTypes.h b/src/SegmentTypes.h new file mode 100644 index 0000000..c964bb7 --- /dev/null +++ b/src/SegmentTypes.h @@ -0,0 +1,21 @@ +/* + * File: setpSeg.h + * Author: Christopher + * + * Created on December 15, 2013, 12:16 AM + */ + +#ifndef SETPSEG_H +#define SETPSEG_H + +#include "ptr_less.h" +#include +#include + +class Segment; + +typedef std::set> SegmentSet; +typedef std::set> PinSettings; + +#endif /* SETPSEG_H */ + diff --git a/src/StateCalculator.cpp b/src/StateCalculator.cpp new file mode 100644 index 0000000..f54967a --- /dev/null +++ b/src/StateCalculator.cpp @@ -0,0 +1,69 @@ +/* + * File: StateCalculator.cpp + * Author: Christopher + * + * Created on December 12, 2013, 8:29 PM + */ + +#include "StateCalculator.h" +#include "Circuit.h" +#include "trans.h" + +/* + * Recalculate segment states (on/off), based on the fact that the segments + * in segs have just changed state. Keep track of which other segments are + * affected, and repeat the process on those segments. Repeat until no more + * segments change state. + */ +#define SANE (100) + +void StateCalculator::recalc(const SegmentSet& segs) { + int sanity(0); + + SegmentSet changed(segs); + while (!changed.empty()) { + if (++sanity >= SANE) { + throw "ERROR: reached maximum iteration limit while recalculating CPU state"; + } + + StateCalculator c; + for (auto s : changed) { + c.recalcNode(s); + } + changed = c.segs; + } +} + +/* + * Gets group of segments currently electrically connected to seg, + * gets what their group value is (or should be), goes through all + * those segments and sets their "on" value. For all connected gates, + * turn on/off, and indicate that the segments connected to those + * transistors' source and drain legs have changed, by adding them + * to this->segs. + */ +void StateCalculator::recalcNode(Segment* seg) { + if (!(seg->vss || seg->vcc)) { + Circuit c(seg); + for (auto s : c) { + setSeg(s, c.getValue()); + } + } +} + +void StateCalculator::setSeg(Segment* s, const bool on) { + if (s->on != on) { + s->on = on; + for (auto t : s->gates) { + setTrans(t, on); + } + } +} + +void StateCalculator::setTrans(Trans* t, const bool on) { + if (t->on != on) { + t->on = on; + this->segs.insert(t->c1); + this->segs.insert(t->c2); + } +} diff --git a/src/StateCalculator.h b/src/StateCalculator.h new file mode 100644 index 0000000..de6f84f --- /dev/null +++ b/src/StateCalculator.h @@ -0,0 +1,36 @@ +/* + * File: StateCalculator.h + * Author: Christopher + * + * Created on December 12, 2013, 8:29 PM + */ + +#ifndef STATECALCULATOR_H +#define STATECALCULATOR_H + +#include +#include "SegmentTypes.h" + +class Trans; + +class StateCalculator final { +public: + + static void recalc(const SegmentSet& rSeg); + +private: + + StateCalculator() { + } + + StateCalculator(const StateCalculator&) = delete; + StateCalculator& operator=(const StateCalculator&) = delete; + + void recalcNode(Segment* seg); + void setSeg(Segment* s, const bool on); + void setTrans(Trans* t, const bool on); + + SegmentSet segs; +}; + +#endif /* STATECALCULATOR_H */ diff --git a/src/Trace.cpp b/src/Trace.cpp new file mode 100644 index 0000000..fd021ea --- /dev/null +++ b/src/Trace.cpp @@ -0,0 +1,103 @@ +/* + * File: Trace.cpp + * Author: cmosher + * + * Created on December 12, 2013, 3:39 PM + */ + +#include "Trace.h" +#include "TransCache.h" +#include "SegmentCache.h" +#include "Common.h" +#include "trans.h" +#include +#include + +static void pHex(const unsigned long x, const int width) { + std::cout << std::setw(width) << std::setfill('0') << std::hex << x << std::dec; +} + +static void pHexb(const unsigned char x) { + pHex(x, 2); +} + +static void pHexw(const unsigned short x) { + pHex(x, 4); +} + +void Trace::dumpSegments() const { + for (auto sp : this->segs) { + Segment* seg = sp.second.get(); + if (seg->pull == Pull::UP) { + std::cout << (seg->on ? "U" : "u"); + } else if (seg->pull == Pull::DOWN) { + std::cout << (seg->on ? "D" : "d"); + } else { + std::cout << (seg->on ? "F" : "f"); + } + } + std::cout << std::endl; +} + +void Trace::dumpRegisters() const { + std::cout << "A"; + pHexb(this->common.rA()); + + std::cout << " X"; + pHexb(this->common.rX()); + + std::cout << " Y"; + pHexb(this->common.rY()); + + std::cout << " "; + std::cout << (this->common.P7->on ? "N" : "n"); + std::cout << (this->common.P6->on ? "V" : "v"); + std::cout << "."; + std::cout << (this->common.P4->on ? "B" : "b"); + std::cout << (this->common.P3->on ? "D" : "d"); + std::cout << (this->common.P2->on ? "I" : "i"); + std::cout << (this->common.P1->on ? "Z" : "z"); + std::cout << (this->common.P0->on ? "C" : "c"); + + std::cout << " S"; + pHexb(this->common.rS()); + + std::cout << " PC"; + pHexw(this->common.rPC()); + + if (this->common.CLK1OUT->on) { + std::cout << " PH1 "; + } + if (this->common.CLK2OUT->on) { + std::cout << " PH2"; + if (this->common.RW->on) { + std::cout << " R"; + } else { + std::cout << " W"; + } + } + if (!(this->common.CLK1OUT->on || this->common.CLK2OUT->on)) { + std::cout << " PH- "; + } + + std::cout << " DB"; + pHexb(this->common.rData()); + + std::cout << " AB"; + pHexw(this->common.rAddr()); + + std::cout << std::endl; +} + +void Trace::dumpTransistors() const { + /* count depletion-mode MOSFETs */ + int cd(0); + for (auto sp : this->segs) { + Segment* seg = sp.second.get(); + if (seg->dmos) { + ++cd; + } + } + + std::cout << "eMOSFETs: " << this->transes.size() << ", dMOSFETs: " << cd << std::endl; +} diff --git a/src/Trace.h b/src/Trace.h new file mode 100644 index 0000000..b543940 --- /dev/null +++ b/src/Trace.h @@ -0,0 +1,35 @@ +/* + * File: Trace.h + * Author: cmosher + * + * Created on December 12, 2013, 3:39 PM + */ + +#ifndef TRACE_H +#define TRACE_H + +class SegmentCache; +class TransCache; +class Common; + +class Trace final { +public: + + Trace(const SegmentCache& segs, const TransCache& transes, const Common& common) : segs(segs), transes(transes), common(common) { + } + + void dumpSegments() const; + void dumpTransistors() const; + void dumpRegisters() const; + +private: + + Trace(const Trace&) = delete; + Trace& operator=(const Trace&) = delete; + + const SegmentCache& segs; + const TransCache& transes; + const Common& common; +}; + +#endif /* TRACE_H */ diff --git a/src/TransCache.cpp b/src/TransCache.cpp new file mode 100644 index 0000000..69f8a86 --- /dev/null +++ b/src/TransCache.cpp @@ -0,0 +1,13 @@ +/* + * File: TransCache.cpp + * Author: Christopher + * + * Created on December 15, 2013, 1:39 PM + */ + +#include "TransCache.h" +#include "trans.h" + +void TransCache::add(Segment* c1, Segment* gate, Segment* c2) { + this->cache.insert(std::make_shared(c1,gate,c2)); +} diff --git a/src/TransCache.h b/src/TransCache.h new file mode 100644 index 0000000..f121399 --- /dev/null +++ b/src/TransCache.h @@ -0,0 +1,47 @@ +/* + * File: TransCache.h + * Author: Christopher + * + * Created on December 15, 2013, 1:39 PM + */ + +#ifndef TRANSCACHE_H +#define TRANSCACHE_H + +#include +#include + +class Trans; +class Segment; + +class TransCache final { +public: + + TransCache() { + } + + void add(Segment* c1, Segment* gate, Segment* c2); + + typedef std::set> Set; + + Set::const_iterator begin() const { + return this->cache.begin(); + } + + Set::const_iterator end() const { + return this->cache.end(); + } + + Set::size_type size() const { + return this->cache.size(); + } + +private: + + TransCache(const TransCache&) = delete; + TransCache& operator=(const TransCache&) = delete; + + Set cache; +}; + +#endif /* TRANSCACHE_H */ diff --git a/src/TransNetwork.cpp b/src/TransNetwork.cpp new file mode 100644 index 0000000..9d65dfc --- /dev/null +++ b/src/TransNetwork.cpp @@ -0,0 +1,27 @@ +/* + * File: TransNetwork.cpp + * Author: cmosher + * + * Created on December 11, 2013, 10:44 AM + */ + +#include "TransNetwork.h" +#include "TransCache.h" +#include "SegmentCache.h" +#include "StateCalculator.h" +#include "trans.h" +#include +#include +#include +#include + +TransNetwork::TransNetwork(std::istream& in, SegmentCache& segs, TransCache& transes) : segs(segs), transes(transes) { + std::string c1, gate, c2; + in >> c1 >> gate >> c2; + while (in.good()) { + this->transes.add(this->segs.getOrAdd(c1), this->segs.getOrAdd(gate), this->segs.getOrAdd(c2)); + in >> c1 >> gate >> c2; + } + + StateCalculator::recalc(this->segs.all()); +} diff --git a/src/TransNetwork.h b/src/TransNetwork.h new file mode 100644 index 0000000..a9f5961 --- /dev/null +++ b/src/TransNetwork.h @@ -0,0 +1,36 @@ +/* + * File: TransNetwork.h + * Author: cmosher + * + * Created on December 11, 2013, 10:44 AM + */ + +#ifndef TRANSNETWORK_H +#define TRANSNETWORK_H + +#include +#include +#include + +class TransCache; +class SegmentCache; +class Common; +class Trans; + +class TransNetwork final { +public: + + TransNetwork(std::istream& readFromHere, SegmentCache& segs, TransCache& transes); + +private: + + TransNetwork(const TransNetwork&) = delete; + TransNetwork& operator=(const TransNetwork&) = delete; + + SegmentCache& segs; + TransCache& transes; + + friend Common; +}; + +#endif /* TRANSNETWORK_H */ diff --git a/src/apple2.cpp b/src/apple2.cpp index e76c29c..5adbc21 100644 --- a/src/apple2.cpp +++ b/src/apple2.cpp @@ -35,6 +35,7 @@ #include "screenimage.h" #include +#include #include Apple2::Apple2(KeypressQueue& keypresses, PaddleButtonStates& paddleButtonStates, AnalogTV& tv, HyperMode& fhyper, KeyboardBufferMode& buffered, ScreenImage& gui): @@ -46,7 +47,9 @@ Apple2::Apple2(KeypressQueue& keypresses, PaddleButtonStates& paddleButtonStates addressBus(ram,rom,kbd,videoMode,paddles,paddleButtonStates,speaker,cassette,slts), picgen(tv,videoMode,this->revision), video(videoMode,addressBus,picgen,textRows), - cpu(addressBus), + transistors("transistors"), + cpu(transistors,addressBus), +// cpu(addressBus), powerUpReset(*this), revision(1) { diff --git a/src/apple2.h b/src/apple2.h index 66fd2ad..9d94d82 100644 --- a/src/apple2.h +++ b/src/apple2.h @@ -34,6 +34,8 @@ #include "analogtv.h" #include "powerupreset.h" #include "cassette.h" +#include "Emu6502.h" +#include class Emulator; class ScreenImage; @@ -51,7 +53,9 @@ class Apple2 : public Timable PictureGenerator picgen; TextCharacters textRows; Video video; - CPU cpu; +// CPU cpu; + std::ifstream transistors; + Emu6502 cpu; PowerUpReset powerUpReset; int revision; diff --git a/src/ptr_less.h b/src/ptr_less.h new file mode 100644 index 0000000..59f1b09 --- /dev/null +++ b/src/ptr_less.h @@ -0,0 +1,20 @@ +/* + * File: ptr_less.h + * Author: Christopher + * + * Created on December 14, 2013, 5:44 PM + */ + +#ifndef PTR_LESS_H +#define PTR_LESS_H + +template +struct ptr_less { + + bool operator()(T* pa, T* pb) { + return *pa < *pb; + } + +}; + +#endif /* PTR_LESS_H */ diff --git a/src/trans.h b/src/trans.h new file mode 100644 index 0000000..12b3ff6 --- /dev/null +++ b/src/trans.h @@ -0,0 +1,92 @@ +/* + * File: trans.h + * Author: cmosher + * + * Created on December 10, 2013, 2:37 PM + */ + +#ifndef TRANS_H +#define TRANS_H + +#include "SegmentTypes.h" +#include +#include + + + +class Trans; + +enum class Pull { UP, DOWN, FLOAT }; + +class Segment final { +private: + const std::string id; + +public: + std::set gates; + std::set c1c2s; + bool dmos; + bool vss; + bool vcc; + + Pull pull; + bool on; + + + + Segment(const std::string& id) : id(id), dmos(id[0]=='+'), vss(false), vcc(false), pull(dmos ? Pull::UP : Pull::FLOAT), on(false) { + } + + + + void set(const bool up) { + this->pull = (up ? Pull::UP : Pull::DOWN); + } + + bool operator<(const Segment& that) const { return this->id < that.id; } + + + + static unsigned char asByte(Segment* b7, Segment* b6, Segment* b5, Segment* b4, Segment* b3, Segment* b2, Segment* b1, Segment* b0) { + return b7->on << 0x7 | b6->on << 0x6 | b5->on << 0x5 | b4->on << 0x4 | b3->on << 0x3 | b2->on << 0x2 | b1->on << 0x1 | b0->on; + } + + static unsigned short asWord(Segment* bf, Segment* be, Segment* bd, Segment* bc, Segment* bb, Segment* ba, Segment* b9, Segment* b8, Segment* b7, Segment* b6, Segment* b5, Segment* b4, Segment* b3, Segment* b2, Segment* b1, Segment* b0) { + return bf->on << 0xf | be->on << 0xe | bd->on << 0xd | bc->on << 0xc | bb->on << 0xb | ba->on << 0xa | b9->on << 0x9 | b8->on << 0x8 | b7->on << 0x7 | b6->on << 0x6 | b5->on << 0x5 | b4->on << 0x4 | b3->on << 0x3 | b2->on << 0x2 | b1->on << 0x1 | b0->on; + } + +private: + + Segment(const Segment&) = delete; + Segment& operator=(const Segment&) = delete; +}; + + + + + + + +class Trans final { +public: + + Segment* c1; + Segment* c2; + + bool on; + + + + Trans(Segment* c1, Segment* gate, Segment* c2) : c1(c1), c2(c2), on(false) { + c1->c1c2s.insert(this); + gate->gates.insert(this); + c2->c1c2s.insert(this); + } + +private: + + Trans(const Trans&) = delete; + Trans& operator=(const Trans&) = delete; +}; + +#endif /* TRANS_H */ diff --git a/transistors b/transistors new file mode 100644 index 0000000..1bd4725 --- /dev/null +++ b/transistors @@ -0,0 +1,3239 @@ ++##alucout +#alucout -vss ++#(A+B)0 -alua0 -vss ++#(A+B)0 -alub0 -vss ++#(A+B)0 -dpc13_ORS -#aluresult0 ++#(A+B)1 -alua1 -vss ++#(A+B)1 -alub1 -vss ++#(A+B)1 -dpc13_ORS -#aluresult1 ++#(A+B)2 -alua2 -vss ++#(A+B)2 -alub2 -vss ++#(A+B)3 -alua3 -vss ++#(A+B)3 -alub3 -vss ++#(A+B)3 -dpc13_ORS -#aluresult3 ++#(A+B)4 -alua4 -vss ++#(A+B)4 -alub4 -vss ++#(A+B)4 -dpc13_ORS -#aluresult4 ++#(A+B)5 -alua5 -vss ++#(A+B)5 -alub5 -vss ++#(A+B)5 -dpc13_ORS -#aluresult5 ++#(A+B)6 -alua6 -vss ++#(A+B)6 -alub6 -vss ++#(A+B)7 -alua7 -vss ++#(A+B)7 -alub7 -vss ++#(AxB)0 -dpc16_EORS -#aluresult0 ++#(AxB)1 +AxB1 -vss ++#(AxB)2 +A+B2 -?716 ++#(AxB)2 -dpc16_EORS -#aluresult2 ++#(AxB)3 +AxB3 -vss ++#(AxB)3 -dpc16_EORS -#aluresult3 ++#(AxB)4 +#A.B4 -?1583 ++#(AxB)4 -dpc16_EORS -#aluresult4 ++#(AxB)5 +AxB5 -vss ++#(AxB)5 -dpc16_EORS -#aluresult5 ++#(AxB)6 +#A.B6 -?482 ++#(AxB)6 -dpc16_EORS -#aluresult6 ++#(AxB)7 +AxB7 -vss ++#(AxB1).C01 +#C01 -vss ++#(AxB1).C01 +AxB1 -vss ++#(AxB3).C23 +#C23 -vss ++#(AxB3).C23 +AxB3 -vss ++#(AxB5).C45 +#C45 -vss ++#(AxB5).C45 +AxB5 -vss ++#(AxB7).C67 +#C67 -vss ++#(AxB7).C67 +AxB7 -vss ++#(AxBxC)0 +(AxB)0.#C0in -vss ++#(AxBxC)0 +?105 -?406 ++#(AxBxC)0 -dpc17_SUMS -#aluresult0 ++#(AxBxC)1 +#(AxB1).C01 -vss ++#(AxBxC)1 +#C01 -?1388 ++#(AxBxC)1 -dpc17_SUMS -#aluresult1 ++#(AxBxC)2 +(AxB)2.#C12 -vss ++#(AxBxC)2 +C12 -?1572 ++#(AxBxC)2 -dpc17_SUMS -#aluresult2 ++#(AxBxC)3 +#(AxB3).C23 -vss ++#(AxBxC)3 +#C23 -?136 ++#(AxBxC)3 -dpc17_SUMS -#aluresult3 ++#(AxBxC)4 +(AxB)4.#C34 -vss ++#(AxBxC)4 +C34 -?375 ++#(AxBxC)4 -dpc17_SUMS -#aluresult4 ++#(AxBxC)5 +#(AxB5).C45 -vss ++#(AxBxC)5 +#C45 -?547 ++#(AxBxC)5 -dpc17_SUMS -#aluresult5 ++#(AxBxC)6 +(AxB)6.#C56 -vss ++#(AxBxC)7 +#(AxB7).C67 -vss ++#A.B0 -alub0 -?316 ++#A.B0 -dpc15_ANDS -#aluresult0 ++#A.B1 -alub1 -?189 ++#A.B1 -dpc14_SRS -#aluresult0 ++#A.B1 -dpc15_ANDS -#aluresult1 ++#A.B2 -alub2 -?452 ++#A.B2 -dpc15_ANDS -#aluresult2 ++#A.B3 -alub3 -?313 ++#A.B3 -dpc14_SRS -#aluresult2 ++#A.B3 -dpc15_ANDS -#aluresult3 ++#A.B4 -alub4 -?185 ++#A.B4 -dpc15_ANDS -#aluresult4 ++#A.B5 -alub5 -?1559 ++#A.B6 -dpc15_ANDS -#aluresult6 ++#A.B7 -alub7 -?1695 ++#C01 +C01 -vss ++#C12 +?936 -vss ++#C23 +C23 -vss ++#C34 +?988 -vss ++#C34 +C23 -?924 ++#C34 +DC34 -vss ++#C45 +C45 -vss ++#C56 +?647 -vss ++#C56 +C45 -?165 ++#C67 +C67 -vss ++#C78 +?748 -vss ++#C78 +C67 -?1617 ++#DA-ADD1 +alu1 -vss ++#DA-ADD2 +alu2 -vss ++#DBE +?962 -vss ++#DBE -cclk -vss ++#DBZ +DBZ -vss ++#IRQP -IRQP -vss ++#NMIG +?1312 -vss ++#NMIG -?1149 -vss ++#NMIP +?1392 -?346 ++#NMIP +NMIP -vss ++#TWOCYCLE +PD-1xx000x0 -vss ++#TWOCYCLE +PD-xxx010x1 -vss ++#TWOCYCLE -cp1 -#TWOCYCLE.phi1 ++#VEC +VEC0 -vss ++#VEC +VEC1 -vss ++#WR +?1258 -vss ++#WR +?1642 -vss ++#WR +?335 -vss ++#WR +?440 -vss ++#WR +op-T2-php/pha -vss ++#WR +op-T4-brk -vss ++#WR -cclk -pipe#WR.phi2 ++#alucout +alucout -vss ++#op-T3-branch +op-T3-branch -vss ++#op-branch-bit6 +ir6 -vss ++#op-branch-bit7 +ir7 -vss ++#op-branch-done +op-branch-done -vss ++#op-set-C +op-T+-asl/rol-a -vss ++#op-set-C +op-T+-cmp -vss ++#op-set-C +op-T+-cpx/cpy-abs -vss ++#op-set-C +op-T+-cpx/cpy-imm/zp -vss ++#op-set-C +op-asl/rol -?591 ++#op-set-C +x-op-T+-adc/sbc -vss ++#op-set-C -cclk -pipeUNK08 ++#op-store +op-store -vss ++#pchp1 -?126 -vss ++#pchp3 -?1061 -vss ++#pchp5 -?469 -vss ++#pchp7 -?663 -vss ++#pclp0 -?526 -vss ++#pclp2 -?1411 -vss ++#pclp4 -?15 -vss ++#pclp6 -?993 -vss ++(AxB)0.#C0in +#(AxB)0 -vss ++(AxB)0.#C0in +?105 -vss ++(AxB)2.#C12 +#(AxB)2 -vss ++(AxB)2.#C12 +C12 -vss ++(AxB)4.#C34 +#(AxB)4 -vss ++(AxB)4.#C34 +C34 -vss ++(AxB)6.#C56 +#(AxB)6 -vss ++(AxB)6.#C56 +C56 -vss ++0/ADL0 -pipeVectorA0 -vss ++0/ADL1 -pipeVectorA1 -vss ++0/ADL2 +?815 -vss ++?10 +?1211 -vss ++?10 +?467 -vss ++?10 +op-branch-done -vss ++?1002 +?1219 -vss ++?1007 +dpc34_PCLC -vss ++?1010 -pch0 -vss ++?1016 -adl1 -vss ++?1018 +?762 -vss ++?1024 -?94 -vss ++?1026 +abl7 -vss ++?1028 +?251 -vss ++?1033 +?241 -vss ++?1034 +abh2 -vss ++?1037 +op-T2-pha -vss ++?1037 -cclk -?266 ++?1038 +#A.B6 -vss ++?1039 -cp1 -?24 ++?1039 -notRdy0 -?2 ++?1039 -pipeUNK40 -vss ++?104 +?275 -vss ++?104 +?440 -vss ++?104 +?847 -vss ++?104 +nnT2BR -vss ++?104 +op-T4-jmp -vss ++?104 -cclk -?1221 ++?1043 +?818 -vss ++?1044 +?31 -vss ++?1044 +?812 -vss ++?1045 -?69 -vss ++?1046 -adl7 -vss ++?1047 +?830 -vss ++?105 +notalucin -vss ++?1054 +C1x5Reset -vss ++?1055 +#op-T3-branch -vss ++?1055 +branch-back.phi1 -vss ++?1056 +?761 -vss ++?1065 +op-T0-cli/sei -vss ++?1065 -cclk -?1124 ++?1067 +?582 -vss ++?1069 +?1024 -vss ++?1069 -?1274 -vss ++?1070 -pch1 -vss ++?1073 +?344 -?557 ++?1075 -db4 -vss ++?108 +?1364 -vss ++?1081 +?1560 -vss ++?1083 +pd3.clearIR -vss ++?1085 +?372 -?1172 ++?1087 +?717 -vss ++?1087 +brk-done -vss ++?1089 -?1574 -vss ++?1089 -cp1 -?1529 ++?109 +?1380 -vss ++?1090 +?1222 -vss ++?1090 +op-T2-stack-access -vss ++?1090 -cclk -?1683 ++?1093 -?968 -vss ++?1093 -cp1 -?226 ++?1094 -adl5 -vss ++?1097 +?345 -vss ++?1097 +?432 -vss ++?1099 +?1542 -?1568 ++?11 +?397 -?1563 ++?11 +op-ANDS -vss ++?11 +op-T0-shift-a -vss ++?11 +op-T0-tax -vss ++?11 +op-T0-tay -vss ++?11 -cclk -?55 ++?1101 +?813 -?1508 ++?1101 -cclk -?190 ++?1106 +op-T0-cpx/inx -vss ++?1106 +op-T0-dex -vss ++?1106 +op-T0-txs -vss ++?1106 +op-T2-ind-x -vss ++?1106 +x-op-T0-txa -vss ++?1106 -cclk -?1404 ++?1107 +op-T2-ind-y -vss ++?1107 +op-T3-abs-idx -vss ++?1107 +op-T3-ind-x -vss ++?1107 +op-T4-ind-y -vss ++?1107 +op-inc/nop -?1555 ++?1107 +op-plp/pla -vss ++?1109 +?1464 -vss ++?1109 -?902 -vss ++?111 -cclk -pd2 ++?111 -db2 -vss ++?1115 +?270 -vss ++?1115 +?620 -vss ++?1117 +?70 -vss ++?1117 -cclk -pipeVectorA1 ++?1120 -notRdy0 -vss ++?1129 +?358 -vss ++?1129 -cp1 -vss ++?1130 +?1002 -vss ++?1130 +?1109 -vss ++?1130 +?1258 -vss ++?1130 +?192 -vss ++?1130 +?862 -vss ++?1130 -cclk -?512 ++?1133 +ir0 -vss ++?1133 +ir1 -vss ++?1135 -sb5 -vss ++?1137 +?790 -?816 ++?1141 -?982 -vss ++?1141 -cp1 -?101 ++?1145 +op-T0-ora -vss ++?1145 -notRdy0 -vss ++?1153 +abh7 -vss ++?1154 +?959 -vss ++?1154 -notRdy0 -vss ++?1157 +?291 -vss ++?1159 +?1580 -vss ++?1159 +?613 -vss ++?1166 +?329 -vss ++?1169 +notx0 -vss ++?1169 -cclk -x0 ++?1169 -dpc2_XSB -dasb0 ++?1170 +?755 -vss ++?1170 +?781 -vss ++?1175 -?1447 -vss ++?1175 -cclk -pipeUNK28 ++?1178 -pipeUNK30 -vss ++?1178 -pipeUNK31 -vss ++?1178 -pipeUNK32 -vss ++?1178 -pipeUNK33 -vss ++?1179 +C34 -vss ++?1179 +dpc22_#DSA -vss ++?1179 -cclk -?393 ++?118 +?334 -vss ++?1180 -cp1 -?1533 ++?1180 -notRdy0 -vss ++?1180 -pipe#T0 -vss ++?1181 +?1595 -?793 ++?1181 -cp1 -?69 ++?1184 +?1253 -?1498 ++?1187 -cclk -nots6 ++?1187 -s6 -vss ++?1190 -cclk -nots2 ++?1190 -s2 -vss ++?1192 +?609 -?1547 ++?1194 -cclk -pipeUNK04 ++?1194 -p3 -vss ++?1195 +abl6 -vss ++?1199 -cclk -notidl2 ++?1199 -db2 -vss ++?1202 +?1265 -vss ++?1205 +?233 -?569 ++?1205 +?811 -?100 ++?1209 +?1213 -vss ++?1209 +?609 -?1264 ++?1209 -cclk -?663 ++?1211 +?1002 -vss ++?1211 +?1286 -vss ++?1211 +?862 -vss ++?1211 +nnT2BR -vss ++?1211 +op-T2-abs-access -vss ++?1213 +?453 -vss ++?1213 +?609 -vss ++?1214 -pipeUNK11 -vss ++?1215 +?238 -vss ++?1215 +brk-done -vss ++?1215 +short-circuit-idx-add -vss ++?1218 -?1565 -vss ++?1219 +op-T5-jsr -vss ++?122 +#(AxB)6 -vss ++?1222 +?1225 -vss ++?1223 -?43 -vss ++?1223 -?688 -vss ++?1224 -idb0 -vss ++?1225 +op-T2-ind -vss ++?1225 +op-T2-zp/zp-idx -vss ++?1225 -cclk -pipedpc28 ++?1229 +?919 -?835 ++?1229 -cclk -#pchp0 ++?123 -adl0 -vss ++?1230 -?360 -vss ++?1230 -?43 -vss ++?1231 -?1409 -vss ++?1231 -cclk -pipeUNK21 ++?1238 +?1295 -vss ++?1240 +?1566 -vss ++?1244 +op-xy -vss ++?1245 +aluvout -vss ++?1251 +noty7 -vss ++?1251 -cclk -y7 ++?1251 -dpc0_YSB -sb7 ++?1253 +?1542 -vss ++?1253 +?783 -vss ++?1255 +?531 -vss ++?1256 +?91 -vss ++?1257 +?1218 -vss ++?1257 +notalucout -vss ++?1258 +?390 -vss ++?1260 -?598 -vss ++?1262 -?1679 -vss ++?1265 -pch2 -vss ++?1267 -adh1 -vss ++?1267 -cp1 -?1298 ++?127 +?519 -vss ++?127 -cp1 -vss ++?1270 -?43 -vss ++?1270 -?509 -vss ++?1271 +?1596 -vss ++?1275 +ONEBYTE -vss ++?1275 -cp1 -?1581 ++?1275 -notRdy0 -vss ++?1275 -pipeIPCrelated -vss ++?1277 -?1020 -vss ++?128 -a7 -vss ++?1281 -db3 -vss ++?1286 +?470 -vss ++?1286 +?930 -vss ++?1289 -?902 -vss ++?1290 -?1126 -vss ++?1290 -cp1 -?698 ++?1293 +#op-branch-bit6 -vss ++?1293 +#op-branch-bit7 -vss ++?1293 +?318 -vss ++?1295 -?1527 -vss ++?130 +?220 -vss ++?1303 +?335 -?1397 ++?1304 +?673 -vss ++?1304 +op-T0-sbc -vss ++?1305 +?772 -vss ++?1309 +pd6.clearIR -vss ++?1309 -cp1 -?74 ++?1312 -?1291 -vss ++?1312 -?1693 -vss ++?1315 +abh0 -vss ++?1316 +?232 -vss ++?1316 +?344 -vss ++?1319 -db1 -vss ++?132 +?31 -vss ++?1323 +?631 -vss ++?133 -?1404 -vss ++?133 -cclk -vss ++?1335 +?628 -vss ++?1339 -?799 -vss ++?1339 -cp1 -?597 ++?134 +op-brk/rti -vss ++?134 +op-jsr -vss ++?134 +x-op-jmp -vss ++?1343 +?152 -vss ++?1343 -notRdy0 -vss ++?1344 +?556 -vss ++?1345 +?937 -vss ++?1345 +dpc36_#IPC -vss ++?1346 +abh3 -vss ++?1347 +?550 -vss ++?1347 +?782 -vss ++?1347 +?862 -vss ++?1347 +?979 -vss ++?1347 +nnT2BR -vss ++?1347 +op-T0-shift-a -vss ++?1347 -cclk -?1527 ++?1356 -a6 -vss ++?1357 -?223 -vss ++?1358 +?1109 -vss ++?1358 +?917 -vss ++?1358 +op-T0-txs -vss ++?1358 -cclk -?521 ++?1364 -?101 -vss ++?1368 +?1578 -vss ++?1368 +?645 -vss ++?1368 +NMIL -vss ++?1368 -cp1 -?1149 ++?1369 -?897 -vss ++?1371 +?1045 -vss ++?1371 +?201 -vss ++?1371 +?846 -vss ++?1375 -?88 -vss ++?1375 -cp1 -?95 ++?1376 -cp1 -notdor2 ++?1376 -idb2 -vss ++?1377 +op-rti/rts -vss ++?1379 +x-op-T0-bit -vss ++?1379 -cclk -pipeUNK10 ++?1380 +?1154 -vss ++?1380 +?819 -vss ++?1383 -idb5 -vss ++?1386 +?1316 -?426 ++?1389 -dpc4_SSB -sb2 ++?1389 -dpc7_SS -s2 ++?1389 -nots2 -vss ++?139 +op-SRS -vss ++?1391 +op-T2-php -vss ++?1391 +op-T4-brk -vss ++?1391 -cclk -pipeUNK15 ++?1392 -nmi -vss ++?1399 +?1715 -vss ++?14 +Reset0 -vss ++?14 -?323 -vss ++?14 -?671 -vss ++?14 -cclk -pipeUNK20 ++?1400 -pch4 -vss ++?1401 -?1269 -vss ++?1402 +?293 -?57 ++?1402 -cclk -#pchp2 ++?1408 +?1044 -?1000 ++?1412 +?1455 -vss ++?1413 +?1260 -vss ++?1416 -idb6 -vss ++?1423 +abh5 -vss ++?1427 +?236 -vss ++?1427 +nnT2BR -vss ++?1433 +#op-branch-bit6 -vss ++?1433 +?201 -vss ++?1433 +?90 -vss ++?1440 -notRdy0 -vss ++?1441 +?1277 -vss ++?1446 +?850 -vss ++?1446 +branch-back.phi1 -vss ++?1448 +?1427 -vss ++?1449 +?958 -vss ++?1455 +op-T+-adc/sbc -vss ++?1455 +op-T+-ora/and/eor/adc -vss ++?1455 +op-T+-shift-a -vss ++?1455 +op-T0-lda -vss ++?1455 +op-T0-pla -vss ++?1455 +op-T0-txa -vss ++?1455 +op-T0-tya -vss ++?1455 -cclk -?1505 ++?1457 +?1492 -vss ++?1457 +?781 -vss ++?146 +?5 -vss ++?146 -cclk -a0 ++?146 -dpc26_ACDB -idb0 ++?1462 +?1369 -vss ++?1463 +dor4 -vss ++?1463 -RnWstretched -vss ++?1464 +op-T0-jsr -vss ++?1464 +op-T0-php/pha -vss ++?1464 +op-T3-plp/pla -vss ++?1464 +op-T4-rts -vss ++?1464 +op-T5-brk -vss ++?1464 +op-T5-rti -vss ++?1471 +D1x1 -vss ++?1474 -cp1 -notdor1 ++?1474 -idb1 -vss ++?1486 +?200 -vss ++?1486 +?919 -?1538 ++?1488 +?278 -vss ++?149 +alu6 -vss ++?1491 +noty2 -vss ++?1491 -dpc0_YSB -sb2 ++?1492 -pipeUNK02 -vss ++?1495 -cp1 -p3 ++?1497 -pipeUNK41 -vss ++?1499 -?1450 -vss ++?1500 +?1345 -vss ++?1500 +dpc36_#IPC -?1706 ++?1500 -cclk -?526 ++?1507 -adl3 -vss ++?1507 -cp1 -?864 ++?1511 -pipeUNK29 -vss ++?1517 +?572 -vss ++?1517 +?853 -vss ++?1518 +?1270 -vss ++?1519 -adl4 -vss ++?152 +?1002 -vss ++?152 +?630 -vss ++?152 +?952 -vss ++?152 +op-T2 -vss ++?1523 +abh6 -vss ++?1526 -?680 -vss ++?1526 -cp1 -?1450 ++?1531 +noty3 -vss ++?1534 -?43 -vss ++?1534 -?805 -vss ++?154 -?512 -vss ++?1541 -?1477 -vss ++?1541 -?43 -vss ++?1542 +?1345 -?1685 ++?1548 -adl6 -vss ++?1549 -a1 -vss ++?1552 +?1593 -vss ++?1560 +?1055 -vss ++?1560 +op-T0-cmp -vss ++?1560 +op-T0-cpx/cpy/inx/iny -vss ++?1566 -?1221 -vss ++?1573 -idb2 -vss ++?1575 +?1357 -vss ++?1575 -?1360 -vss ++?1575 -cclk -pipeT2out ++?1578 -pipe#VEC -vss ++?1580 -sb2 -vss ++?1585 -cclk -vss ++?1586 +op-T0-tsx -vss ++?1586 -cclk -?621 ++?1588 -cclk -pd5 ++?1588 -db5 -vss ++?1592 +?128 -vss ++?1592 -cclk -a7 ++?1592 -dpc24_ACSB -sb7 ++?1592 -dpc26_ACDB -idb7 ++?1593 -?226 -vss ++?1594 -cclk -?688 ++?1595 +?754 -vss ++?1596 -?1602 -vss ++?1599 -irq -vss ++?16 -notRdy0 -vss ++?160 +?781 -vss ++?160 +op-SRS -vss ++?1600 -idb3 -vss ++?1605 +pd7.clearIR -vss ++?161 -?1113 -vss ++?161 -cclk -vss ++?1610 +AxB3 -vss ++?1610 +DA-AB2 -vss ++?1613 +dor3 -vss ++?1613 -RnWstretched -vss ++?1614 +?1111 -vss ++?1614 -?1177 -vss ++?1614 -pipeUNK03 -vss ++?1618 +?419 -vss ++?1618 -cclk -a2 ++?1618 -dpc24_ACSB -sb2 ++?1618 -dpc26_ACDB -idb2 ++?1619 +?1448 -vss ++?1619 +?182 -vss ++?1621 -idb3 -vss ++?1629 +?1135 -vss ++?1629 +?753 -vss ++?163 +?249 -vss ++?1631 +?1184 -?903 ++?1635 +?966 -vss ++?1638 -cclk -notidl6 ++?1638 -db6 -vss ++?1641 +pd1.clearIR -vss ++?1641 -cp1 -?237 ++?1643 -pcl4 -vss ++?1649 +?1109 -vss ++?1649 +?389 -vss ++?1649 +brk-done -vss ++?1649 +op-T2-abs -vss ++?1649 +op-T2-jsr -vss ++?1649 +op-T4-ind-x -vss ++?1649 +op-jmp -vss ++?1649 +op-rti/rts -vss ++?1649 -cclk -?1027 ++?1649 -notRdy0 -vss ++?1650 +so -vss ++?1650 -cp1 -?94 ++?1654 +?947 -vss ++?1654 -cclk -a3 ++?1654 -dpc26_ACDB -idb3 ++?1655 +?1211 -vss ++?1657 +?523 -?1406 ++?1660 +abl0 -vss ++?1662 -?1124 -vss ++?1668 -adh0 -vss ++?1676 +abl4 -vss ++?1677 +abh4 -vss ++?168 -adh2 -vss ++?168 -cp1 -?836 ++?1682 +#DA-ADD1 -vss ++?1684 -cp1 -notdor6 ++?1684 -idb6 -vss ++?1687 -cp1 -notdor0 ++?1687 -idb0 -vss ++?1688 +?1304 -vss ++?169 +?139 -vss ++?169 -?1624 -vss ++?1694 +notx2 -vss ++?1694 -cclk -x2 ++?1694 -dpc2_XSB -sb2 ++?1697 +?664 -vss ++?17 +?732 -vss ++?17 +?964 -vss ++?1705 +?467 -vss ++?1705 +?630 -vss ++?1705 -cclk -?1020 ++?1709 +notx1 -vss ++?1709 -dpc2_XSB -sb1 ++?1711 -s1 -vss ++?1712 +#NMIG -vss ++?1712 +#VEC -vss ++?1712 +C1x5Reset -vss ++?1712 -cclk -pipeVectorA2 ++?1714 -pipeUNK26 -vss ++?1715 +?358 -vss ++?1716 +?1258 -vss ++?1716 +?218 -vss ++?1716 +?510 -vss ++?1716 +op-T3-branch -vss ++?1717 +?335 -?1604 ++?1717 +op-T0-cpy/iny -vss ++?1717 +op-T0-iny/dey -vss ++?1717 +op-T2-abs-y -vss ++?1717 +op-T2-idx-x-xy -?1351 ++?1717 +op-T3-ind-y -vss ++?1717 +x-op-T0-tya -vss ++?1717 -cclk -?1113 ++?1718 -cp1 -?671 ++?1718 -notRdy0 -vss ++?1719 -a5 -vss ++?172 +abl5 -vss ++?1720 +dor5 -vss ++?1720 -RnWstretched -vss ++?1724 +notx6 -vss ++?1724 -cclk -x6 ++?1724 -dpc2_XSB -sb6 ++?176 +?10 -vss ++?176 +?236 -vss ++?176 -cclk -?598 ++?180 +?1716 -vss ++?180 -notRdy0 -vss ++?182 +?1655 -vss ++?182 +?236 -?1151 ++?182 +?646 -vss ++?182 +op-T5-rts -vss ++?182 -cclk -?265 ++?188 +?1357 -vss ++?188 -?1606 -vss ++?19 +#op-T3-branch -vss ++?19 +notRdy0.delay -vss ++?19 -cclk -pipeUNK18 ++?191 +?347 -vss ++?191 +?790 -vss ++?191 -notRdy0 -vss ++?196 +?543 -vss ++?198 -pipeUNK37 -vss ++?20 +?1316 -vss ++?20 +?344 -?585 ++?200 +?1070 -vss ++?200 +?919 -vss ++?201 +#op-branch-bit7 -vss ++?207 +?293 -?356 ++?207 +?810 -vss ++?207 -cclk -?1061 ++?21 -?1162 -vss ++?21 -?43 -vss ++?212 -adh4 -vss ++?213 -cclk -notidl1 ++?213 -db1 -vss ++?218 +?368 -vss ++?220 -?190 -vss ++?221 -?1579 -vss ++?224 +dor2 -vss ++?224 -RnWstretched -vss ++?225 +?1223 -vss ++?227 +pd4.clearIR -vss ++?227 -cp1 -?703 ++?228 +?21 -vss ++?23 +dor7 -vss ++?23 -RnWstretched -vss ++?231 +PD-xxxx10x0 -vss ++?232 -pcl6 -vss ++?233 +?761 -?970 ++?236 +#op-T3-branch -vss ++?238 -pipeUNK35 -vss ++?241 -?745 -vss ++?242 +notx3 -vss ++?242 -cclk -x3 ++?242 -dpc2_XSB -sb3 ++?243 -idb1 -vss ++?249 -pcl3 -vss ++?25 +?192 -vss ++?25 +?256 -vss ++?251 +#DBE -vss ++?251 +?221 -vss ++?253 -pipeUNK42 -vss ++?254 -adh5 -vss ++?254 -cp1 -?1353 ++?255 +?611 -vss ++?256 +op-T0-brk/rti -vss ++?256 +op-T0-jmp -vss ++?256 +op-T3 -vss ++?256 +op-T4 -vss ++?256 +op-T5-ind-x -vss ++?256 +op-T5-rti -vss ++?256 +op-T5-rts -vss ++?260 +?1205 -vss ++?260 +?852 -vss ++?261 +x-op-T3-abs-idx -vss ++?261 +x-op-T4-ind-y -vss ++?261 -cclk -pipeUNK36 ++?262 -cp1 -?1447 ++?267 +?1175 -vss ++?267 +?544 -vss ++?267 -?785 -vss ++?269 +?1038 -vss ++?269 +AxB7 -vss ++?270 +?503 -vss ++?272 +?236 -vss ++?272 +?646 -vss ++?272 +?862 -vss ++?272 +nnT2BR -vss ++?272 +op-T2-abs-access -vss ++?272 +op-T5-rts -vss ++?275 +?1697 -vss ++?275 +?773 -vss ++?278 -pch6 -vss ++?279 +?253 -vss ++?279 +?507 -vss ++?279 +?954 -vss ++?280 -dpc4_SSB -sb5 ++?280 -dpc7_SS -s5 ++?280 -nots5 -vss ++?282 +?6 -vss ++?284 +?1392 -vss ++?288 +dor1 -vss ++?288 -RnWstretched -vss ++?291 -?1121 -vss ++?293 +?200 -?1367 ++?299 +?1245 -?1723 ++?299 +?1614 -?1616 ++?299 +?587 -vss ++?299 -cp1 -?1625 ++?3 -dpc4_SSB -dasb4 ++?3 -dpc7_SS -s4 ++?3 -nots4 -vss ++?300 +?389 -vss ++?300 +brk-done -vss ++?300 +op-T2-jsr -vss ++?300 +op-T4-ind-x -vss ++?300 +op-rti/rts -vss ++?300 +x-op-T3-ind-y -vss ++?306 +dpc22_#DSA -vss ++?306 -cclk -?581 ++?307 +#op-branch-bit7 -vss ++?307 +?31 -vss ++?307 +?846 -vss ++?31 -cclk -pipeUNK16 ++?31 -p0 -vss ++?311 +?1010 -vss ++?312 -res -vss ++?317 +?445 -vss ++?318 -p1 -vss ++?319 +DA-C01 -?1707 ++?320 -sb1 -vss ++?321 -?398 -vss ++?326 +?1356 -vss ++?326 -cclk -a6 ++?326 -dpc24_ACSB -sb6 ++?326 -dpc26_ACDB -idb6 ++?327 +op-T0-plp -vss ++?327 +x-op-T4-rti -vss ++?329 -pcl1 -vss ++?330 +?538 -?881 ++?330 +?807 -vss ++?332 -dpc4_SSB -dasb0 ++?332 -dpc7_SS -s0 ++?332 -nots0 -vss ++?334 +brk-done -vss ++?334 -p2 -vss ++?335 +#op-store -vss ++?335 +?347 -vss ++?34 -cclk -nots3 ++?34 -s3 -vss ++?340 +op-clv -vss ++?340 -cclk -pipeUNK12 ++?344 +?410 -?814 ++?347 +op-T2-mem-zp -vss ++?347 +op-T3-mem-abs -vss ++?347 +op-T3-mem-zp-idx -vss ++?347 +op-T4-mem-abs-idx -vss ++?347 +op-T5-mem-ind-idx -vss ++?35 -?43 -vss ++?35 -?796 -vss ++?351 -idb6 -vss ++?355 -?621 -vss ++?358 -clk0 -vss ++?36 +?600 -vss ++?36 +?8 -vss ++?366 +?440 -?1012 ++?366 +op-T0-shift-right-a -vss ++?368 +op-T2-jmp-abs -vss ++?368 +op-T2-php/pha -vss ++?368 +op-T4-jmp -vss ++?368 +op-T5-rti/rts -vss ++?368 +x-op-T3-plp/pla -vss ++?368 +xx-op-T5-jsr -vss ++?372 -notRdy0 -vss ++?374 -cclk -pd6 ++?374 -db6 -vss ++?378 +?1357 -vss ++?378 -?18 -vss ++?38 -cp1 -vss ++?383 +op-T2-jsr -vss ++?384 +?1258 -vss ++?384 +?1412 -vss ++?384 +?946 -vss ++?384 +op-ANDS -vss ++?385 +?1377 -vss ++?385 +?604 -vss ++?386 -pcl5 -vss ++?388 +?936 -vss ++?388 +AxB1 -vss ++?388 +DA-AxB2 -vss ++?388 +DA-C01 -vss ++?389 +?1107 -vss ++?390 -?653 -vss ++?392 +?386 -vss ++?396 +?1358 -vss ++?396 -cclk -?796 ++?397 +op-T0-lda -vss ++?400 +?834 -vss ++?409 +pd0.clearIR -vss ++?410 +?1184 -vss ++?410 +?1643 -vss ++?419 -a2 -vss ++?420 -?865 -vss ++?423 -idb7 -vss ++?424 +?198 -vss ++?432 -sb3 -vss ++?436 +notx4 -vss ++?436 -cclk -x4 ++?436 -dpc2_XSB -dasb4 ++?440 -?24 -vss ++?440 -cclk -pipeUNK39 ++?441 +?692 -vss ++?442 +?182 -vss ++?442 -cclk -?509 ++?445 +?862 -vss ++?453 -pch7 -vss ++?457 -cp1 -notdor3 ++?457 -idb3 -vss ++?458 -idb2 -vss ++?46 +?992 -vss ++?46 -notRdy0 -vss ++?462 -?1338 -vss ++?466 +dor6 -vss ++?466 -RnWstretched -vss ++?467 +?134 -vss ++?467 +?470 -vss ++?468 -cp1 -?18 ++?470 +?646 -vss ++?472 +?16 -?1366 ++?472 -cp1 -?1606 ++?472 -notRdy0 -?395 ++?473 +?980 -?1004 ++?473 -cclk -pipeUNK33 ++?474 +?1184 -?766 ++?474 +?410 -vss ++?474 -cclk -?15 ++?476 -?1027 -vss ++?476 -?43 -vss ++?478 -idb4 -vss ++?479 +?61 -vss ++?479 +?739 -vss ++?484 +?1386 -?914 ++?484 -cclk -#pclp7 ++?490 -cclk -notidl4 ++?490 -db4 -vss ++?491 +?1541 -vss ++?494 -adh7 -vss ++?494 -cp1 -?514 ++?496 -cclk -nots5 ++?496 -s5 -vss ++?499 -pch5 -vss ++?5 -a0 -vss ++?501 +?180 -vss ++?501 +?819 -vss ++?501 +Reset0 -vss ++?503 +notir5 -vss ++?506 +?192 -vss ++?506 +?236 -vss ++?507 -?1049 -vss ++?510 +?347 -vss ++?510 +op-rmw -vss ++?510 +x-op-jmp -vss ++?513 +?885 -vss ++?513 +?954 -vss ++?513 +op-T+-bit -vss ++?513 -cclk -pipeUNK06 ++?515 +?1253 -vss ++?515 +?1542 -?1158 ++?515 -cclk -?1411 ++?518 +noty6 -vss ++?518 -cclk -y6 ++?518 -dpc0_YSB -sb6 ++?519 -clk0 -vss ++?525 -?266 -vss ++?525 -cclk -vss ++?531 -?95 -vss ++?533 -cp1 -?599 ++?533 -pipeUNK22 -vss ++?538 +?1599 -vss ++?543 -?339 -vss ++?544 +op-ror -vss ++?548 -cclk -nots7 ++?548 -s7 -vss ++?550 +?384 -vss ++?550 +op-ANDS -vss ++?551 -?393 -vss ++?553 +?1662 -vss ++?553 +?781 -vss ++?556 -a4 -vss ++?564 +noty0 -vss ++?564 -dpc0_YSB -dasb0 ++?566 +?243 -?802 ++?566 +?755 -?580 ++?568 -cclk -notidl5 ++?568 -db5 -vss ++?570 +?122 -vss ++?570 +?647 -vss ++?570 +AxB5 -vss ++?570 +DA-C45 -vss ++?571 +pd2.clearIR -vss ++?571 -cp1 -?343 ++?572 -pipeUNK21 -vss ++?578 +notx5 -vss ++?578 -dpc2_XSB -sb5 ++?582 -?610 -vss ++?583 -idb1 -vss ++?586 +?1619 -vss ++?586 +BRtaken -?1330 ++?586 -cclk -pipeIPCrelated ++?587 -pipeUNK12 -vss ++?588 -cclk -notidl7 ++?588 -db7 -vss ++?593 +?355 -vss ++?595 +op-T4-abs-idx -vss ++?595 +op-T5-ind-y -vss ++?6 -?43 -vss ++?6 -?521 -vss ++?600 -?1341 -vss ++?602 +?133 -vss ++?603 -?47 -vss ++?604 +op-T2-stack -vss ++?604 +op-T3-ind-x -vss ++?604 +op-T3-stack/bit/jmp -vss ++?604 +op-T4-brk/jsr -vss ++?604 +op-T4-rti -vss ++?604 -cclk -?1477 ++?604 -notRdy0 -vss ++?608 -notRdy0.phi1 -vss ++?61 -sb6 -vss ++?611 -?1509 -vss ++?611 -?43 -vss ++?613 +?1682 -?150 ++?613 +?600 -?1362 ++?616 +op-T+-iny/dey -vss ++?616 +op-T0-ldy-mem -vss ++?616 +op-T0-tay/ldy-not-idx -vss ++?616 -cclk -?460 ++?617 +abh1 -vss ++?618 -dpc4_SSB -sb6 ++?618 -dpc5_SADL -adl6 ++?618 -dpc7_SS -s6 ++?618 -nots6 -vss ++?62 -cclk -pd7 ++?62 -db7 -vss ++?620 +?1293 -vss ++?620 +?1371 -vss ++?620 +?1433 -vss ++?620 +?307 -vss ++?624 -idb0 -vss ++?625 -?43 -vss ++?625 -?459 -vss ++?628 -?55 -vss ++?628 -cclk -vss ++?629 -?50 -vss ++?629 -cclk -?760 ++?630 +?726 -vss ++?631 -?878 -vss ++?632 +?1289 -?1058 ++?632 +op-T2-stack -vss ++?632 -cclk -?339 ++?636 +op-T2-branch -vss ++?637 +#A.B7 -vss ++?637 +C67 -vss ++?638 +op-T0 -vss ++?641 -pcl7 -vss ++?645 +NMIP -vss ++?646 +?17 -vss ++?647 +#A.B5 -vss ++?658 +noty4 -vss ++?658 -cclk -y4 ++?658 -dpc0_YSB -dasb4 ++?662 +?625 -vss ++?664 +op-implied -vss ++?669 +op-T0-and -vss ++?669 +op-T0-bit -vss ++?670 +?519 -vss ++?673 +op-T0-adc/sbc -?1053 ++?674 +?25 -vss ++?674 -cclk -?745 ++?678 +?1357 -vss ++?678 -?644 -vss ++?689 +op-T5-brk -vss ++?692 -?43 -vss ++?692 -?460 -vss ++?694 -dpc4_SSB -sb1 ++?694 -dpc7_SS -s1 ++?694 -nots1 -vss ++?695 +C34 -?619 ++?696 +0/ADL0 -vss ++?696 -cclk -?610 ++?70 +#VEC -vss ++?70 +?1054 -vss ++?700 -cclk -?1565 ++?700 -dpc18_#DAA -vss ++?708 +?1230 -vss ++?709 +?1499 -vss ++?71 +?35 -vss ++?714 +?906 -vss ++?715 +?641 -vss ++?717 -?1132 -vss ++?717 -pipephi2Reset0x -vss ++?718 -cclk -notidl0 ++?718 -db0 -vss ++?720 -notRdy0 -vss ++?720 -pipeUNK34 -vss ++?721 -dpc4_SSB -sb7 ++?721 -dpc5_SADL -adl7 ++?721 -nots7 -vss ++?726 +op-T3-abs/idx/ind -vss ++?726 +op-T5-ind-x -vss ++?726 +op-T5-rts -vss ++?726 +x-op-T4-ind-y -vss ++?728 +VEC0 -vss ++?728 -cclk -pipeVectorA0 ++?732 -#TWOCYCLE.phi1 -?106 ++?732 -?1161 -vss ++?733 +noty5 -vss ++?733 -cclk -y5 ++?733 -dpc0_YSB -sb5 ++?735 +?320 -vss ++?735 +?36 -vss ++?743 +?499 -vss ++?743 +?523 -vss ++?747 +?670 -vss ++?748 +#A.B7 -vss ++?75 +?154 -vss ++?753 +?1257 -vss ++?753 +?811 -vss ++?754 -?1673 -vss ++?755 -pipeUNK06 -vss ++?757 +DA-C45 -?939 ++?761 +alu5 -vss ++?762 +?149 -vss ++?762 +?761 -vss ++?763 +?1534 -vss ++?767 +noty1 -vss ++?767 -dpc0_YSB -sb1 ++?769 +dor0 -vss ++?769 -RnWstretched -vss ++?772 -?1674 -vss ++?773 +?646 -vss ++?773 +op-T2-abs-access -vss ++?774 +op-T0-cld/sed -vss ++?779 -cclk -?805 ++?781 -notRdy0 -vss ++?781 -pipeUNK09 -vss ++?782 +?1303 -?1040 ++?783 -pcl2 -vss ++?789 -cp1 -notdor7 ++?789 -idb7 -vss ++?79 +?236 -vss ++?790 +op-asl/rol -vss ++?790 +op-lsr/ror/dec/inc -vss ++?795 +?1649 -vss ++?795 -cclk -?360 ++?797 -cp1 -notdor4 ++?797 -idb4 -vss ++?8 +?551 -vss ++?80 +?1130 -vss ++?80 +?267 -vss ++?80 -cclk -?1333 ++?800 +?525 -vss ++?807 +?1599 -?431 ++?807 +?330 -vss ++?810 +?293 -vss ++?810 +?923 -vss ++?811 +?838 -vss ++?811 +alucout -vss ++?812 +?440 -vss ++?812 +?646 -vss ++?813 +?1258 -vss ++?813 +?440 -vss ++?815 -pipeVectorA2 -vss ++?818 -?265 -vss ++?818 -?43 -vss ++?819 -pipeUNK23 -vss ++?819 -pipephi2Reset0 -vss ++?824 +op-T2-brk -vss ++?824 +op-T3-jsr -vss ++?824 -cclk -?398 ++?824 -cclk -pipeUNK34 ++?83 +?1400 -vss ++?830 -?1505 -vss ++?830 -?43 -vss ++?831 +?1719 -vss ++?831 -cclk -a5 ++?831 -dpc26_ACDB -idb5 ++?834 -?402 -vss ++?837 +op-T0-eor -vss ++?838 -?581 -vss ++?839 -cp1 -vss ++?842 +abl1 -vss ++?844 +op-T+-dex -vss ++?844 +op-T+-inx -vss ++?844 +op-T0-ldx/tax/tsx -vss ++?844 -cclk -?459 ++?845 +?1573 -?1550 ++?846 +#op-branch-bit6 -vss ++?847 +?300 -vss ++?849 +?321 -vss ++?850 -pipeUNK18 -vss ++?852 -sb7 -vss ++?853 +notRdy0.delay -vss ++?854 +?312 -?742 ++?854 +?975 -vss ++?854 -cp1 -?1395 ++?861 -?1452 -vss ++?862 -?666 -vss ++?862 -cclk -pipeT-SYNC ++?867 +#DA-ADD1 -vss ++?867 +#DA-ADD2 -vss ++?871 +notx7 -vss ++?871 -cclk -x7 ++?871 -dpc2_XSB -sb7 ++?875 +?523 -?1659 ++?875 +?743 -vss ++?876 +?867 -vss ++?877 +?506 -vss ++?877 +?933 -vss ++?880 -adh6 -vss ++?882 -?1252 -vss ++?882 -?597 -vss ++?883 -adh3 -vss ++?885 +?384 -vss ++?889 +op-T0-clc/sec -vss ++?889 -cclk -pipeUNK42 ++?896 -cclk -notidl3 ++?896 -db3 -vss ++?90 -?1625 -vss ++?906 -?1333 -vss ++?91 -?1529 -vss ++?913 -?1699 -vss ++?913 -cp1 -?1274 ++?916 +?1517 -vss ++?917 +?383 -vss ++?917 -notRdy0 -vss ++?920 -cp1 -?785 ++?920 -pipeUNK27 -vss ++?923 -pch3 -vss ++?928 +pd5.clearIR -vss ++?928 -cp1 -?1378 ++?929 +?1549 -vss ++?929 -cclk -a1 ++?929 -dpc26_ACDB -idb1 ++?93 -db0 -vss ++?930 +?134 -vss ++?930 -?1276 -vss ++?931 -?415 -vss ++?931 -cp1 -?1674 ++?935 -adl2 -vss ++?936 +#A.B1 -vss ++?937 -pcl0 -vss ++?944 +?1449 -vss ++?944 -?759 -vss ++?947 -a3 -vss ++?951 +abl2 -vss ++?952 +?272 -vss ++?952 -cclk -?1509 ++?954 -pipeUNK08 -vss ++?956 +?476 -vss ++?958 +rdy -vss ++?959 -cp1 -?323 ++?959 -pipeUNK20 -vss ++?959 -short-circuit-branch-add -vss ++?961 -cp1 -notdor5 ++?961 -idb5 -vss ++?962 +?1585 -vss ++?964 -?1533 -vss ++?964 -pipe#T0 -vss ++?966 -?1683 -vss ++?969 +?161 -vss ++?973 -cclk -nots4 ++?973 -s4 -vss ++?975 +?854 -vss ++?975 +?995 -?886 ++?979 +?905 -vss ++?980 +op-T3-jmp -vss ++?983 -cclk -nots0 ++?983 -s0 -vss ++?988 +#A.B3 -vss ++?990 +abl3 -vss ++?992 +?595 -vss ++?995 +?312 -vss ++?998 -dpc4_SSB -sb3 ++?998 -dpc7_SS -s3 ++?998 -nots3 -vss ++A+B0 +#(A+B)0 -vss ++A+B1 +#(A+B)1 -vss ++A+B2 +#(A+B)2 -vss ++A+B3 +#(A+B)3 -vss ++A+B4 +#(A+B)4 -vss ++A+B5 +#(A+B)5 -vss ++A+B6 +#(A+B)6 -vss ++A+B7 +#(A+B)7 -vss ++AxB1 +#(A+B)1 -vss ++AxB1 +?936 -vss ++AxB3 +#(A+B)3 -vss ++AxB3 +?988 -vss ++AxB5 +#(A+B)5 -vss ++AxB5 +?647 -vss ++AxB7 +#(A+B)7 -vss ++AxB7 +?748 -vss ++BRtaken +?1115 -vss ++C01 +#(A+B)0 -vss ++C01 +#A.B0 -?942 ++C12 +#C12 -vss ++C1x5Reset +?717 -vss ++C23 +#(A+B)2 -vss ++C34 +#C34 -vss ++C45 +#(A+B)4 -vss ++C56 +#C56 -vss ++C67 +#(A+B)6 -vss ++D1x1 +C1x5Reset -vss ++D1x1 +INTG -vss ++D1x1 -cp1 -?1472 ++DA-AB2 +#A.B2 -vss ++DA-AxB2 +#(A+B)2 -vss ++DA-AxB2 +DA-AB2 -vss ++DA-C01 +#(A+B)0 -vss ++DA-C01 +#A.B0 -?1354 ++DA-C45 +#C45 -vss ++DBNeg -idb7 -vss ++DBZ -idb0 -vss ++DBZ -idb1 -vss ++DBZ -idb2 -vss ++DBZ -idb3 -vss ++DBZ -idb4 -vss ++DBZ -idb5 -vss ++DBZ -idb6 -vss ++DBZ -idb7 -vss ++DC34 -dpc18_#DAA -vss ++DC78 -dpc18_#DAA -vss ++H1x1 -pipeUNK15 -vss ++INTG +brk-done -vss ++INTG -?760 -vss ++NMIL +?882 -vss ++NMIL -?562 -vss ++NMIL -cclk -?1252 ++NMIP +#NMIP -vss ++ONEBYTE +?231 -vss ++PD-0xx0xx0x +pd1.clearIR -vss ++PD-0xx0xx0x +pd4.clearIR -vss ++PD-0xx0xx0x +pd7.clearIR -vss ++PD-1xx000x0 +?1605 -vss ++PD-1xx000x0 +pd0.clearIR -vss ++PD-1xx000x0 +pd2.clearIR -vss ++PD-1xx000x0 +pd3.clearIR -vss ++PD-1xx000x0 +pd4.clearIR -vss ++PD-n-0xx0xx0x +PD-0xx0xx0x -vss ++PD-xxx010x1 +?1083 -vss ++PD-xxx010x1 +?409 -vss ++PD-xxx010x1 +pd2.clearIR -vss ++PD-xxx010x1 +pd4.clearIR -vss ++PD-xxxx10x0 +?1083 -vss ++PD-xxxx10x0 +pd0.clearIR -vss ++PD-xxxx10x0 +pd2.clearIR -vss ++Pout0 +?31 -vss ++Pout1 +?318 -vss ++Pout1 +H1x1 -idb1 ++Pout2 +?334 -vss ++Pout3 +?1194 -vss ++Pout3 +H1x1 -idb3 ++Pout4 +?1471 -vss ++Pout4 +H1x1 -idb4 ++Pout6 +?90 -vss ++Pout6 +H1x1 -idb6 ++Pout7 +?1045 -vss ++Pout7 +H1x1 -idb7 ++Reset0 -?1395 -vss ++Reset0 -cclk -pipephi2Reset0x ++VEC0 +?689 -vss ++VEC0 -notRdy0 -vss ++VEC1 -?698 -vss ++VEC1 -cclk -?1452 ++abh0 -#ABH0 -vss ++abh1 -#ABH1 -vss ++abh2 -#ABH2 -vss ++abh3 -#ABH3 -vss ++abh4 -#ABH4 -vss ++abh5 -#ABH5 -vss ++abh6 -#ABH6 -vss ++abh7 -#ABH7 -vss ++abl0 -#ABL0 -vss ++abl1 -#ABL1 -vss ++abl2 -#ABL2 -vss ++abl3 -#ABL3 -vss ++abl4 -#ABL4 -vss ++abl5 -#ABL5 -vss ++abl6 -#ABL6 -vss ++abl7 -#ABL7 -vss ++alu0 -dpc20_ADDSB06 -dasb0 ++alu0 -notalu0 -vss ++alu1 -dpc20_ADDSB06 -sb1 ++alu1 -notalu1 -vss ++alu2 -dpc20_ADDSB06 -sb2 ++alu2 -dpc21_ADDADL -adl2 ++alu2 -notalu2 -vss ++alu3 -dpc20_ADDSB06 -sb3 ++alu3 -notalu3 -vss ++alu4 -notalu4 -vss ++alu5 -dpc20_ADDSB06 -sb5 ++alu5 -notalu5 -vss ++alu6 -dpc20_ADDSB06 -sb6 ++alu6 -notalu6 -vss ++alu7 -dpc19_ADDSB7 -sb7 ++alu7 -dpc21_ADDADL -adl7 ++alu7 -notalu7 -vss ++alucin -?590 -vss ++alucout +notalucout -vss ++alurawcout +#C78 -vss ++aluvout -?408 -vss ++branch-back +?1401 -?1198 ++branch-back +DBNeg -?1249 ++branch-back -cp1 -?756 ++branch-back.phi1 +branch-forward.phi1 -vss ++branch-forward.phi1 -?756 -vss ++brk-done +?861 -vss ++brk-done -notRdy0 -vss ++clock2 -?1533 -vss ++dasb1 +?36 -?1322 ++dasb1 +?735 -vss ++dasb1 -dpc23_SBAC -a1 ++dasb2 +?1159 -vss ++dasb3 +?1097 -vss ++dasb3 +?345 -?1686 ++dasb3 -dpc23_SBAC -a3 ++dasb5 +?1629 -vss ++dasb5 +?753 -?1203 ++dasb5 -dpc23_SBAC -a5 ++dasb6 +?479 -vss ++dasb6 +?739 -?1554 ++dasb6 -dpc23_SBAC -a6 ++dasb7 +?260 -vss ++dasb7 -dpc23_SBAC -a7 ++dor0 -notdor0 -vss ++dor1 -notdor1 -vss ++dor2 -notdor2 -vss ++dor3 -notdor3 -vss ++dor4 -notdor4 -vss ++dor5 -notdor5 -vss ++dor6 -notdor6 -vss ++dor7 -notdor7 -vss ++dpc22_#DSA -?599 -vss ++dpc28_0ADH0 -pipedpc28 -vss ++dpc34_PCLC +?1643 -vss ++dpc34_PCLC +?232 -vss ++dpc34_PCLC +?249 -vss ++dpc34_PCLC +?329 -vss ++dpc34_PCLC +?386 -vss ++dpc34_PCLC +?641 -vss ++dpc34_PCLC +?783 -vss ++dpc34_PCLC +?937 -vss ++dpc34_PCLC +dpc36_#IPC -vss ++dpc35_PCHC +?1007 -vss ++dpc35_PCHC +?1010 -vss ++dpc35_PCHC +?1070 -vss ++dpc35_PCHC +?1265 -vss ++dpc35_PCHC +?923 -vss ++fetch +?1214 -vss ++fetch -notRdy0 -vss ++idl0 -notidl0 -vss ++idl1 -notidl1 -vss ++idl2 -notidl2 -vss ++idl3 -notidl3 -vss ++idl4 -notidl4 -vss ++idl5 -notidl5 -vss ++idl6 -notidl6 -vss ++idl7 -notidl7 -vss ++ir0 -?310 -vss ++ir1 -?119 -vss ++ir2 -?1300 -vss ++ir3 -?1620 -vss ++ir4 -?927 -vss ++ir5 -?1609 -vss ++ir6 -?1675 -vss ++ir7 -?541 -vss ++irline3 +?1133 -vss ++nnT2BR +?636 -vss ++nnT2BR -cclk -?1269 ++notRdy0.delay -#notRdy0.delay -vss ++notRnWprepad +C1x5Reset -vss ++notRnWprepad -cp1 -?1579 ++notRnWprepad -cp1 -?759 ++notRnWprepad -notRdy0 -vss ++notRnWprepad -pipe#WR.phi2 -vss ++notalucin +alucin -vss ++notalucout -C78.phi2 -vss ++notalucout -DC78.phi2 -vss ++notaluvout +?637 -vss ++notaluvout +C67 -?1489 ++notir0 +ir0 -vss ++notir0 -cclk -?310 ++notir1 +ir1 -vss ++notir2 +ir2 -vss ++notir3 +ir3 -vss ++notir4 +ir4 -vss ++notir5 +ir5 -vss ++notir6 +ir6 -vss ++notir7 +ir7 -vss ++notx0 -x0 -vss ++notx1 -x1 -vss ++notx2 -x2 -vss ++notx3 -x3 -vss ++notx4 -x4 -vss ++notx5 -x5 -vss ++notx6 -x6 -vss ++notx7 -x7 -vss ++noty0 -y0 -vss ++noty1 -y1 -vss ++noty2 -y2 -vss ++noty3 -y3 -vss ++noty4 -y4 -vss ++noty5 -y5 -vss ++noty6 -y6 -vss ++noty7 -y7 -vss ++op-ANDS +?669 -vss ++op-ANDS -cclk -?1574 ++op-EORS +?837 -vss ++op-EORS -cclk -?982 ++op-ORS +?1145 -vss ++op-ORS -cclk -?88 ++op-SRS +?366 -vss ++op-SRS -cclk -?968 ++op-SUMS +op-ANDS -vss ++op-SUMS +op-EORS -vss ++op-SUMS +op-ORS -vss ++op-SUMS +op-SRS -vss ++op-SUMS -cclk -?415 ++op-T+-adc/sbc +clock2 -vss ++op-T+-adc/sbc +notir0 -vss ++op-T+-adc/sbc +notir5 -vss ++op-T+-adc/sbc +notir6 -vss ++op-T+-asl/rol-a +clock2 -vss ++op-T+-asl/rol-a +ir2 -vss ++op-T+-asl/rol-a +ir4 -vss ++op-T+-asl/rol-a +ir6 -vss ++op-T+-asl/rol-a +ir7 -vss ++op-T+-asl/rol-a +notir1 -vss ++op-T+-asl/rol-a +notir3 -vss ++op-T+-bit +clock2 -vss ++op-T+-bit +ir4 -vss ++op-T+-bit +ir6 -vss ++op-T+-bit +ir7 -vss ++op-T+-bit +irline3 -vss ++op-T+-bit +notir2 -vss ++op-T+-bit +notir5 -vss ++op-T+-cmp +clock2 -vss ++op-T+-cmp +ir5 -vss ++op-T+-cmp +notir0 -vss ++op-T+-cmp +notir6 -vss ++op-T+-cmp +notir7 -vss ++op-T+-cpx/cpy-abs +clock2 -vss ++op-T+-cpx/cpy-abs +ir4 -vss ++op-T+-cpx/cpy-abs +irline3 -vss ++op-T+-cpx/cpy-abs +notir2 -vss ++op-T+-cpx/cpy-abs +notir3 -vss ++op-T+-cpx/cpy-abs +notir6 -vss ++op-T+-cpx/cpy-abs +notir7 -vss ++op-T+-cpx/cpy-imm/zp +clock2 -vss ++op-T+-cpx/cpy-imm/zp +ir3 -vss ++op-T+-cpx/cpy-imm/zp +ir4 -vss ++op-T+-cpx/cpy-imm/zp +irline3 -vss ++op-T+-cpx/cpy-imm/zp +notir6 -vss ++op-T+-cpx/cpy-imm/zp +notir7 -vss ++op-T+-dex +clock2 -vss ++op-T+-dex +ir2 -vss ++op-T+-dex +ir4 -vss ++op-T+-dex +ir5 -vss ++op-T+-dex +notir1 -vss ++op-T+-dex +notir3 -vss ++op-T+-dex +notir6 -vss ++op-T+-dex +notir7 -vss ++op-T+-inx +clock2 -vss ++op-T+-inx +ir2 -vss ++op-T+-inx +ir4 -vss ++op-T+-inx +irline3 -vss ++op-T+-inx +notir3 -vss ++op-T+-inx +notir5 -vss ++op-T+-inx +notir6 -vss ++op-T+-inx +notir7 -vss ++op-T+-iny/dey +clock2 -vss ++op-T+-iny/dey +ir2 -vss ++op-T+-iny/dey +ir4 -vss ++op-T+-iny/dey +ir5 -vss ++op-T+-iny/dey +irline3 -vss ++op-T+-iny/dey +notir3 -vss ++op-T+-iny/dey +notir7 -vss ++op-T+-ora/and/eor/adc +clock2 -vss ++op-T+-ora/and/eor/adc +ir7 -vss ++op-T+-ora/and/eor/adc +notir0 -vss ++op-T+-shift-a +clock2 -vss ++op-T+-shift-a +ir2 -vss ++op-T+-shift-a +ir4 -vss ++op-T+-shift-a +ir7 -vss ++op-T+-shift-a +notir1 -vss ++op-T+-shift-a +notir3 -vss ++op-T0 -clock1 -vss ++op-T0-acc +notir0 -vss ++op-T0-acc -clock1 -vss ++op-T0-adc/sbc +notir0 -vss ++op-T0-adc/sbc +notir5 -vss ++op-T0-adc/sbc +notir6 -vss ++op-T0-adc/sbc -clock1 -vss ++op-T0-and +ir6 -vss ++op-T0-and +ir7 -vss ++op-T0-and +notir0 -vss ++op-T0-and +notir5 -vss ++op-T0-and -clock1 -vss ++op-T0-bit +ir4 -vss ++op-T0-bit +ir6 -vss ++op-T0-bit +ir7 -vss ++op-T0-bit +irline3 -vss ++op-T0-bit +notir2 -vss ++op-T0-bit +notir5 -vss ++op-T0-bit -clock1 -vss ++op-T0-brk/rti +ir2 -vss ++op-T0-brk/rti +ir3 -vss ++op-T0-brk/rti +ir4 -vss ++op-T0-brk/rti +ir5 -vss ++op-T0-brk/rti +ir7 -vss ++op-T0-brk/rti +irline3 -vss ++op-T0-brk/rti -clock1 -vss ++op-T0-clc/sec +ir2 -vss ++op-T0-clc/sec +ir6 -vss ++op-T0-clc/sec +ir7 -vss ++op-T0-clc/sec +irline3 -vss ++op-T0-clc/sec +notir3 -vss ++op-T0-clc/sec +notir4 -vss ++op-T0-clc/sec -clock1 -vss ++op-T0-cld/sed +ir2 -vss ++op-T0-cld/sed +irline3 -vss ++op-T0-cld/sed +notir3 -vss ++op-T0-cld/sed +notir4 -vss ++op-T0-cld/sed +notir6 -vss ++op-T0-cld/sed +notir7 -vss ++op-T0-cld/sed -clock1 -vss ++op-T0-cli/sei +ir2 -vss ++op-T0-cli/sei +ir7 -vss ++op-T0-cli/sei +irline3 -vss ++op-T0-cli/sei +notir3 -vss ++op-T0-cli/sei +notir4 -vss ++op-T0-cli/sei +notir6 -vss ++op-T0-cli/sei -clock1 -vss ++op-T0-cmp +ir5 -vss ++op-T0-cmp +notir0 -vss ++op-T0-cmp +notir6 -vss ++op-T0-cmp +notir7 -vss ++op-T0-cmp -clock1 -vss ++op-T0-cpx/cpy/inx/iny +ir4 -vss ++op-T0-cpx/cpy/inx/iny +irline3 -vss ++op-T0-cpx/cpy/inx/iny +notir6 -vss ++op-T0-cpx/cpy/inx/iny +notir7 -vss ++op-T0-cpx/cpy/inx/iny -clock1 -vss ++op-T0-cpx/inx +ir4 -vss ++op-T0-cpx/inx +irline3 -vss ++op-T0-cpx/inx +notir5 -vss ++op-T0-cpx/inx +notir6 -vss ++op-T0-cpx/inx +notir7 -vss ++op-T0-cpx/inx -clock1 -vss ++op-T0-cpy/iny +ir4 -vss ++op-T0-cpy/iny +ir5 -vss ++op-T0-cpy/iny +irline3 -vss ++op-T0-cpy/iny +notir6 -vss ++op-T0-cpy/iny +notir7 -vss ++op-T0-cpy/iny -clock1 -vss ++op-T0-dex +ir2 -vss ++op-T0-dex +ir4 -vss ++op-T0-dex +ir5 -vss ++op-T0-dex +notir1 -vss ++op-T0-dex +notir3 -vss ++op-T0-dex +notir6 -vss ++op-T0-dex +notir7 -vss ++op-T0-dex -clock1 -vss ++op-T0-eor +ir5 -vss ++op-T0-eor +ir7 -vss ++op-T0-eor +notir0 -vss ++op-T0-eor +notir6 -vss ++op-T0-eor -clock1 -vss ++op-T0-iny/dey +ir2 -vss ++op-T0-iny/dey +ir4 -vss ++op-T0-iny/dey +ir5 -vss ++op-T0-iny/dey +irline3 -vss ++op-T0-iny/dey +notir3 -vss ++op-T0-iny/dey +notir7 -vss ++op-T0-iny/dey -clock1 -vss ++op-T0-jmp +ir4 -vss ++op-T0-jmp +ir7 -vss ++op-T0-jmp +irline3 -vss ++op-T0-jmp +notir2 -vss ++op-T0-jmp +notir3 -vss ++op-T0-jmp +notir6 -vss ++op-T0-jmp -clock1 -vss ++op-T0-jsr +ir2 -vss ++op-T0-jsr +ir3 -vss ++op-T0-jsr +ir4 -vss ++op-T0-jsr +ir6 -vss ++op-T0-jsr +ir7 -vss ++op-T0-jsr +irline3 -vss ++op-T0-jsr +notir5 -vss ++op-T0-jsr -clock1 -vss ++op-T0-lda +ir6 -vss ++op-T0-lda +notir0 -vss ++op-T0-lda +notir5 -vss ++op-T0-lda +notir7 -vss ++op-T0-lda -clock1 -vss ++op-T0-ldx/tax/tsx +ir6 -vss ++op-T0-ldx/tax/tsx +notir1 -vss ++op-T0-ldx/tax/tsx +notir5 -vss ++op-T0-ldx/tax/tsx +notir7 -vss ++op-T0-ldx/tax/tsx -clock1 -vss ++op-T0-ldy-mem +ir6 -vss ++op-T0-ldy-mem +irline3 -vss ++op-T0-ldy-mem +notir2 -vss ++op-T0-ldy-mem +notir5 -vss ++op-T0-ldy-mem +notir7 -vss ++op-T0-ldy-mem -clock1 -vss ++op-T0-ora +ir5 -vss ++op-T0-ora +ir6 -vss ++op-T0-ora +ir7 -vss ++op-T0-ora +notir0 -vss ++op-T0-ora -clock1 -vss ++op-T0-php/pha +ir2 -vss ++op-T0-php/pha +ir4 -vss ++op-T0-php/pha +ir5 -vss ++op-T0-php/pha +ir7 -vss ++op-T0-php/pha +irline3 -vss ++op-T0-php/pha +notir3 -vss ++op-T0-php/pha -clock1 -vss ++op-T0-pla +ir2 -vss ++op-T0-pla +ir4 -vss ++op-T0-pla +ir7 -vss ++op-T0-pla +irline3 -vss ++op-T0-pla +notir3 -vss ++op-T0-pla +notir5 -vss ++op-T0-pla +notir6 -vss ++op-T0-pla -clock1 -vss ++op-T0-plp +ir2 -vss ++op-T0-plp +ir4 -vss ++op-T0-plp +ir6 -vss ++op-T0-plp +ir7 -vss ++op-T0-plp +irline3 -vss ++op-T0-plp +notir3 -vss ++op-T0-plp +notir5 -vss ++op-T0-plp -clock1 -vss ++op-T0-sbc +notir0 -vss ++op-T0-sbc +notir5 -vss ++op-T0-sbc +notir6 -vss ++op-T0-sbc +notir7 -vss ++op-T0-sbc -clock1 -vss ++op-T0-shift-a +ir2 -vss ++op-T0-shift-a +ir4 -vss ++op-T0-shift-a +ir7 -vss ++op-T0-shift-a +notir1 -vss ++op-T0-shift-a +notir3 -vss ++op-T0-shift-a -clock1 -vss ++op-T0-shift-right-a +ir2 -vss ++op-T0-shift-right-a +ir4 -vss ++op-T0-shift-right-a +ir7 -vss ++op-T0-shift-right-a +notir1 -vss ++op-T0-shift-right-a +notir3 -vss ++op-T0-shift-right-a +notir6 -vss ++op-T0-shift-right-a -clock1 -vss ++op-T0-tax +ir2 -vss ++op-T0-tax +ir4 -vss ++op-T0-tax +ir6 -vss ++op-T0-tax +notir1 -vss ++op-T0-tax +notir3 -vss ++op-T0-tax +notir5 -vss ++op-T0-tax +notir7 -vss ++op-T0-tax -clock1 -vss ++op-T0-tay +ir2 -vss ++op-T0-tay +ir4 -vss ++op-T0-tay +ir6 -vss ++op-T0-tay +irline3 -vss ++op-T0-tay +notir3 -vss ++op-T0-tay +notir5 -vss ++op-T0-tay +notir7 -vss ++op-T0-tay -clock1 -vss ++op-T0-tay/ldy-not-idx +ir4 -vss ++op-T0-tay/ldy-not-idx +ir6 -vss ++op-T0-tay/ldy-not-idx +irline3 -vss ++op-T0-tay/ldy-not-idx +notir5 -vss ++op-T0-tay/ldy-not-idx +notir7 -vss ++op-T0-tay/ldy-not-idx -clock1 -vss ++op-T0-tsx +ir2 -vss ++op-T0-tsx +ir6 -vss ++op-T0-tsx +notir1 -vss ++op-T0-tsx +notir3 -vss ++op-T0-tsx +notir4 -vss ++op-T0-tsx +notir5 -vss ++op-T0-tsx +notir7 -vss ++op-T0-tsx -clock1 -vss ++op-T0-txa +ir2 -vss ++op-T0-txa +ir4 -vss ++op-T0-txa +ir5 -vss ++op-T0-txa +ir6 -vss ++op-T0-txa +notir1 -vss ++op-T0-txa +notir3 -vss ++op-T0-txa +notir7 -vss ++op-T0-txa -clock1 -vss ++op-T0-txs +ir2 -vss ++op-T0-txs +ir5 -vss ++op-T0-txs +ir6 -vss ++op-T0-txs +notir1 -vss ++op-T0-txs +notir3 -vss ++op-T0-txs +notir4 -vss ++op-T0-txs +notir7 -vss ++op-T0-txs -clock1 -vss ++op-T0-tya +ir2 -vss ++op-T0-tya +ir5 -vss ++op-T0-tya +ir6 -vss ++op-T0-tya +irline3 -vss ++op-T0-tya +notir3 -vss ++op-T0-tya +notir4 -vss ++op-T0-tya +notir7 -vss ++op-T0-tya -clock1 -vss ++op-T2 +t2 -vss ++op-T2-ADL/ADD +ir3 -vss ++op-T2-ADL/ADD +t2 -vss ++op-T2-abs +ir4 -vss ++op-T2-abs +notir2 -vss ++op-T2-abs +notir3 -vss ++op-T2-abs +t2 -vss ++op-T2-abs-access +notir3 -vss ++op-T2-abs-access +op-push/pull -vss ++op-T2-abs-access +t2 -vss ++op-T2-abs-y +ir2 -vss ++op-T2-abs-y +notir0 -vss ++op-T2-abs-y +notir3 -vss ++op-T2-abs-y +notir4 -vss ++op-T2-abs-y +t2 -vss ++op-T2-branch +ir2 -vss ++op-T2-branch +ir3 -vss ++op-T2-branch +irline3 -vss ++op-T2-branch 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++op-T2-jsr +notir5 -vss ++op-T2-jsr +t2 -vss ++op-T2-mem-zp +ir3 -vss ++op-T2-mem-zp +ir4 -vss ++op-T2-mem-zp +notir2 -vss ++op-T2-mem-zp +t2 -vss ++op-T2-pha +ir2 -vss ++op-T2-pha +ir4 -vss ++op-T2-pha +ir5 -vss ++op-T2-pha +ir7 -vss ++op-T2-pha +irline3 -vss ++op-T2-pha +notir3 -vss ++op-T2-pha +notir6 -vss ++op-T2-pha +t2 -vss ++op-T2-php +ir2 -vss ++op-T2-php +ir4 -vss ++op-T2-php +ir5 -vss ++op-T2-php +ir6 -vss ++op-T2-php +ir7 -vss ++op-T2-php +irline3 -vss ++op-T2-php +notir3 -vss ++op-T2-php +t2 -vss ++op-T2-php/pha +ir2 -vss ++op-T2-php/pha +ir4 -vss ++op-T2-php/pha +ir5 -vss ++op-T2-php/pha +ir7 -vss ++op-T2-php/pha +irline3 -vss ++op-T2-php/pha +notir3 -vss ++op-T2-php/pha +t2 -vss ++op-T2-stack +ir2 -vss ++op-T2-stack +ir4 -vss ++op-T2-stack +ir7 -vss ++op-T2-stack +irline3 -vss ++op-T2-stack +t2 -vss ++op-T2-stack-access +ir2 -vss ++op-T2-stack-access +ir4 -vss ++op-T2-stack-access +ir7 -vss ++op-T2-stack-access +irline3 -vss ++op-T2-stack-access +t2 -vss ++op-T2-zp/zp-idx +ir3 -vss ++op-T2-zp/zp-idx +notir2 -vss ++op-T2-zp/zp-idx +t2 -vss ++op-T3 +t3 -vss ++op-T3-abs-idx +notir3 -vss ++op-T3-abs-idx +notir4 -vss ++op-T3-abs-idx +t3 -vss ++op-T3-abs/idx/ind +notir3 -vss ++op-T3-abs/idx/ind +op-push/pull -vss ++op-T3-abs/idx/ind +t3 -vss ++op-T3-branch +ir2 -vss ++op-T3-branch +ir3 -vss ++op-T3-branch +irline3 -vss ++op-T3-branch +notir4 -vss ++op-T3-branch +t3 -vss ++op-T3-ind-x +ir2 -vss ++op-T3-ind-x +ir3 -vss ++op-T3-ind-x +ir4 -vss ++op-T3-ind-x +notir0 -vss ++op-T3-ind-x +t3 -vss ++op-T3-ind-y +ir2 -vss ++op-T3-ind-y +ir3 -vss ++op-T3-ind-y +notir0 -vss ++op-T3-ind-y +notir4 -vss ++op-T3-ind-y +t3 -vss ++op-T3-jmp +ir4 -vss ++op-T3-jmp +ir7 -vss ++op-T3-jmp +irline3 -vss ++op-T3-jmp +notir2 -vss ++op-T3-jmp +notir3 -vss ++op-T3-jmp +notir6 -vss ++op-T3-jmp +t3 -vss ++op-T3-jsr +ir2 -vss ++op-T3-jsr +ir3 -vss ++op-T3-jsr +ir4 -vss ++op-T3-jsr +ir6 -vss ++op-T3-jsr +ir7 -vss ++op-T3-jsr +irline3 -vss ++op-T3-jsr +notir5 -vss ++op-T3-jsr +t3 -vss ++op-T3-mem-abs +ir4 -vss ++op-T3-mem-abs +notir2 -vss ++op-T3-mem-abs +notir3 -vss ++op-T3-mem-abs +t3 -vss ++op-T3-mem-zp-idx +ir3 -vss ++op-T3-mem-zp-idx +notir2 -vss ++op-T3-mem-zp-idx +notir4 -vss ++op-T3-mem-zp-idx +t3 -vss ++op-T3-plp/pla +ir2 -vss ++op-T3-plp/pla +ir4 -vss ++op-T3-plp/pla +ir7 -vss ++op-T3-plp/pla +irline3 -vss ++op-T3-plp/pla +notir3 -vss ++op-T3-plp/pla +notir5 -vss ++op-T3-plp/pla +t3 -vss ++op-T3-stack/bit/jmp +ir4 -vss ++op-T3-stack/bit/jmp +ir7 -vss ++op-T3-stack/bit/jmp +irline3 -vss ++op-T3-stack/bit/jmp +t3 -vss ++op-T4 +t4 -vss ++op-T4-abs-idx +notir3 -vss ++op-T4-abs-idx +notir4 -vss ++op-T4-abs-idx +t4 -vss ++op-T4-brk +ir2 -vss ++op-T4-brk +ir3 -vss ++op-T4-brk +ir4 -vss ++op-T4-brk +ir5 -vss ++op-T4-brk +ir6 -vss ++op-T4-brk +ir7 -vss ++op-T4-brk +irline3 -vss ++op-T4-brk +t4 -vss ++op-T4-brk/jsr +ir2 -vss ++op-T4-brk/jsr +ir3 -vss ++op-T4-brk/jsr +ir4 -vss ++op-T4-brk/jsr +ir6 -vss ++op-T4-brk/jsr +ir7 -vss ++op-T4-brk/jsr +irline3 -vss ++op-T4-brk/jsr +t4 -vss ++op-T4-ind-x +ir2 -vss ++op-T4-ind-x +ir3 -vss ++op-T4-ind-x +ir4 -vss ++op-T4-ind-x +notir0 -vss ++op-T4-ind-x +t4 -vss ++op-T4-ind-y +ir2 -vss ++op-T4-ind-y +ir3 -vss ++op-T4-ind-y +notir0 -vss ++op-T4-ind-y +notir4 -vss ++op-T4-ind-y +t4 -vss ++op-T4-jmp +ir4 -vss ++op-T4-jmp +ir7 -vss ++op-T4-jmp +irline3 -vss ++op-T4-jmp +notir2 -vss ++op-T4-jmp +notir3 -vss ++op-T4-jmp +notir6 -vss ++op-T4-jmp +t4 -vss ++op-T4-mem-abs-idx +notir3 -vss ++op-T4-mem-abs-idx +notir4 -vss ++op-T4-mem-abs-idx +t4 -vss ++op-T4-rti +ir2 -vss ++op-T4-rti +ir3 -vss ++op-T4-rti +ir4 -vss ++op-T4-rti +ir5 -vss ++op-T4-rti +ir7 -vss ++op-T4-rti +irline3 -vss ++op-T4-rti +notir6 -vss ++op-T4-rti +t4 -vss ++op-T4-rts +ir2 -vss ++op-T4-rts +ir3 -vss ++op-T4-rts +ir4 -vss ++op-T4-rts +ir7 -vss ++op-T4-rts +irline3 -vss ++op-T4-rts +notir5 -vss ++op-T4-rts +notir6 -vss ++op-T4-rts +t4 -vss ++op-T5-brk +ir2 -vss ++op-T5-brk +ir3 -vss ++op-T5-brk +ir4 -vss ++op-T5-brk +ir5 -vss ++op-T5-brk +ir6 -vss ++op-T5-brk +ir7 -vss ++op-T5-brk +irline3 -vss ++op-T5-brk +t5 -vss ++op-T5-ind-x +ir2 -vss ++op-T5-ind-x +ir3 -vss ++op-T5-ind-x +ir4 -vss ++op-T5-ind-x +notir0 -vss ++op-T5-ind-x +t5 -vss ++op-T5-ind-y +ir2 -vss ++op-T5-ind-y +ir3 -vss ++op-T5-ind-y +notir0 -vss ++op-T5-ind-y +notir4 -vss ++op-T5-ind-y +t5 -vss ++op-T5-jsr +ir2 -vss ++op-T5-jsr +ir3 -vss ++op-T5-jsr +ir4 -vss ++op-T5-jsr +ir6 -vss ++op-T5-jsr +ir7 -vss ++op-T5-jsr +irline3 -vss ++op-T5-jsr +notir5 -vss ++op-T5-jsr +t5 -vss ++op-T5-mem-ind-idx +ir2 -vss ++op-T5-mem-ind-idx +ir3 -vss ++op-T5-mem-ind-idx +notir0 -vss ++op-T5-mem-ind-idx +t5 -vss ++op-T5-rti +ir2 -vss ++op-T5-rti +ir3 -vss ++op-T5-rti +ir4 -vss ++op-T5-rti +ir5 -vss ++op-T5-rti +ir7 -vss ++op-T5-rti +irline3 -vss ++op-T5-rti +notir6 -vss ++op-T5-rti +t5 -vss ++op-T5-rti/rts +ir2 -vss ++op-T5-rti/rts +ir3 -vss ++op-T5-rti/rts +ir4 -vss ++op-T5-rti/rts +ir7 -vss ++op-T5-rti/rts +irline3 -vss ++op-T5-rti/rts +notir6 -vss ++op-T5-rti/rts +t5 -vss ++op-T5-rts +ir2 -vss ++op-T5-rts +ir3 -vss ++op-T5-rts +ir4 -vss ++op-T5-rts +ir7 -vss ++op-T5-rts +irline3 -vss ++op-T5-rts +notir5 -vss ++op-T5-rts +notir6 -vss ++op-T5-rts +t5 -vss ++op-asl/rol +ir6 -vss ++op-asl/rol +ir7 -vss ++op-asl/rol +notir1 -vss ++op-branch-done +?603 -vss ++op-branch-done +ir2 -vss ++op-branch-done +ir3 -vss ++op-branch-done +irline3 -vss ++op-branch-done +notir4 -vss ++op-branch-done -clock1 -vss ++op-brk/rti +ir2 -vss ++op-brk/rti +ir3 -vss ++op-brk/rti +ir4 -vss ++op-brk/rti +ir5 -vss ++op-brk/rti +ir7 -vss ++op-brk/rti +irline3 -vss ++op-clv +ir2 -vss ++op-clv +ir6 -vss ++op-clv +irline3 -vss ++op-clv +notir3 -vss ++op-clv +notir4 -vss ++op-clv +notir5 -vss ++op-clv +notir7 -vss ++op-from-x +ir5 -vss ++op-from-x +ir6 -vss ++op-from-x +notir1 -vss ++op-from-x +notir7 -vss ++op-implied +ir0 -vss ++op-implied +ir2 -vss ++op-implied +notir3 -vss ++op-implied +x-op-push/pull -vss ++op-inc/nop +notir1 -vss ++op-inc/nop +notir5 -vss ++op-inc/nop +notir6 -vss ++op-inc/nop +notir7 -vss ++op-jmp +ir4 -vss ++op-jmp +ir7 -vss ++op-jmp +irline3 -vss ++op-jmp +notir2 -vss ++op-jmp +notir3 -vss ++op-jmp +notir6 -vss ++op-jsr +ir2 -vss ++op-jsr +ir3 -vss ++op-jsr +ir4 -vss ++op-jsr +ir6 -vss ++op-jsr +ir7 -vss ++op-jsr +irline3 -vss ++op-jsr +notir5 -vss ++op-lsr/ror/dec/inc +notir1 -vss ++op-lsr/ror/dec/inc +notir6 -vss ++op-plp/pla +ir2 -vss ++op-plp/pla +ir4 -vss ++op-plp/pla +ir7 -vss ++op-plp/pla +irline3 -vss ++op-plp/pla +notir3 -vss ++op-plp/pla +notir5 -vss ++op-push/pull +ir2 -vss ++op-push/pull +ir4 -vss ++op-push/pull +ir7 -vss ++op-push/pull +irline3 -vss ++op-push/pull +notir3 -vss ++op-rmw +?790 -vss ++op-rol/ror +ir6 -vss ++op-rol/ror +ir7 -vss ++op-rol/ror +notir1 -vss ++op-rol/ror +notir5 -vss ++op-ror +ir7 -vss ++op-ror +notir1 -vss ++op-ror +notir5 -vss ++op-ror +notir6 -vss ++op-rti/rts +ir2 -vss ++op-rti/rts +ir3 -vss ++op-rti/rts +ir4 -vss ++op-rti/rts +ir7 -vss ++op-rti/rts +irline3 -vss ++op-rti/rts +notir6 -vss ++op-shift +ir6 -vss ++op-shift +ir7 -vss ++op-shift +notir1 -vss ++op-shift-right +ir7 -vss ++op-shift-right +notir1 -vss ++op-shift-right +notir6 -vss ++op-sta/cmp +ir5 -vss ++op-sta/cmp +ir6 -vss ++op-sta/cmp +notir0 -vss ++op-sta/cmp +notir7 -vss ++op-store +ir5 -vss ++op-store +ir6 -vss ++op-store +notir7 -vss ++op-sty/cpy-mem +ir5 -vss ++op-sty/cpy-mem +ir6 -vss ++op-sty/cpy-mem +irline3 -vss ++op-sty/cpy-mem +notir2 -vss ++op-sty/cpy-mem +notir7 -vss ++op-xy +ir6 -vss ++op-xy +notir1 -vss ++op-xy +notir7 -vss ++pchp0 -#pchp0 -vss ++pchp0 -dpc33_PCHDB -idb0 ++pchp1 +#pchp1 -vss ++pchp2 -#pchp2 -vss ++pchp3 +#pchp3 -vss ++pchp3 -dpc33_PCHDB -idb3 ++pchp4 -#pchp4 -vss ++pchp4 -dpc33_PCHDB -idb4 ++pchp5 +#pchp5 -vss ++pchp5 -dpc33_PCHDB -idb5 ++pchp6 -#pchp6 -vss ++pchp7 +#pchp7 -vss ++pclp0 +#pclp0 -vss ++pclp1 -#pclp1 -vss ++pclp1 -dpc37_PCLDB -idb1 ++pclp1 -dpc38_PCLADL -adl1 ++pclp2 +#pclp2 -vss ++pclp3 -#pclp3 -vss ++pclp3 -dpc37_PCLDB -idb3 ++pclp3 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++x-op-T+-adc/sbc -cclk -pipeUNK03 ++x-op-T0-bit +ir4 -vss ++x-op-T0-bit +ir6 -vss ++x-op-T0-bit +ir7 -vss ++x-op-T0-bit +irline3 -vss ++x-op-T0-bit +notir2 -vss ++x-op-T0-bit +notir5 -vss ++x-op-T0-bit -clock1 -vss ++x-op-T0-txa +ir2 -vss ++x-op-T0-txa +ir4 -vss ++x-op-T0-txa +ir5 -vss ++x-op-T0-txa +ir6 -vss ++x-op-T0-txa +notir1 -vss ++x-op-T0-txa +notir3 -vss ++x-op-T0-txa +notir7 -vss ++x-op-T0-txa -clock1 -vss ++x-op-T0-tya +ir2 -vss ++x-op-T0-tya +ir5 -vss ++x-op-T0-tya +ir6 -vss ++x-op-T0-tya +irline3 -vss ++x-op-T0-tya +notir3 -vss ++x-op-T0-tya +notir4 -vss ++x-op-T0-tya +notir7 -vss ++x-op-T0-tya -clock1 -vss ++x-op-T3-abs-idx +notir3 -vss ++x-op-T3-abs-idx +notir4 -vss ++x-op-T3-abs-idx +t3 -vss ++x-op-T3-ind-y +ir2 -vss ++x-op-T3-ind-y +ir3 -vss ++x-op-T3-ind-y +notir0 -vss ++x-op-T3-ind-y +notir4 -vss ++x-op-T3-ind-y +t3 -vss ++x-op-T3-plp/pla +ir2 -vss ++x-op-T3-plp/pla +ir4 -vss ++x-op-T3-plp/pla +ir7 -vss ++x-op-T3-plp/pla +irline3 -vss ++x-op-T3-plp/pla +notir3 -vss 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-dpc27_SBADH -adh6 +-sb6 -dpc3_SBX -x6 +-sb7 -cclk +vcc +-sb7 -dpc11_SBADD -alua7 +-sb7 -dpc25_SBDB -idb7 +-short-circuit-branch-add +?1446 +#alucout +-short-circuit-branch-add +?850 -vss +-short-circuit-branch-add +branch-back.phi1 +##alucout +-short-circuit-branch-add -cp1 -?1570 +-sync +?445 -vss +-sync -?417 +vcc +-x0 -dpc3_SBX -dasb0 +-x1 -cclk +?1709 +-x1 -dpc3_SBX -sb1 +-x2 -dpc3_SBX -sb2 +-x3 -dpc3_SBX -sb3 +-x5 -cclk +?578 +-x5 -dpc3_SBX -sb5 +-x7 -dpc3_SBX -sb7 +-y0 -cclk +?564 +-y0 -dpc1_SBY -dasb0 +-y1 -cclk +?767 +-y1 -dpc1_SBY -sb1 +-y2 -cclk +?1491 +-y2 -dpc1_SBY -sb2 +-y3 -cclk +?1531 +-y3 -dpc1_SBY -sb3 +-y4 -dpc1_SBY -dasb4 +-y5 -dpc1_SBY -sb5 +-y6 -dpc1_SBY -sb6 +-y7 -dpc1_SBY -sb7