RAM config; remove obsolete nib paths from config files
This commit is contained in:
Christopher Mosher
parent
0183c5304f
commit
e8cdb8975e
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@ -9,3 +9,9 @@
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import motherboard rom 1000 $(PREFIX)lib/apple2/system/a2/intbasic.a65
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import motherboard rom 2425 $(PREFIX)lib/apple2/system/a2/other.a65
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import motherboard rom 2800 $(PREFIX)lib/apple2/system/a2/monitor.a65
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# 4K RAM
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motherboard ram C 4K 4K 4K 4K 4K 4K 4K 4K
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motherboard strap C 4K 0000
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@ -9,6 +9,16 @@
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# 48K RAM
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motherboard ram E 16K
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motherboard ram D 16K
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motherboard ram C 16K
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motherboard strap E 16K 8000
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motherboard strap D 16K 4000
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motherboard strap C 16K 0000
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# Integer BASIC and old Monitor ROMs
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import motherboard rom 1000 $(PREFIX)lib/apple2/system/a2/intbasic.a65
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import motherboard rom 2425 $(PREFIX)lib/apple2/system/a2/other.a65
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@ -21,4 +31,4 @@ slot 6 disk13
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import slot 6 rom 0 $(PREFIX)lib/apple2/dos/13sector/disk2.a65
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# Insert DOS 3.1 System Master disk into drive 1
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load slot 6 drive 1 $(PREFIX)lib/apple2/dos/13sector/dos310/clean31sysmas_stock_rawdos.nib
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#load slot 6 drive 1 $(PREFIX)lib/apple2/dos/13sector/dos310/clean31sysmas_stock_rawdos.dsk.woz
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@ -9,6 +9,17 @@
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# indicator on the language card line turning on or off.
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# 48K RAM
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motherboard ram E 16K
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motherboard ram D 16K
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motherboard ram C 16K
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motherboard strap E 16K 8000
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motherboard strap D 16K 4000
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motherboard strap C 16K 0000
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# Integer BASIC and old Monitor ROMs
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import motherboard rom 1000 $(PREFIX)lib/apple2/system/a2/intbasic.a65
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import motherboard rom 2425 $(PREFIX)lib/apple2/system/a2/other.a65
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@ -26,4 +37,4 @@ slot 6 disk
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import slot 6 rom 0 $(PREFIX)lib/apple2/dos/16sector/disk2.a65
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# Insert DOS 3.3 System Master disk (original version) in drive 1
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load slot 6 drive 1 $(PREFIX)lib/apple2/dos/16sector/dos330/clean330sysmas.nib
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#load slot 6 drive 1 $(PREFIX)lib/apple2/dos/16sector/dos330/clean330sysmas.dsk.woz
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@ -9,6 +9,16 @@
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# 48K RAM
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motherboard ram E 16K
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motherboard ram D 16K
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motherboard ram C 16K
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motherboard strap E 16K 8000
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motherboard strap D 16K 4000
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motherboard strap C 16K 0000
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# Integer BASIC and old Monitor ROMs
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import motherboard rom 1000 $(PREFIX)lib/apple2/system/a2/intbasic.a65
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import motherboard rom 2425 $(PREFIX)lib/apple2/system/a2/other.a65
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@ -48,7 +58,7 @@ import slot 4 rom 0 $(PREFIX)lib/epple2/cards/clock.a65
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slot 5 disk13
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import slot 5 rom 0 $(PREFIX)lib/apple2/dos/13sector/disk2.a65
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# Insert the DOS 3.1 System Master disk into drive 1 of slot 5
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load slot 5 drive 1 $(PREFIX)lib/apple2/dos/13sector/dos310/clean31sysmas_stock_rawdos.nib
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#load slot 5 drive 1 $(PREFIX)lib/apple2/dos/13sector/dos310/clean31sysmas_stock_rawdos.dsk.woz
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@ -57,7 +67,7 @@ load slot 5 drive 1 $(PREFIX)lib/apple2/dos/13sector/dos310/clean31sysmas_stock_
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slot 6 disk
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import slot 6 rom 0 $(PREFIX)lib/apple2/dos/16sector/disk2.a65
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# Insert the DOS 3.3 System Master disk (original version) into slot 6
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load slot 6 drive 1 $(PREFIX)lib/apple2/dos/16sector/dos330/clean330sysmas.nib
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#load slot 6 drive 1 $(PREFIX)lib/apple2/dos/16sector/dos330/clean330sysmas.dsk.woz
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@ -8,3 +8,9 @@
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import motherboard rom 0000 $(PREFIX)lib/apple2/system/a2p/applesoft.a65
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import motherboard rom 2800 $(PREFIX)lib/apple2/system/a2p/monitor.a65
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# 4K RAM
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motherboard ram C 4K 4K 4K 4K 4K 4K 4K 4K
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motherboard strap C 4K 0000
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@ -9,6 +9,16 @@
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# indicator on the language card line turning on or off.
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# 48K RAM
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motherboard ram E 16K
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motherboard ram D 16K
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motherboard ram C 16K
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motherboard strap E 16K 8000
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motherboard strap D 16K 4000
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motherboard strap C 16K 0000
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# Applesoft BASIC and Autostart Monitor ROMs
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import motherboard rom 0000 $(PREFIX)lib/apple2/system/a2p/applesoft.a65
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import motherboard rom 2800 $(PREFIX)lib/apple2/system/a2p/monitor.a65
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@ -25,4 +35,4 @@ slot 6 disk
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import slot 6 rom 0 $(PREFIX)lib/apple2/dos/16sector/disk2.a65
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# Insert DOS 3.3 System Master disk (original version) in drive 1
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load slot 6 drive 1 $(PREFIX)lib/apple2/dos/16sector/disks/dos330/clean330sysmas.nib
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#load slot 6 drive 1 $(PREFIX)lib/apple2/dos/16sector/disks/dos330/clean330sysmas.dsk.woz
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@ -9,6 +9,16 @@
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# 48K RAM
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motherboard ram E 16K
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motherboard ram D 16K
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motherboard ram C 16K
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motherboard strap E 16K 8000
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motherboard strap D 16K 4000
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motherboard strap C 16K 0000
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# Applesoft BASIC and Autostart Monitor ROMs
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import motherboard rom 0000 $(PREFIX)lib/apple2/system/a2p/applesoft.a65
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import motherboard rom 2800 $(PREFIX)lib/apple2/system/a2p/monitor.a65
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@ -47,7 +57,7 @@ import slot 4 rom 0 $(PREFIX)lib/epple2/cards/clock.a65
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slot 5 disk13
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import slot 5 rom 0 $(PREFIX)lib/apple2/dos/13sector/disk2.a65
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# Insert the DOS 3.1 System Master disk into drive 1 of slot 5
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load slot 5 drive 1 $(PREFIX)lib/apple2/dos/13sector/dos310/clean31sysmas_stock_rawdos.nib
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#load slot 5 drive 1 $(PREFIX)lib/apple2/dos/13sector/dos310/clean31sysmas_stock_rawdos.dsk.woz
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@ -56,7 +66,7 @@ load slot 5 drive 1 $(PREFIX)lib/apple2/dos/13sector/dos310/clean31sysmas_stock_
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slot 6 disk
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import slot 6 rom 0 $(PREFIX)lib/apple2/dos/16sector/disk2.a65
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# Insert the DOS 3.3 System Master disk (original version) into slot 6
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load slot 6 drive 1 $(PREFIX)lib/apple2/dos/16sector/dos330/clean330sysmas.nib
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#load slot 6 drive 1 $(PREFIX)lib/apple2/dos/16sector/dos330/clean330sysmas.dsk.woz
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@ -11,6 +11,14 @@
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# standard 48K RAM
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motherboard ram E 16K
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motherboard ram D 16K
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motherboard ram C 16K
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motherboard strap E 16K 8000
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motherboard strap D 16K 4000
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motherboard strap C 16K 0000
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# Demo system ROM for the emulator. This is only to allow the
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# emulator to do something useful when there are no real Apple ROM
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# images provided.
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@ -40,11 +48,11 @@ import slot 4 rom 0 $(PREFIX)lib/epple2/cards/clock.a65
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#slot 5 disk13
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#import slot 5 rom 0 $(PREFIX)lib/apple2/dos/13sector/disk2.a65
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#load slot 5 drive 1 $(PREFIX)lib/apple2/dos/13sector/dos310/clean31sysmas_stock_rawdos.nib
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#load slot 5 drive 1 $(PREFIX)lib/apple2/dos/13sector/dos310/clean31sysmas_stock_rawdos.dsk.woz
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#slot 6 disk
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#import slot 6 rom 0 $(PREFIX)lib/apple2/dos/16sector/disk2.a65
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#load slot 6 drive 1 $(PREFIX)lib/apple2/dos/16sector/dos330/clean330sysmas.nib
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#load slot 6 drive 1 $(PREFIX)lib/apple2/dos/16sector/dos330/clean330sysmas.dsk.woz
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#slot 7 firmware
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#import slot 7 rombank 1000 $(PREFIX)lib/apple2/system/a2/intbasic.a65
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@ -10,6 +10,11 @@
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# Use an original, revision zero, motherboard
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revision 0
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# Load Integer BASIC and old Monitor ROMs
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import motherboard rom 1000 $(PREFIX)lib/apple2/system/a2/intbasic.a65
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import motherboard rom 2425 $(PREFIX)lib/apple2/system/a2/other.a65
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@ -17,5 +22,6 @@ import motherboard rom 2800 $(PREFIX)lib/apple2/system/a2/monitor.a65
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# Use an original, revision zero, motherboard
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revision 0
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# 4K RAM
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motherboard ram C 4K 4K 4K 4K 4K 4K 4K 4K
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motherboard strap C 4K 0000
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@ -2,7 +2,7 @@ anchor:commands[]
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=== Commands
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+<<slot>> <<import>> <<load>> <<unload>> <<save>> <<cassette>> <<revision>>+
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+<<slot>> <<motherboard>> <<import>> <<load>> <<unload>> <<save>> <<cassette>> <<revision>>+
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@ -45,6 +45,58 @@ The emulated Apple should be _powered off_ before inserting or removing cards.
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anchor:motherboard[]
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==== motherboard
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The +motherboard+ command configures the emulated Apple's motherboard RAM chips and strapping block.
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--------
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motherboard ram {C|D|E} { 4K | 4096 | 16K | 4116 | - } [...up to 8]
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motherboard strap {C|D|E} { 4K | 16K } <base>
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--------
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The RAM configuration lines represent the rows of chips on the motherboard. The motherboard labels the
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rows as C, D, and E. Each row has 8 chips, one per bit in a byte. The Apple ][ accepts 4K or 16K chips.
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You use the +ram+ command to insert (or remove) chips from the sockets.
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You configure each row's address range by using a "strapping block" on the original Apple. In the
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emulator, use the +strap+ command to perform this function. You should strap 4K rows to a 4K range
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of RAM. You should always assign some RAM to the zero address.
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For more information about RAM configuration, see
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https://archive.org/details/Apple_II_Reference_Manual_1979_Apple/page/n79[Christopher Espinosa, Apple II Reference Manual
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(Cupertino, Calif.: Apple Computer, 1978), pp. 70-72].
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Example of normal 48K RAM configuration:
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--------
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ram e 16K
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strap e 16K 8000
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ram d 16K
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strap d 16K 4000
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ram c 16K
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strap c 16K 0000
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--------
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Example of 4K, showing how you could specify each chip:
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--------
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ram e - - - - - - - -
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ram d - - - - - - - -
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ram c 4K 4K 4K 4K 4K 4K 4K 4K
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strap c 4K 0000
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--------
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Example of 4K at zero address, and 8K at HI-RES page one:
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--------
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ram e 4K
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strap e 4K 3000
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ram d 4K
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strap d 4K 2000
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ram c 4K
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strap c 4K 0000
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--------
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anchor:import[]
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==== import
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@ -53,7 +105,7 @@ The +import+ command imports a binary image file into the emulated Apple's memor
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--------
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import slot <slot> { rom | rom7 | rombank } <base> <file-path>
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import motherboard { rom | ram } <base> <file-path>
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import motherboard rom <base> <file-path>
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--------
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+<slot>+ Slot number, 0 through 7, of peripheral card to import the binary image into.
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@ -63,17 +115,16 @@ import motherboard { rom | ram } <base> <file-path>
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+<file-path>+ Path of the binary image to import.
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The +import+ command reads the binary image byte-for-byte from the given file-path
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into an area of memory in the emulated Apple. You can load into either the motherboard or
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a card in one of the slots. For the motherboard, you choose the RAM or ROM area. For a card
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in a slot, you can choose either the normal ROM, the bank-switched ROM, or the so-called
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``seventh ROM'' area.
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into an area of ROM in the emulated Apple. You can load into either the motherboard or
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a card in one of the slots. For a card in a slot, you can choose either the normal ROM,
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the bank-switched ROM, or the so-called ``seventh ROM'' area.
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You also have to specify the base address within the specific memory
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area at which the image file will be loaded. Note that the base address is specified as the offset
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within the specific memory area, and not necessarily as the actual memory address as seen
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by the Apple. So for motherboard ROM, for example, specifying a base as 2DED will cause the
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image to be loaded at offset 2DED in the ROM, which will be addressed by the Apple at
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memory address $FDED (because motherboard ROM ``starts'' at address $D000).
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image to be loaded at offset $2DED in the ROM, which will be addressed by the Apple at
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memory address $FDED, because motherboard ROM ``starts'' at address $D000, and $D000 + $2DED = $FDED.
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For peripheral cards, the ROM will be seen at locations $Cs00-$CsFF, where s is the slot
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number (1 through 7). The ``seventh ROM'' can be seen as locations $C800-$CFFF; Jim Sather
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@ -16,7 +16,9 @@ clipboardhandler.cpp clockcard.cpp \
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configep2.cpp cpu.cpp diskcontroller.cpp drive.cpp drivemotor.cpp \
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emptyslot.cpp emulator.cpp firmwarecard.cpp gui.cpp hypermode.cpp \
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keyboard.cpp keyboardbuffermode.cpp languagecard.cpp filterchroma.cpp \
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filterluma.cpp lss.cpp main.cpp memory.cpp paddlebuttonstates.cpp \
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filterluma.cpp lss.cpp main.cpp memory.cpp \
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memorychip.cpp memoryrow.cpp memorystrapping.cpp memoryrandomaccess.cpp \
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paddlebuttonstates.cpp \
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paddles.cpp picturegenerator.cpp powerupreset.cpp raminitializer.cpp \
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screenimage.cpp slots.cpp speakerclicker.cpp standardin.cpp \
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standardinproducer.cpp standardout.cpp steppermotor.cpp textcharacters.cpp \
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@ -31,7 +33,9 @@ card.h cassette.h cassettein.h cassetteout.h \
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clipboardhandler.h clockcard.h configep2.h cpu.h \
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diskcontroller.h drive.h drivemotor.h e2const.h emptyslot.h emulator.h firmwarecard.h font3x5.h gui.h \
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hypermode.h keyboardbuffermode.h keyboard.h languagecard.h filterchroma.h \
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filterluma.h lss.h memory.h paddlebuttonstates.h paddles.h picturegenerator.h \
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filterluma.h lss.h memory.h \
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memorychip.h memoryrow.h memorystrapping.h memoryrandomaccess.h \
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paddlebuttonstates.h paddles.h picturegenerator.h \
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powerupreset.h raminitializer.h screenimage.h slots.h speakerclicker.h \
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standardin.h standardinproducer.h standardout.h steppermotor.h \
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textcharacterimages.h textcharacters.h timable.h util.h \
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@ -17,6 +17,7 @@
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*/
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#include "addressbus.h"
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#include "memory.h"
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#include "memoryrandomaccess.h"
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#include "keyboard.h"
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#include "videomode.h"
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#include "paddles.h"
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@ -26,7 +27,7 @@
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#include "cassetteout.h"
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#include "slots.h"
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AddressBus::AddressBus(ScreenImage& gui, int& revision, Memory& ram, Memory& rom, Keyboard& kbd, VideoMode& vid, Paddles& paddles, PaddleButtonStates& paddleButtonStates, SpeakerClicker& speaker, CassetteIn& cassetteIn, CassetteOut& cassetteOut, Slots& slts):
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AddressBus::AddressBus(ScreenImage& gui, int& revision, MemoryRandomAccess& ram, Memory& rom, Keyboard& kbd, VideoMode& vid, Paddles& paddles, PaddleButtonStates& paddleButtonStates, SpeakerClicker& speaker, CassetteIn& cassetteIn, CassetteOut& cassetteOut, Slots& slts):
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gui(gui), revision(revision), ram(ram), rom(rom), kbd(kbd), vid(vid), paddles(paddles), paddleButtonStates(paddleButtonStates), speaker(speaker), cassetteIn(cassetteIn), cassetteOut(cassetteOut), slts(slts)
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{
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}
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class ScreenImage;
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class Memory;
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class MemoryRandomAccess;
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class Keyboard;
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class VideoMode;
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class Paddles;
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@ -33,7 +34,7 @@ class AddressBus {
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private:
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ScreenImage& gui;
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int& revision;
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Memory& ram;
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MemoryRandomAccess& ram;
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Memory& rom;
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Keyboard& kbd;
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VideoMode& vid;
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@ -47,7 +48,7 @@ class AddressBus {
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unsigned char data; // this emulates the (floating) data bus
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public:
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AddressBus(ScreenImage& gui, int& revision, Memory& ram, Memory& rom, Keyboard& kbd, VideoMode& vid, Paddles& paddles, PaddleButtonStates& paddleButtonStates, SpeakerClicker& speaker, CassetteIn& cassetteIn, CassetteOut& cassetteOut, Slots& slts);
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AddressBus(ScreenImage& gui, int& revision, MemoryRandomAccess& ram, Memory& rom, Keyboard& kbd, VideoMode& vid, Paddles& paddles, PaddleButtonStates& paddleButtonStates, SpeakerClicker& speaker, CassetteIn& cassetteIn, CassetteOut& cassetteOut, Slots& slts);
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~AddressBus();
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unsigned char read(const unsigned short address);
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@ -42,7 +42,7 @@ Apple2::Apple2(KeypressQueue& keypresses, PaddleButtonStates& paddleButtonStates
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slts(gui),
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kbd(keypresses,fhyper,buffered),
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rom(AddressBus::MOTHERBOARD_ROM_SIZ),
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ram(AddressBus::MOTHERBOARD_RAM_SIZ),
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ram(revision),
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cassetteIn(gui),
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cassetteOut(gui),
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addressBus(gui,revision,ram,rom,kbd,videoMode,paddles,paddleButtonStates,speaker,cassetteIn,cassetteOut,slts),
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@ -24,6 +24,7 @@
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#include "keyboard.h"
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#include "addressbus.h"
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#include "memory.h"
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#include "memoryrandomaccess.h"
|
||||
#include "picturegenerator.h"
|
||||
#include "textcharacters.h"
|
||||
#include "video.h"
|
||||
|
|
@ -51,7 +52,7 @@ class Apple2 : public Timable
|
|||
Paddles paddles;
|
||||
SpeakerClicker speaker;
|
||||
Memory rom;
|
||||
Memory ram;
|
||||
MemoryRandomAccess ram;
|
||||
CassetteIn cassetteIn;
|
||||
CassetteOut cassetteOut;
|
||||
AddressBus addressBus;
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@
|
|||
#include "configep2.h"
|
||||
|
||||
#include "memory.h"
|
||||
#include "memoryrandomaccess.h"
|
||||
#include "slots.h"
|
||||
#include "diskcontroller.h"
|
||||
#include "languagecard.h"
|
||||
|
|
@ -36,6 +37,34 @@
|
|||
#include <string>
|
||||
#include <stdexcept>
|
||||
|
||||
|
||||
#define K 1024u
|
||||
|
||||
static std::uint16_t chip_size(const std::string &chip_model) {
|
||||
if (chip_model == "4K") {
|
||||
return 4u*K;
|
||||
}
|
||||
if (chip_model == "16K") {
|
||||
return 16u*K;
|
||||
}
|
||||
if (chip_model == "-") {
|
||||
return 0u;
|
||||
}
|
||||
throw ConfigException("unrecognized RAM chip model");
|
||||
}
|
||||
|
||||
static std::uint16_t memory_block_size(const std::string &block_size) {
|
||||
if (block_size == "4K") {
|
||||
return 4u*K;
|
||||
}
|
||||
if (block_size == "16K") {
|
||||
return 16u*K;
|
||||
}
|
||||
throw ConfigException("invalid RAM strapping block size (must be 4K or 16K)");
|
||||
}
|
||||
|
||||
|
||||
|
||||
unsigned char Config::disk_mask(0);
|
||||
|
||||
Config::Config(const std::string& file_path):
|
||||
|
|
@ -75,7 +104,7 @@ static void trim(std::string& str)
|
|||
}
|
||||
}
|
||||
|
||||
void Config::parse(Memory& ram, Memory& rom, Slots& slts, int& revision, ScreenImage& gui, CassetteIn& cassetteIn, CassetteOut& cassetteOut)
|
||||
void Config::parse(MemoryRandomAccess& ram, Memory& rom, Slots& slts, int& revision, ScreenImage& gui, CassetteIn& cassetteIn, CassetteOut& cassetteOut)
|
||||
{
|
||||
std::ifstream* pConfig;
|
||||
|
||||
|
|
@ -154,7 +183,7 @@ void Config::parse(Memory& ram, Memory& rom, Slots& slts, int& revision, ScreenI
|
|||
|
||||
// TODO: make sure there is no more than ONE stdin and/or ONE stdout card
|
||||
}
|
||||
void Config::parseLine(const std::string& line, Memory& ram, Memory& rom, Slots& slts, int& revision, ScreenImage& gui, CassetteIn& cassetteIn, CassetteOut& cassetteOut)
|
||||
void Config::parseLine(const std::string& line, MemoryRandomAccess& ram, Memory& rom, Slots& slts, int& revision, ScreenImage& gui, CassetteIn& cassetteIn, CassetteOut& cassetteOut)
|
||||
{
|
||||
try
|
||||
{
|
||||
|
|
@ -166,7 +195,7 @@ void Config::parseLine(const std::string& line, Memory& ram, Memory& rom, Slots&
|
|||
}
|
||||
}
|
||||
|
||||
void Config::tryParseLine(const std::string& line, Memory& ram, Memory& rom, Slots& slts, int& revision, ScreenImage& gui, CassetteIn& cassetteIn, CassetteOut& cassetteOut)
|
||||
void Config::tryParseLine(const std::string& line, MemoryRandomAccess& ram, Memory& rom, Slots& slts, int& revision, ScreenImage& gui, CassetteIn& cassetteIn, CassetteOut& cassetteOut)
|
||||
{
|
||||
std::istringstream tok(line);
|
||||
|
||||
|
|
@ -180,7 +209,62 @@ void Config::tryParseLine(const std::string& line, Memory& ram, Memory& rom, Slo
|
|||
|
||||
insertCard(sCardType,slot,slts,gui);
|
||||
}
|
||||
else if (cmd == "import")
|
||||
else if (cmd == "motherboard") {
|
||||
std::string op;
|
||||
tok >> op;
|
||||
if (op == "ram") {
|
||||
/* ram ROW BIT0 [BIT1 [... [BIT7]]]
|
||||
* ram e -
|
||||
* ram d 4096 MK4096 4K
|
||||
* ram c 16K 4116 MK4116 MM5290 16K 16K 16K 16K
|
||||
*/
|
||||
std::string row;
|
||||
tok >> row;
|
||||
std::transform(row.begin(), row.end(), row.begin(), ::toupper);
|
||||
if (row != "C" && row != "D" && row != "E") {
|
||||
throw ConfigException("expected row to be C, D, or E");
|
||||
}
|
||||
std::string chip_model;
|
||||
tok >> chip_model;
|
||||
std::uint16_t siz = chip_size(chip_model);
|
||||
for (std::uint_fast8_t bit = 0u; bit < 8u; ++bit) {
|
||||
if (siz) {
|
||||
ram.insert_chip(row, MemoryChip(siz,chip_model), bit);
|
||||
} else {
|
||||
ram.remove_chip(row, bit);
|
||||
}
|
||||
std::string chip_model_optional;
|
||||
tok >> chip_model_optional;
|
||||
if (chip_model_optional.length()) {
|
||||
chip_model = chip_model_optional;
|
||||
}
|
||||
siz = chip_size(chip_model);
|
||||
}
|
||||
} else if (op == "strap") {
|
||||
/* strap ROM K start-addr
|
||||
* strap c 4K 0000
|
||||
* strap d 4K 1000
|
||||
* strap e 4K 2000
|
||||
*/
|
||||
std::string row;
|
||||
tok >> row;
|
||||
std::transform(row.begin(), row.end(), row.begin(), ::toupper);
|
||||
if (row != "C" && row != "D" && row != "E") {
|
||||
throw ConfigException("expected row to be C, D, or E");
|
||||
}
|
||||
|
||||
std::string block_size;
|
||||
tok >> block_size;
|
||||
std::uint16_t siz = memory_block_size(block_size);
|
||||
unsigned short base(0);
|
||||
tok >> std::hex >> base;
|
||||
// TODO validate siz/base combination
|
||||
ram.strap_to(row, base, siz);
|
||||
} else {
|
||||
throw ConfigException("error at \"motherboard\"; expected \"ram\" or \"strap\"");
|
||||
}
|
||||
}
|
||||
else if (cmd == "import")
|
||||
{
|
||||
std::string sm;
|
||||
tok >> sm;
|
||||
|
|
@ -216,10 +300,6 @@ void Config::tryParseLine(const std::string& line, Memory& ram, Memory& rom, Slo
|
|||
{
|
||||
rom.load(base,memfile);
|
||||
}
|
||||
else if (romtype == "ram")
|
||||
{
|
||||
ram.load(base,memfile);
|
||||
}
|
||||
else
|
||||
{
|
||||
throw ConfigException("error at \""+romtype+"\"; expected rom or ram");
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@
|
|||
|
||||
#include <string>
|
||||
class Memory;
|
||||
class MemoryRandomAccess;
|
||||
class Slots;
|
||||
class ScreenImage;
|
||||
class CassetteIn;
|
||||
|
|
@ -42,14 +43,14 @@ private:
|
|||
static void unloadDisk(Slots& slts, int slot, int drive);
|
||||
static void saveDisk(Slots& slts, int slot, int drive);
|
||||
static void insertCard(const std::string& cardType, int slot, Slots& slts, ScreenImage& gui);
|
||||
static void tryParseLine(const std::string& line, Memory& ram, Memory& rom, Slots& slts, int& revision, ScreenImage& gui, CassetteIn& cassetteIn, CassetteOut& cassetteOut);
|
||||
static void tryParseLine(const std::string& line, MemoryRandomAccess& ram, Memory& rom, Slots& slts, int& revision, ScreenImage& gui, CassetteIn& cassetteIn, CassetteOut& cassetteOut);
|
||||
|
||||
public:
|
||||
Config(const std::string& file_path);
|
||||
~Config();
|
||||
|
||||
void parse(Memory& ram, Memory& rom, Slots& slts, int& revision, ScreenImage& gui, CassetteIn& cassetteIn, CassetteOut& cassetteOut);
|
||||
static void parseLine(const std::string& line, Memory& ram, Memory& rom, Slots& slts, int& revision, ScreenImage& gui, CassetteIn& cassetteIn, CassetteOut& cassetteOut);
|
||||
void parse(MemoryRandomAccess& ram, Memory& rom, Slots& slts, int& revision, ScreenImage& gui, CassetteIn& cassetteIn, CassetteOut& cassetteOut);
|
||||
static void parseLine(const std::string& line, MemoryRandomAccess& ram, Memory& rom, Slots& slts, int& revision, ScreenImage& gui, CassetteIn& cassetteIn, CassetteOut& cassetteOut);
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,6 +1,7 @@
|
|||
/*
|
||||
epple2
|
||||
Copyright (C) 2008 by Christopher A. Mosher <cmosher01@gmail.com>
|
||||
|
||||
Copyright © 2008, 2019, Christopher Alan Mosher, Shelton, CT, USA. <cmosher01@gmail.com>
|
||||
|
||||
This program is free software: you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
|
|
@ -19,32 +20,76 @@
|
|||
#include <vector>
|
||||
#include <algorithm>
|
||||
#include <istream>
|
||||
#include <cstdlib>
|
||||
#include "raminitializer.h"
|
||||
|
||||
const int Memory::CLEAR_VALUE(0);
|
||||
|
||||
|
||||
/*
|
||||
* If any RAM IC sockets are empty, set the corresponding bits to 1 most of the time.
|
||||
* But set to 0 instead, with probability 1 in 137 (a rough estimate obtained empirically)
|
||||
*/
|
||||
static std::uint8_t randomize_missing_bits(std::uint8_t v, const std::uint8_t bits) {
|
||||
std::uint8_t bit = 1u;
|
||||
for (std::uint_fast8_t i = 0; i < 8; ++i) {
|
||||
if (bits & bit) {
|
||||
double r = static_cast<double>(std::rand())/RAND_MAX;
|
||||
if (r < 1.0/137.0) {
|
||||
v &= ~bit;
|
||||
} else {
|
||||
v |= bit;
|
||||
}
|
||||
}
|
||||
bit <<= 1;
|
||||
}
|
||||
return v;
|
||||
}
|
||||
|
||||
|
||||
|
||||
Memory::Memory(const size_t n):
|
||||
bytes(n)
|
||||
{
|
||||
bytes(n),
|
||||
clear_value(0u),
|
||||
missing_bits(0u) {
|
||||
}
|
||||
|
||||
void Memory::clear()
|
||||
{
|
||||
std::fill(this->bytes.begin(),this->bytes.end(),CLEAR_VALUE);
|
||||
|
||||
|
||||
void Memory::clear() {
|
||||
std::fill(this->bytes.begin(), this->bytes.end(), this->clear_value);
|
||||
}
|
||||
|
||||
void Memory::powerOn()
|
||||
{
|
||||
RAMInitializer initRam(*this);
|
||||
initRam.init();
|
||||
void Memory::init() {
|
||||
RAMInitializer initRam(*this);
|
||||
initRam.init();
|
||||
}
|
||||
|
||||
void Memory::powerOff()
|
||||
{
|
||||
clear();
|
||||
void Memory::load(const std::uint16_t base, std::istream& in) {
|
||||
in.read(reinterpret_cast<char*>(&this->bytes[base]), static_cast<ptrdiff_t>(this->bytes.size()-base));
|
||||
}
|
||||
|
||||
void Memory::load(const unsigned short base, std::istream& in)
|
||||
{
|
||||
in.read((char*)&this->bytes[base],this->bytes.size()-base);
|
||||
|
||||
|
||||
void Memory::powerOn() {
|
||||
init();
|
||||
}
|
||||
|
||||
void Memory::powerOff() {
|
||||
clear();
|
||||
}
|
||||
|
||||
size_t Memory::size() const {
|
||||
return this->bytes.size();
|
||||
}
|
||||
|
||||
std::uint8_t Memory::read(const std::uint16_t address) const {
|
||||
std::uint8_t v = this->bytes[address];
|
||||
if (this->missing_bits) {
|
||||
v = randomize_missing_bits(v, this->missing_bits);
|
||||
}
|
||||
return v;
|
||||
}
|
||||
|
||||
void Memory::write(const std::uint16_t address, const std::uint8_t data) {
|
||||
this->bytes[address] = data;
|
||||
}
|
||||
|
|
|
|||
45
src/memory.h
45
src/memory.h
|
|
@ -20,34 +20,27 @@
|
|||
|
||||
#include <vector>
|
||||
#include <istream>
|
||||
#include <cstdint>
|
||||
|
||||
class Memory
|
||||
{
|
||||
private:
|
||||
std::vector<unsigned char> bytes;
|
||||
static const int CLEAR_VALUE;
|
||||
class Memory {
|
||||
private:
|
||||
std::vector<std::uint8_t> bytes;
|
||||
const std::uint8_t clear_value;
|
||||
const std::uint8_t missing_bits;
|
||||
|
||||
public:
|
||||
Memory(const size_t n);
|
||||
size_t size() const
|
||||
{
|
||||
return this->bytes.size();
|
||||
}
|
||||
|
||||
unsigned char read(const unsigned short address) const
|
||||
{
|
||||
return this->bytes[address];
|
||||
}
|
||||
|
||||
void write(const unsigned short address, const unsigned char data)
|
||||
{
|
||||
this->bytes[address] = data;
|
||||
}
|
||||
|
||||
void clear();
|
||||
void powerOn();
|
||||
void powerOff();
|
||||
void load(const unsigned short base, std::istream& in);
|
||||
public:
|
||||
Memory(const size_t n);
|
||||
virtual ~Memory() { }
|
||||
|
||||
size_t size() const;
|
||||
std::uint8_t read(const std::uint16_t address) const;
|
||||
void write(const std::uint16_t address, const std::uint8_t data);
|
||||
void powerOn();
|
||||
void powerOff();
|
||||
|
||||
void clear();
|
||||
void init();
|
||||
void load(const std::uint16_t base, std::istream& in);
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -0,0 +1,74 @@
|
|||
#include "memorychip.h"
|
||||
#include <stdexcept>
|
||||
#include <algorithm>
|
||||
#include <vector>
|
||||
|
||||
#define K 1024
|
||||
|
||||
MemoryChip::MemoryChip(const std::uint16_t size, const std::string &id_model):
|
||||
size_bits(size),
|
||||
id_model(id_model) {
|
||||
if (size_bits != 4*K && size_bits != 16*K) {
|
||||
throw std::out_of_range("MemoryChip must be 4K or 16K");
|
||||
}
|
||||
}
|
||||
|
||||
MemoryChip::MemoryChip(const MemoryChip &that):
|
||||
size_bits(that.size_bits),
|
||||
id_model(that.id_model) {
|
||||
}
|
||||
|
||||
MemoryChip &MemoryChip::operator=(const MemoryChip &that) {
|
||||
this->size_bits = that.size_bits;
|
||||
this->id_model = that.id_model;
|
||||
return *this;
|
||||
}
|
||||
|
||||
MemoryChip::~MemoryChip() {
|
||||
}
|
||||
|
||||
std::uint16_t MemoryChip::size() const {
|
||||
return this->size_bits;
|
||||
}
|
||||
|
||||
std::string MemoryChip::id() const {
|
||||
return this->id_model;
|
||||
}
|
||||
|
||||
bool MemoryChip::exists() const {
|
||||
return true;
|
||||
}
|
||||
|
||||
static void bitflag(const bool on, const std::uint8_t mask, std::uint8_t &byte) {
|
||||
if (on) {
|
||||
byte |= mask;
|
||||
} else {
|
||||
byte &= ~mask;
|
||||
}
|
||||
}
|
||||
|
||||
//#define CYCLE 128u
|
||||
#define CYCLE 2u
|
||||
|
||||
void MemoryChip::init(const std::uint8_t mask, std::vector<std::uint8_t> &bytes, const std::uint16_t size) const {
|
||||
bool on = false;
|
||||
std::uint8_t c = 0u;
|
||||
for (std::uint16_t i = 0u; i < std::min(size, this->size_bits); ++i) {
|
||||
bitflag(on, mask, bytes[i]);
|
||||
if (CYCLE <= ++c) {
|
||||
c = 0u;
|
||||
on = !on;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
MemoryChipEmptySocket::MemoryChipEmptySocket():
|
||||
MemoryChip(4*K,"[empty]") {
|
||||
}
|
||||
|
||||
MemoryChipEmptySocket::~MemoryChipEmptySocket() {
|
||||
}
|
||||
|
||||
bool MemoryChipEmptySocket::exists() const {
|
||||
return false;
|
||||
}
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
#ifndef MEMORYCHIP_H
|
||||
#define MEMORYCHIP_H
|
||||
|
||||
#include <cstdint>
|
||||
#include <string>
|
||||
|
||||
class MemoryChip {
|
||||
private:
|
||||
std::uint16_t size_bits;
|
||||
std::string id_model;
|
||||
public:
|
||||
MemoryChip(const std::uint16_t size, const std::string &id_model);
|
||||
MemoryChip(const MemoryChip &that);
|
||||
MemoryChip &operator=(const MemoryChip &that);
|
||||
virtual ~MemoryChip();
|
||||
std::uint16_t size() const;
|
||||
std::string id() const;
|
||||
virtual void init(const std::uint8_t mask, std::vector<std::uint8_t> &bytes, const std::uint16_t size) const;
|
||||
virtual bool exists() const;
|
||||
};
|
||||
|
||||
class MemoryChipEmptySocket : public MemoryChip {
|
||||
public:
|
||||
MemoryChipEmptySocket();
|
||||
virtual ~MemoryChipEmptySocket();
|
||||
virtual bool exists() const;
|
||||
};
|
||||
|
||||
#endif // MEMORYCHIP_H
|
||||
|
|
@ -0,0 +1,149 @@
|
|||
#include "memoryrandomaccess.h"
|
||||
#include <cstdint>
|
||||
#include <exception>
|
||||
|
||||
#define K 1024u
|
||||
|
||||
MemoryRandomAccess::MemoryRandomAccess(int &revision):
|
||||
revision(revision),
|
||||
rowE('E'),
|
||||
strapE(rowE),
|
||||
rowD('D'),
|
||||
strapD(rowD),
|
||||
rowC('C'),
|
||||
strapC(rowC) {
|
||||
}
|
||||
|
||||
MemoryRow &MemoryRandomAccess::row_of(const std::string &row) {
|
||||
if (row == "E") {
|
||||
return this->rowE;
|
||||
}
|
||||
if (row == "D") {
|
||||
return this->rowD;
|
||||
}
|
||||
if (row == "C") {
|
||||
return this->rowC;
|
||||
}
|
||||
throw std::logic_error("expected C/D/E");
|
||||
}
|
||||
|
||||
MemoryStrapping &MemoryRandomAccess::strapping_of(const std::string &row) {
|
||||
if (row == "E") {
|
||||
return this->strapE;
|
||||
}
|
||||
if (row == "D") {
|
||||
return this->strapD;
|
||||
}
|
||||
if (row == "C") {
|
||||
return this->strapC;
|
||||
}
|
||||
throw std::logic_error("expected C/D/E");
|
||||
}
|
||||
|
||||
void MemoryRandomAccess::insert_chip(const std::string &row, MemoryChip chip, const std::uint_fast8_t socket) {
|
||||
row_of(row).insert_chip(chip, socket);
|
||||
}
|
||||
|
||||
void MemoryRandomAccess::remove_chip(const std::string &row, const std::uint_fast8_t socket) {
|
||||
row_of(row).remove_chip(socket);
|
||||
}
|
||||
|
||||
void MemoryRandomAccess::strap_to(const std::string &row, std::uint16_t addr_base, std::uint16_t addr_size) {
|
||||
strapping_of(row).strap_to(addr_base, addr_size);
|
||||
}
|
||||
|
||||
bool MemoryRandomAccess::k20or24() const {
|
||||
const std::uint32_t k = this->rowC.size() + this->rowD.size() + this->rowD.size();
|
||||
return (k==20*K) || (k==24*K);
|
||||
}
|
||||
|
||||
/* for 20K or 24K on rev. 0: pages 40-5F are dup w/ 60-7F */
|
||||
std::uint8_t MemoryRandomAccess::buggyRamRead(const std::uint16_t address) const {
|
||||
std::uint16_t ax = address & ~0x2000u;
|
||||
if (this->strapE.contains(ax)) {
|
||||
return this->strapE.read(ax);
|
||||
}
|
||||
if (this->strapD.contains(ax)) {
|
||||
return this->strapD.read(ax);
|
||||
}
|
||||
if (this->strapC.contains(ax)) {
|
||||
return this->strapC.read(ax);
|
||||
}
|
||||
ax = address | 0x2000u;
|
||||
if (this->strapE.contains(ax)) {
|
||||
return this->strapE.read(ax);
|
||||
}
|
||||
if (this->strapD.contains(ax)) {
|
||||
return this->strapD.read(ax);
|
||||
}
|
||||
if (this->strapC.contains(ax)) {
|
||||
return this->strapC.read(ax);
|
||||
}
|
||||
return MemoryRow::missing_memory_byte_value();
|
||||
}
|
||||
|
||||
std::uint8_t MemoryRandomAccess::read(const std::uint16_t address) const {
|
||||
if (this->revision == 0 && k20or24() && ((address & 0xC000u) == 0x4000u)) {
|
||||
return buggyRamRead(address);
|
||||
}
|
||||
if (this->strapE.contains(address)) {
|
||||
return this->strapE.read(address);
|
||||
}
|
||||
if (this->strapD.contains(address)) {
|
||||
return this->strapD.read(address);
|
||||
}
|
||||
if (this->strapC.contains(address)) {
|
||||
return this->strapC.read(address);
|
||||
}
|
||||
return MemoryRow::missing_memory_byte_value();
|
||||
}
|
||||
|
||||
void MemoryRandomAccess::buggyRamWrite(std::uint16_t address, const std::uint8_t data) {
|
||||
std::uint16_t ax = address & ~0x2000u;
|
||||
if (this->strapE.contains(ax)) {
|
||||
this->strapE.write(ax, data);
|
||||
}
|
||||
if (this->strapD.contains(ax)) {
|
||||
this->strapD.write(ax, data);
|
||||
}
|
||||
if (this->strapC.contains(ax)) {
|
||||
this->strapC.write(ax, data);
|
||||
}
|
||||
ax = address | 0x2000u;
|
||||
if (this->strapE.contains(ax)) {
|
||||
this->strapE.write(ax, data);
|
||||
}
|
||||
if (this->strapD.contains(ax)) {
|
||||
this->strapD.write(ax, data);
|
||||
}
|
||||
if (this->strapC.contains(ax)) {
|
||||
this->strapC.write(ax, data);
|
||||
}
|
||||
}
|
||||
|
||||
void MemoryRandomAccess::write(const std::uint16_t address, const std::uint8_t data) {
|
||||
if (this->revision == 0 && k20or24() && ((address & 0xC000u) == 0x4000u)) {
|
||||
buggyRamWrite(address, data);
|
||||
}
|
||||
if (this->strapE.contains(address)) {
|
||||
this->strapE.write(address, data);
|
||||
}
|
||||
if (this->strapD.contains(address)) {
|
||||
this->strapD.write(address, data);
|
||||
}
|
||||
if (this->strapC.contains(address)) {
|
||||
this->strapC.write(address, data);
|
||||
}
|
||||
}
|
||||
|
||||
void MemoryRandomAccess::powerOn() {
|
||||
this->rowE.powerOn();
|
||||
this->rowD.powerOn();
|
||||
this->rowC.powerOn();
|
||||
}
|
||||
|
||||
void MemoryRandomAccess::powerOff() {
|
||||
this->rowE.powerOff();
|
||||
this->rowD.powerOff();
|
||||
this->rowC.powerOff();
|
||||
}
|
||||
|
|
@ -0,0 +1,38 @@
|
|||
#ifndef MEMORYRANDOMACCESS_H
|
||||
#define MEMORYRANDOMACCESS_H
|
||||
|
||||
#include "memorystrapping.h"
|
||||
#include "memoryrow.h"
|
||||
#include <cstdint>
|
||||
#include <string>
|
||||
|
||||
class MemoryRandomAccess {
|
||||
private:
|
||||
int &revision;
|
||||
MemoryRow rowE;
|
||||
MemoryStrapping strapE;
|
||||
MemoryRow rowD;
|
||||
MemoryStrapping strapD;
|
||||
MemoryRow rowC;
|
||||
MemoryStrapping strapC;
|
||||
|
||||
MemoryRow &row_of(const std::string &row);
|
||||
MemoryStrapping &strapping_of(const std::string &row);
|
||||
std::uint8_t buggyRamRead(std::uint16_t address) const;
|
||||
void buggyRamWrite(std::uint16_t address, const std::uint8_t data);
|
||||
bool k20or24() const;
|
||||
|
||||
public:
|
||||
MemoryRandomAccess(int &revision);
|
||||
|
||||
void insert_chip(const std::string &row, MemoryChip chip, const std::uint_fast8_t socket);
|
||||
void remove_chip(const std::string &row, const std::uint_fast8_t socket);
|
||||
void strap_to(const std::string &row, std::uint16_t addr_base, std::uint16_t addr_size);
|
||||
|
||||
std::uint8_t read(std::uint16_t address) const;
|
||||
void write(std::uint16_t address, const std::uint8_t data);
|
||||
void powerOn();
|
||||
void powerOff();
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,131 @@
|
|||
#include "memoryrow.h"
|
||||
#include <exception>
|
||||
#include <cstdlib>
|
||||
|
||||
/*
|
||||
* If any RAM IC sockets are empty, set the corresponding bits to 1 most of the time.
|
||||
* For some addresses it seems they are always 1, but for other addresses they can return
|
||||
* 0 sometimes, empirically I've seen anywhere from 8% to 15% of the time.
|
||||
*/
|
||||
static std::uint8_t randomize_missing_bits(std::uint8_t v, const std::uint8_t bits) {
|
||||
std::uint8_t bit = 1u;
|
||||
for (std::uint_fast8_t i = 0; i < 8; ++i) {
|
||||
if (bits & bit) {
|
||||
double r = static_cast<double>(std::rand())/RAND_MAX;
|
||||
if (r < 0.11) {
|
||||
v &= ~bit;
|
||||
} else {
|
||||
v |= bit;
|
||||
}
|
||||
}
|
||||
bit <<= 1;
|
||||
}
|
||||
return v;
|
||||
}
|
||||
|
||||
|
||||
|
||||
MemoryRow::MemoryRow(const char label):
|
||||
label(label) {
|
||||
}
|
||||
|
||||
MemoryRow::~MemoryRow() {
|
||||
}
|
||||
|
||||
void MemoryRow::insert_chip(MemoryChip chip, const std::uint_fast8_t socket) {
|
||||
if (socket < 8u) {
|
||||
remove_chip(socket);
|
||||
if (chip.exists()) {
|
||||
this->chips[socket] = chip;
|
||||
this->missing_bits &= ~(1u << socket);
|
||||
this->values_stored.resize(calculate_size());
|
||||
}
|
||||
} else {
|
||||
throw std::out_of_range("socket must be < 8");
|
||||
}
|
||||
}
|
||||
|
||||
void MemoryRow::remove_chip(const std::uint_fast8_t socket) {
|
||||
if (socket < 8u) {
|
||||
this->chips[socket] = MemoryChipEmptySocket();
|
||||
this->missing_bits |= (1u << socket);
|
||||
this->values_stored.resize(calculate_size());
|
||||
} else {
|
||||
throw std::out_of_range("socket must be < 8");
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* If no chips, return 0.
|
||||
* Otherwise, return minimum of existing chips (4K or 16K)
|
||||
*/
|
||||
std::uint16_t MemoryRow::calculate_size() const {
|
||||
std::uint16_t size_new = 0u;
|
||||
|
||||
for (std::uint_fast8_t i_chip = 0; i_chip < 8; ++i_chip) {
|
||||
const MemoryChip &chip = this->chips[i_chip];
|
||||
if (chip.exists()) {
|
||||
const std::uint16_t s = chip.size();
|
||||
if (size_new == 0u || s < size_new) {
|
||||
size_new = s;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return size_new;
|
||||
}
|
||||
|
||||
void MemoryRow::powerOff() {
|
||||
this->power = false;
|
||||
}
|
||||
|
||||
/*
|
||||
* Calls init of each chip, and uses a bit mask to assemble into bytes.
|
||||
*/
|
||||
void MemoryRow::powerOn() {
|
||||
if (!this->power) {
|
||||
this->power = true;
|
||||
|
||||
std::uint8_t mask_bit = 1u;
|
||||
for (std::uint_fast8_t i_bit = 0; i_bit < 8; ++i_bit) {
|
||||
const MemoryChip &chip = this->chips[i_bit];
|
||||
if (chip.exists()) {
|
||||
chip.init(mask_bit, this->values_stored, size());
|
||||
}
|
||||
mask_bit <<= 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
std::uint16_t MemoryRow::size() const {
|
||||
return static_cast<std::uint16_t>(this->values_stored.size());
|
||||
}
|
||||
|
||||
std::uint8_t MemoryRow::missing_memory_byte_value() {
|
||||
return randomize_missing_bits(0xFFu, 0xFFu);
|
||||
}
|
||||
|
||||
std::uint8_t MemoryRow::read(const std::uint16_t address_offset) const {
|
||||
if (this->power) {
|
||||
std::uint8_t v;
|
||||
if (address_offset < this->values_stored.size()) {
|
||||
v = this->values_stored[address_offset];
|
||||
if (this->missing_bits) {
|
||||
v = randomize_missing_bits(v, this->missing_bits);
|
||||
}
|
||||
} else {
|
||||
v = missing_memory_byte_value();
|
||||
}
|
||||
return v;
|
||||
} else {
|
||||
throw std::logic_error("cannot read memory when power is off");
|
||||
}
|
||||
}
|
||||
|
||||
void MemoryRow::write(const std::uint16_t address, const std::uint8_t data) {
|
||||
if (this->power) {
|
||||
this->values_stored[address] = data;
|
||||
} else {
|
||||
throw std::logic_error("cannot write memory when power is off");
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
#ifndef MEMORYROW_H
|
||||
#define MEMORYROW_H
|
||||
|
||||
#include "memorychip.h"
|
||||
#include <map>
|
||||
#include <vector>
|
||||
#include <array>
|
||||
#include <cstdint>
|
||||
|
||||
class MemoryRow {
|
||||
private:
|
||||
/* C, D, E */
|
||||
const char label;
|
||||
|
||||
bool power = false;
|
||||
|
||||
/* 8 sockets for memory chips (empty socket represented by MemoryChipEmptySocket) */
|
||||
std::array<MemoryChip,8> chips = {MemoryChipEmptySocket(),MemoryChipEmptySocket(),MemoryChipEmptySocket(),MemoryChipEmptySocket(),MemoryChipEmptySocket(),MemoryChipEmptySocket(),MemoryChipEmptySocket(),MemoryChipEmptySocket()};
|
||||
|
||||
/* bit mask of empty chip sockets */
|
||||
std::uint8_t missing_bits = 0xFFu;
|
||||
|
||||
/*
|
||||
* Instead of storing each bit in a MemoryChip (too slow), we store the data here as bytes,
|
||||
* representing one bit for each chip.
|
||||
*/
|
||||
std::vector<std::uint8_t> values_stored;
|
||||
|
||||
std::uint16_t calculate_size() const;
|
||||
|
||||
public:
|
||||
MemoryRow(const char label);
|
||||
virtual ~MemoryRow();
|
||||
|
||||
void insert_chip(MemoryChip chip, const std::uint_fast8_t socket);
|
||||
void remove_chip(const std::uint_fast8_t socket);
|
||||
void powerOff();
|
||||
void powerOn();
|
||||
|
||||
/* 4K or 16K, size of each chip (or minimum in corner case of mixed sizes) */
|
||||
std::uint16_t size() const;
|
||||
|
||||
std::uint8_t read(const std::uint16_t address) const;
|
||||
void write(const std::uint16_t address, const std::uint8_t data);
|
||||
|
||||
static std::uint8_t missing_memory_byte_value();
|
||||
};
|
||||
|
||||
#endif // MEMORYROW_H
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
#include "memorystrapping.h"
|
||||
#include <algorithm>
|
||||
|
||||
MemoryStrapping::MemoryStrapping(MemoryRow &row):
|
||||
row(row) {
|
||||
}
|
||||
|
||||
void MemoryStrapping::strap_to(std::uint16_t addr_base, std::uint16_t addr_size) {
|
||||
this->addr_base = addr_base;
|
||||
this->addr_size = addr_size;
|
||||
}
|
||||
|
||||
bool MemoryStrapping::contains(std::uint16_t address) const {
|
||||
return this->addr_base <= address && address < this->addr_base + std::min(this->row.size(), this->addr_size);
|
||||
}
|
||||
|
||||
std::uint8_t MemoryStrapping::read(const std::uint16_t address) const {
|
||||
return this->row.read(address - this->addr_base);
|
||||
}
|
||||
|
||||
void MemoryStrapping::write(const std::uint16_t address, const std::uint8_t data) {
|
||||
this->row.write(address - this->addr_base, data);
|
||||
}
|
||||
|
|
@ -0,0 +1,20 @@
|
|||
#ifndef MEMORYSTRAPPING_H
|
||||
#define MEMORYSTRAPPING_H
|
||||
|
||||
#include "memoryrow.h"
|
||||
#include <cstdint>
|
||||
|
||||
class MemoryStrapping {
|
||||
private:
|
||||
MemoryRow &row;
|
||||
std::uint16_t addr_base;
|
||||
std::uint16_t addr_size;
|
||||
public:
|
||||
MemoryStrapping(MemoryRow &row);
|
||||
void strap_to(std::uint16_t addr_base, std::uint16_t addr_size);
|
||||
bool contains(std::uint16_t address) const;
|
||||
std::uint8_t read(const std::uint16_t address) const;
|
||||
void write(const std::uint16_t address, const std::uint8_t data);
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
@ -40,7 +40,7 @@ void RAMInitializer::init()
|
|||
putBytesUntilFull(b++,2);
|
||||
putBytesUntilFull(b++,2);
|
||||
putBytesUntilFull(b++,1);
|
||||
};
|
||||
}
|
||||
|
||||
|
||||
void RAMInitializer::putBytesUntilFull(int bit, int pat)
|
||||
|
|
|
|||
Loading…
Reference in New Issue