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14360 lines
711 KiB
Plaintext
14360 lines
711 KiB
Plaintext
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AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
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---------------------------------------------------- 6502_functional_test.a65 ----------------------------------------------------
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6104 lines read, no errors in pass 1.
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;
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; 6 5 0 2 F U N C T I O N A L T E S T
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;
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; Copyright (C) 2012-2015 Klaus Dormann
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;
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; This program is free software: you can redistribute it and/or modify
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; it under the terms of the GNU General Public License as published by
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; the Free Software Foundation, either version 3 of the License, or
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; (at your option) any later version.
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;
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; This program is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with this program. If not, see <http://www.gnu.org/licenses/>.
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; This program is designed to test all opcodes of a 6502 emulator using all
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; addressing modes with focus on propper setting of the processor status
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; register bits.
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;
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; version 04-dec-2017
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; contact info at http://2m5.de or email K@2m5.de
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;
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; assembled with AS65 from http://www.kingswood-consulting.co.uk/assemblers/
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; command line switches: -l -m -s2 -w -h0
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; | | | | no page headers in listing
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; | | | wide listing (133 char/col)
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; | | write intel hex file instead of binary
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; | expand macros in listing
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; generate pass2 listing
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;
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; No IO - should be run from a monitor with access to registers.
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; To run load intel hex image with a load command, than alter PC to 400 hex
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; (code_segment) and enter a go command.
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; Loop on program counter determines error or successful completion of test.
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; Check listing for relevant traps (jump/branch *).
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; Please note that in early tests some instructions will have to be used before
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; they are actually tested!
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;
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; RESET, NMI or IRQ should not occur and will be trapped if vectors are enabled.
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; Tests documented behavior of the original NMOS 6502 only! No unofficial
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; opcodes. Additional opcodes of newer versions of the CPU (65C02, 65816) will
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; not be tested. Decimal ops will only be tested with valid BCD operands and
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; N V Z flags will be ignored.
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;
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; Debugging hints:
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; Most of the code is written sequentially. if you hit a trap, check the
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; immediately preceeding code for the instruction to be tested. Results are
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; tested first, flags are checked second by pushing them onto the stack and
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; pulling them to the accumulator after the result was checked. The "real"
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; flags are no longer valid for the tested instruction at this time!
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; If the tested instruction was indexed, the relevant index (X or Y) must
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; also be checked. Opposed to the flags, X and Y registers are still valid.
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;
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; versions:
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; 28-jul-2012 1st version distributed for testing
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; 29-jul-2012 fixed references to location 0, now #0
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; added license - GPLv3
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; 30-jul-2012 added configuration options
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; 01-aug-2012 added trap macro to allow user to change error handling
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; 01-dec-2012 fixed trap in branch field must be a branch
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; 02-mar-2013 fixed PLA flags not tested
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; 19-jul-2013 allowed ROM vectors to be loaded when load_data_direct = 0
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; added test sequence check to detect if tests jump their fence
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; 23-jul-2013 added RAM integrity check option
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; 16-aug-2013 added error report to standard output option
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; 13-dec-2014 added binary/decimal opcode table switch test
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; 14-dec-2014 improved relative address test
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; 23-aug-2015 added option to disable self modifying tests
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; 24-aug-2015 all self modifying immediate opcodes now execute in data RAM
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; added small branch offset pretest
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; 21-oct-2015 added option to disable decimal mode ADC & SBC tests
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; 04-dec-2017 fixed BRK only tested with interrupts enabled
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; added option to skip the remainder of a failing test
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; in report.i65
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; C O N F I G U R A T I O N
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;ROM_vectors writable (0=no, 1=yes)
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;if ROM vectors can not be used interrupts will not be trapped
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;as a consequence BRK can not be tested but will be emulated to test RTI
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0001 = ROM_vectors = 1
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;load_data_direct (0=move from code segment, 1=load directly)
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;loading directly is preferred but may not be supported by your platform
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;0 produces only consecutive object code, 1 is not suitable for a binary image
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0001 = load_data_direct = 1
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;I_flag behavior (0=force enabled, 1=force disabled, 2=prohibit change, 3=allow
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;change) 2 requires extra code and is not recommended. SEI & CLI can only be
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;tested if you allow changing the interrupt status (I_flag = 3)
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0003 = I_flag = 3
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;configure memory - try to stay away from memory used by the system
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;zero_page memory start address, $50 (80) consecutive Bytes required
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; add 2 if I_flag = 2
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000a = zero_page = $a
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;data_segment memory start address, $6A (106) consecutive Bytes required
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0200 = data_segment = $200
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if (data_segment & $ff) != 0
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ERROR ERROR ERROR low byte of data_segment MUST be $00 !!
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endif
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;code_segment memory start address, 13kB of consecutive space required
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; add 2.5 kB if I_flag = 2
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0400 = code_segment = $400
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;self modifying code may be disabled to allow running in ROM
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;0=part of the code is self modifying and must reside in RAM
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;1=tests disabled: branch range
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0000 = disable_selfmod = 0
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;report errors through I/O channel (0=use standard self trap loops, 1=include
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;report.i65 as I/O channel, add 3.5 kB)
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0000 = report = 0
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;RAM integrity test option. Checks for undesired RAM writes.
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;set lowest non RAM or RAM mirror address page (-1=disable, 0=64k, $40=16k)
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;leave disabled if a monitor, OS or background interrupt is allowed to alter RAM
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ffff = ram_top = -1
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;disable test decimal mode ADC & SBC, 0=enable, 1=disable,
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;2=disable including decimal flag in processor status
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0000 = disable_decimal = 0
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noopt ;do not take shortcuts
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;macros for error & success traps to allow user modification
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;example:
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;trap macro
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; jsr my_error_handler
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; endm
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;trap_eq macro
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; bne skip\?
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; trap ;failed equal (zero)
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;skip\?
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; endm
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;
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; my_error_handler should pop the calling address from the stack and report it.
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; putting larger portions of code (more than 3 bytes) inside the trap macro
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; may lead to branch range problems for some tests.
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if report = 0
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trap macro
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jmp * ;failed anyway
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endm
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trap_eq macro
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beq * ;failed equal (zero)
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endm
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trap_ne macro
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bne * ;failed not equal (non zero)
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endm
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trap_cs macro
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bcs * ;failed carry set
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endm
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trap_cc macro
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bcc * ;failed carry clear
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endm
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trap_mi macro
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bmi * ;failed minus (bit 7 set)
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endm
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trap_pl macro
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bpl * ;failed plus (bit 7 clear)
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endm
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trap_vs macro
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bvs * ;failed overflow set
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endm
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trap_vc macro
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bvc * ;failed overflow clear
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endm
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; please observe that during the test the stack gets invalidated
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; therefore a RTS inside the success macro is not possible
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success macro
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jmp * ;test passed, no errors
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endm
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endif
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if report = 1
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trap macro
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jsr report_error
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endm
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trap_eq macro
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bne skip\?
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trap ;failed equal (zero)
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skip\?
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endm
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trap_ne macro
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beq skip\?
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trap ;failed not equal (non zero)
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skip\?
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endm
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trap_cs macro
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bcc skip\?
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trap ;failed carry set
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skip\?
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endm
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trap_cc macro
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bcs skip\?
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trap ;failed carry clear
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skip\?
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endm
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trap_mi macro
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bpl skip\?
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trap ;failed minus (bit 7 set)
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skip\?
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endm
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trap_pl macro
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bmi skip\?
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trap ;failed plus (bit 7 clear)
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skip\?
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endm
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trap_vs macro
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bvc skip\?
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trap ;failed overflow set
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skip\?
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endm
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trap_vc macro
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bvs skip\?
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trap ;failed overflow clear
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skip\?
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endm
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; please observe that during the test the stack gets invalidated
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; therefore a RTS inside the success macro is not possible
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success macro
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jsr report_success
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endm
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endif
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0001 = carry equ %00000001 ;flag bits in status
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0002 = zero equ %00000010
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0004 = intdis equ %00000100
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0008 = decmode equ %00001000
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0010 = break equ %00010000
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0020 = reserv equ %00100000
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0040 = overfl equ %01000000
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0080 = minus equ %10000000
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0001 = fc equ carry
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0002 = fz equ zero
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0003 = fzc equ carry+zero
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0040 = fv equ overfl
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0042 = fvz equ overfl+zero
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0080 = fn equ minus
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0081 = fnc equ minus+carry
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0082 = fnz equ minus+zero
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0083 = fnzc equ minus+zero+carry
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00c0 = fnv equ minus+overfl
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0030 = fao equ break+reserv ;bits always on after PHP, BRK
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0034 = fai equ fao+intdis ;+ forced interrupt disable
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0038 = faod equ fao+decmode ;+ ignore decimal
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003c = faid equ fai+decmode ;+ ignore decimal
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00ff = m8 equ $ff ;8 bit mask
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00fb = m8i equ $ff&~intdis ;8 bit mask - interrupt disable
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;macros to allow masking of status bits.
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;masking test of decimal bit
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;masking of interrupt enable/disable on load and compare
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;masking of always on bits after PHP or BRK (unused & break) on compare
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if disable_decimal < 2
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if I_flag = 0
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load_flag macro
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lda #\1&m8i ;force enable interrupts (mask I)
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endm
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cmp_flag macro
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cmp #(\1|fao)&m8i ;I_flag is always enabled + always on bits
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endm
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eor_flag macro
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eor #(\1&m8i|fao) ;mask I, invert expected flags + always on bits
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endm
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endif
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if I_flag = 1
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load_flag macro
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lda #\1|intdis ;force disable interrupts
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endm
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cmp_flag macro
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cmp #(\1|fai)&m8 ;I_flag is always disabled + always on bits
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endm
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eor_flag macro
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eor #(\1|fai) ;invert expected flags + always on bits + I
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endm
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endif
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if I_flag = 2
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load_flag macro
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lda #\1
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ora flag_I_on ;restore I-flag
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and flag_I_off
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endm
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cmp_flag macro
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eor flag_I_on ;I_flag is never changed
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cmp #(\1|fao)&m8i ;expected flags + always on bits, mask I
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endm
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eor_flag macro
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eor flag_I_on ;I_flag is never changed
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eor #(\1&m8i|fao) ;mask I, invert expected flags + always on bits
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endm
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endif
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if I_flag = 3
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load_flag macro
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lda #\1 ;allow test to change I-flag (no mask)
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endm
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cmp_flag macro
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cmp #(\1|fao)&m8 ;expected flags + always on bits
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endm
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eor_flag macro
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eor #\1|fao ;invert expected flags + always on bits
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endm
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endif
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else
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if I_flag = 0
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load_flag macro
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lda #\1&m8i ;force enable interrupts (mask I)
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endm
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cmp_flag macro
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ora #decmode ;ignore decimal mode bit
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cmp #(\1|faod)&m8i ;I_flag is always enabled + always on bits
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endm
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eor_flag macro
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ora #decmode ;ignore decimal mode bit
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eor #(\1&m8i|faod) ;mask I, invert expected flags + always on bits
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endm
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endif
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if I_flag = 1
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load_flag macro
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lda #\1|intdis ;force disable interrupts
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endm
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cmp_flag macro
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ora #decmode ;ignore decimal mode bit
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cmp #(\1|faid)&m8 ;I_flag is always disabled + always on bits
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endm
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eor_flag macro
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ora #decmode ;ignore decimal mode bit
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eor #(\1|faid) ;invert expected flags + always on bits + I
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endm
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endif
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if I_flag = 2
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load_flag macro
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|||
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lda #\1
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ora flag_I_on ;restore I-flag
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|||
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and flag_I_off
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endm
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cmp_flag macro
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|||
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eor flag_I_on ;I_flag is never changed
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|||
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|
ora #decmode ;ignore decimal mode bit
|
|||
|
|
cmp #(\1|faod)&m8i ;expected flags + always on bits, mask I
|
|||
|
|
endm
|
|||
|
|
eor_flag macro
|
|||
|
|
eor flag_I_on ;I_flag is never changed
|
|||
|
|
ora #decmode ;ignore decimal mode bit
|
|||
|
|
eor #(\1&m8i|faod) ;mask I, invert expected flags + always on bits
|
|||
|
|
endm
|
|||
|
|
endif
|
|||
|
|
if I_flag = 3
|
|||
|
|
load_flag macro
|
|||
|
|
lda #\1 ;allow test to change I-flag (no mask)
|
|||
|
|
endm
|
|||
|
|
cmp_flag macro
|
|||
|
|
ora #decmode ;ignore decimal mode bit
|
|||
|
|
cmp #(\1|faod)&m8 ;expected flags + always on bits
|
|||
|
|
endm
|
|||
|
|
eor_flag macro
|
|||
|
|
ora #decmode ;ignore decimal mode bit
|
|||
|
|
eor #\1|faod ;invert expected flags + always on bits
|
|||
|
|
endm
|
|||
|
|
endif
|
|||
|
|
endif
|
|||
|
|
|
|||
|
|
;macros to set (register|memory|zeropage) & status
|
|||
|
|
set_stat macro ;setting flags in the processor status register
|
|||
|
|
load_flag \1
|
|||
|
|
pha ;use stack to load status
|
|||
|
|
plp
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
set_a macro ;precharging accu & status
|
|||
|
|
load_flag \2
|
|||
|
|
pha ;use stack to load status
|
|||
|
|
lda #\1 ;precharge accu
|
|||
|
|
plp
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
set_x macro ;precharging index & status
|
|||
|
|
load_flag \2
|
|||
|
|
pha ;use stack to load status
|
|||
|
|
ldx #\1 ;precharge index x
|
|||
|
|
plp
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
set_y macro ;precharging index & status
|
|||
|
|
load_flag \2
|
|||
|
|
pha ;use stack to load status
|
|||
|
|
ldy #\1 ;precharge index y
|
|||
|
|
plp
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
set_ax macro ;precharging indexed accu & immediate status
|
|||
|
|
load_flag \2
|
|||
|
|
pha ;use stack to load status
|
|||
|
|
lda \1,x ;precharge accu
|
|||
|
|
plp
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
set_ay macro ;precharging indexed accu & immediate status
|
|||
|
|
load_flag \2
|
|||
|
|
pha ;use stack to load status
|
|||
|
|
lda \1,y ;precharge accu
|
|||
|
|
plp
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
set_z macro ;precharging indexed zp & immediate status
|
|||
|
|
load_flag \2
|
|||
|
|
pha ;use stack to load status
|
|||
|
|
lda \1,x ;load to zeropage
|
|||
|
|
sta zpt
|
|||
|
|
plp
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
set_zx macro ;precharging zp,x & immediate status
|
|||
|
|
load_flag \2
|
|||
|
|
pha ;use stack to load status
|
|||
|
|
lda \1,x ;load to indexed zeropage
|
|||
|
|
sta zpt,x
|
|||
|
|
plp
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
set_abs macro ;precharging indexed memory & immediate status
|
|||
|
|
load_flag \2
|
|||
|
|
pha ;use stack to load status
|
|||
|
|
lda \1,x ;load to memory
|
|||
|
|
sta abst
|
|||
|
|
plp
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
set_absx macro ;precharging abs,x & immediate status
|
|||
|
|
load_flag \2
|
|||
|
|
pha ;use stack to load status
|
|||
|
|
lda \1,x ;load to indexed memory
|
|||
|
|
sta abst,x
|
|||
|
|
plp
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
;macros to test (register|memory|zeropage) & status & (mask)
|
|||
|
|
tst_stat macro ;testing flags in the processor status register
|
|||
|
|
php ;save status
|
|||
|
|
pla ;use stack to retrieve status
|
|||
|
|
pha
|
|||
|
|
cmp_flag \1
|
|||
|
|
trap_ne
|
|||
|
|
plp ;restore status
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
tst_a macro ;testing result in accu & flags
|
|||
|
|
php ;save flags
|
|||
|
|
cmp #\1 ;test result
|
|||
|
|
trap_ne
|
|||
|
|
pla ;load status
|
|||
|
|
pha
|
|||
|
|
cmp_flag \2
|
|||
|
|
trap_ne
|
|||
|
|
plp ;restore status
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
tst_x macro ;testing result in x index & flags
|
|||
|
|
php ;save flags
|
|||
|
|
cpx #\1 ;test result
|
|||
|
|
trap_ne
|
|||
|
|
pla ;load status
|
|||
|
|
pha
|
|||
|
|
cmp_flag \2
|
|||
|
|
trap_ne
|
|||
|
|
plp ;restore status
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
tst_y macro ;testing result in y index & flags
|
|||
|
|
php ;save flags
|
|||
|
|
cpy #\1 ;test result
|
|||
|
|
trap_ne
|
|||
|
|
pla ;load status
|
|||
|
|
pha
|
|||
|
|
cmp_flag \2
|
|||
|
|
trap_ne
|
|||
|
|
plp ;restore status
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
tst_ax macro ;indexed testing result in accu & flags
|
|||
|
|
php ;save flags
|
|||
|
|
cmp \1,x ;test result
|
|||
|
|
trap_ne
|
|||
|
|
pla ;load status
|
|||
|
|
eor_flag \3
|
|||
|
|
cmp \2,x ;test flags
|
|||
|
|
trap_ne ;
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
tst_ay macro ;indexed testing result in accu & flags
|
|||
|
|
php ;save flags
|
|||
|
|
cmp \1,y ;test result
|
|||
|
|
trap_ne ;
|
|||
|
|
pla ;load status
|
|||
|
|
eor_flag \3
|
|||
|
|
cmp \2,y ;test flags
|
|||
|
|
trap_ne
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
tst_z macro ;indexed testing result in zp & flags
|
|||
|
|
php ;save flags
|
|||
|
|
lda zpt
|
|||
|
|
cmp \1,x ;test result
|
|||
|
|
trap_ne
|
|||
|
|
pla ;load status
|
|||
|
|
eor_flag \3
|
|||
|
|
cmp \2,x ;test flags
|
|||
|
|
trap_ne
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
tst_zx macro ;testing result in zp,x & flags
|
|||
|
|
php ;save flags
|
|||
|
|
lda zpt,x
|
|||
|
|
cmp \1,x ;test result
|
|||
|
|
trap_ne
|
|||
|
|
pla ;load status
|
|||
|
|
eor_flag \3
|
|||
|
|
cmp \2,x ;test flags
|
|||
|
|
trap_ne
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
tst_abs macro ;indexed testing result in memory & flags
|
|||
|
|
php ;save flags
|
|||
|
|
lda abst
|
|||
|
|
cmp \1,x ;test result
|
|||
|
|
trap_ne
|
|||
|
|
pla ;load status
|
|||
|
|
eor_flag \3
|
|||
|
|
cmp \2,x ;test flags
|
|||
|
|
trap_ne
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
tst_absx macro ;testing result in abs,x & flags
|
|||
|
|
php ;save flags
|
|||
|
|
lda abst,x
|
|||
|
|
cmp \1,x ;test result
|
|||
|
|
trap_ne
|
|||
|
|
pla ;load status
|
|||
|
|
eor_flag \3
|
|||
|
|
cmp \2,x ;test flags
|
|||
|
|
trap_ne
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
; RAM integrity test
|
|||
|
|
; verifies that none of the previous tests has altered RAM outside of the
|
|||
|
|
; designated write areas.
|
|||
|
|
; uses zpt word as indirect pointer, zpt+2 word as checksum
|
|||
|
|
if ram_top > -1
|
|||
|
|
check_ram macro
|
|||
|
|
cld
|
|||
|
|
lda #0
|
|||
|
|
sta zpt ;set low byte of indirect pointer
|
|||
|
|
sta zpt+3 ;checksum high byte
|
|||
|
|
if disable_selfmod = 0
|
|||
|
|
sta range_adr ;reset self modifying code
|
|||
|
|
endif
|
|||
|
|
clc
|
|||
|
|
ldx #zp_bss-zero_page ;zeropage - write test area
|
|||
|
|
ccs3\? adc zero_page,x
|
|||
|
|
bcc ccs2\?
|
|||
|
|
inc zpt+3 ;carry to high byte
|
|||
|
|
clc
|
|||
|
|
ccs2\? inx
|
|||
|
|
bne ccs3\?
|
|||
|
|
ldx #hi(abs1) ;set high byte of indirect pointer
|
|||
|
|
stx zpt+1
|
|||
|
|
ldy #lo(abs1) ;data after write & execute test area
|
|||
|
|
ccs5\? adc (zpt),y
|
|||
|
|
bcc ccs4\?
|
|||
|
|
inc zpt+3 ;carry to high byte
|
|||
|
|
clc
|
|||
|
|
ccs4\? iny
|
|||
|
|
bne ccs5\?
|
|||
|
|
inx ;advance RAM high address
|
|||
|
|
stx zpt+1
|
|||
|
|
cpx #ram_top
|
|||
|
|
bne ccs5\?
|
|||
|
|
sta zpt+2 ;checksum low is
|
|||
|
|
cmp ram_chksm ;checksum low expected
|
|||
|
|
trap_ne ;checksum mismatch
|
|||
|
|
lda zpt+3 ;checksum high is
|
|||
|
|
cmp ram_chksm+1 ;checksum high expected
|
|||
|
|
trap_ne ;checksum mismatch
|
|||
|
|
endm
|
|||
|
|
else
|
|||
|
|
check_ram macro
|
|||
|
|
;RAM check disabled - RAM size not set
|
|||
|
|
endm
|
|||
|
|
endif
|
|||
|
|
|
|||
|
|
next_test macro ;make sure, tests don't jump the fence
|
|||
|
|
lda test_case ;previous test
|
|||
|
|
cmp #test_num
|
|||
|
|
trap_ne ;test is out of sequence
|
|||
|
|
test_num = test_num + 1
|
|||
|
|
lda #test_num ;*** next tests' number
|
|||
|
|
sta test_case
|
|||
|
|
;check_ram ;uncomment to find altered RAM after each test
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
if load_data_direct = 1
|
|||
|
|
data
|
|||
|
|
else
|
|||
|
|
bss ;uninitialized segment, copy of data at end of code!
|
|||
|
|
endif
|
|||
|
|
; org zero_page
|
|||
|
|
0000 = org 0 ;edited to provide binaries loading from 0
|
|||
|
|
0000 : 00000000000000.. ds zero_page
|
|||
|
|
;break test interrupt save
|
|||
|
|
000a : 00 irq_a ds 1 ;a register
|
|||
|
|
000b : 00 irq_x ds 1 ;x register
|
|||
|
|
if I_flag = 2
|
|||
|
|
;masking for I bit in status
|
|||
|
|
flag_I_on ds 1 ;or mask to load flags
|
|||
|
|
flag_I_off ds 1 ;and mask to load flags
|
|||
|
|
endif
|
|||
|
|
000c : zpt ;5 bytes store/modify test area
|
|||
|
|
;add/subtract operand generation and result/flag prediction
|
|||
|
|
000c : 00 adfc ds 1 ;carry flag before op
|
|||
|
|
000d : 00 ad1 ds 1 ;operand 1 - accumulator
|
|||
|
|
000e : 00 ad2 ds 1 ;operand 2 - memory / immediate
|
|||
|
|
000f : 00 adrl ds 1 ;expected result bits 0-7
|
|||
|
|
0010 : 00 adrh ds 1 ;expected result bit 8 (carry)
|
|||
|
|
0011 : 00 adrf ds 1 ;expected flags NV0000ZC (only binary mode)
|
|||
|
|
0012 : 00 sb2 ds 1 ;operand 2 complemented for subtract
|
|||
|
|
0013 : zp_bss
|
|||
|
|
0013 : c3824100 zp1 db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
|
|||
|
|
0017 : 7f zp7f db $7f ;test pattern for compare
|
|||
|
|
;logical zeropage operands
|
|||
|
|
0018 : 001f7180 zpOR db 0,$1f,$71,$80 ;test pattern for OR
|
|||
|
|
001c : 0fff7f80 zpAN db $0f,$ff,$7f,$80 ;test pattern for AND
|
|||
|
|
0020 : ff0f8f8f zpEO db $ff,$0f,$8f,$8f ;test pattern for EOR
|
|||
|
|
;indirect addressing pointers
|
|||
|
|
0024 : 1702 ind1 dw abs1 ;indirect pointer to pattern in absolute memory
|
|||
|
|
0026 : 1802 dw abs1+1
|
|||
|
|
0028 : 1902 dw abs1+2
|
|||
|
|
002a : 1a02 dw abs1+3
|
|||
|
|
002c : 1b02 dw abs7f
|
|||
|
|
002e : 1f01 inw1 dw abs1-$f8 ;indirect pointer for wrap-test pattern
|
|||
|
|
0030 : 0302 indt dw abst ;indirect pointer to store area in absolute memory
|
|||
|
|
0032 : 0402 dw abst+1
|
|||
|
|
0034 : 0502 dw abst+2
|
|||
|
|
0036 : 0602 dw abst+3
|
|||
|
|
0038 : 0b01 inwt dw abst-$f8 ;indirect pointer for wrap-test store
|
|||
|
|
003a : 4e02 indAN dw absAN ;indirect pointer to AND pattern in absolute memory
|
|||
|
|
003c : 4f02 dw absAN+1
|
|||
|
|
003e : 5002 dw absAN+2
|
|||
|
|
0040 : 5102 dw absAN+3
|
|||
|
|
0042 : 5202 indEO dw absEO ;indirect pointer to EOR pattern in absolute memory
|
|||
|
|
0044 : 5302 dw absEO+1
|
|||
|
|
0046 : 5402 dw absEO+2
|
|||
|
|
0048 : 5502 dw absEO+3
|
|||
|
|
004a : 4a02 indOR dw absOR ;indirect pointer to OR pattern in absolute memory
|
|||
|
|
004c : 4b02 dw absOR+1
|
|||
|
|
004e : 4c02 dw absOR+2
|
|||
|
|
0050 : 4d02 dw absOR+3
|
|||
|
|
;add/subtract indirect pointers
|
|||
|
|
0052 : 0302 adi2 dw ada2 ;indirect pointer to operand 2 in absolute memory
|
|||
|
|
0054 : 0402 sbi2 dw sba2 ;indirect pointer to complemented operand 2 (SBC)
|
|||
|
|
0056 : 0401 adiy2 dw ada2-$ff ;with offset for indirect indexed
|
|||
|
|
0058 : 0501 sbiy2 dw sba2-$ff
|
|||
|
|
005a : zp_bss_end
|
|||
|
|
|
|||
|
|
0200 = org data_segment
|
|||
|
|
0200 : 00 test_case ds 1 ;current test number
|
|||
|
|
0201 : 0000 ram_chksm ds 2 ;checksum for RAM integrity test
|
|||
|
|
;add/subtract operand copy - abs tests write area
|
|||
|
|
0203 : abst ;5 bytes store/modify test area
|
|||
|
|
0203 : 00 ada2 ds 1 ;operand 2
|
|||
|
|
0204 : 00 sba2 ds 1 ;operand 2 complemented for subtract
|
|||
|
|
0205 : 000000 ds 3 ;fill remaining bytes
|
|||
|
|
0208 : data_bss
|
|||
|
|
if load_data_direct = 1
|
|||
|
|
0208 : 2900 ex_andi and #0 ;execute immediate opcodes
|
|||
|
|
020a : 60 rts
|
|||
|
|
020b : 4900 ex_eori eor #0 ;execute immediate opcodes
|
|||
|
|
020d : 60 rts
|
|||
|
|
020e : 0900 ex_orai ora #0 ;execute immediate opcodes
|
|||
|
|
0210 : 60 rts
|
|||
|
|
0211 : 6900 ex_adci adc #0 ;execute immediate opcodes
|
|||
|
|
0213 : 60 rts
|
|||
|
|
0214 : e900 ex_sbci sbc #0 ;execute immediate opcodes
|
|||
|
|
0216 : 60 rts
|
|||
|
|
else
|
|||
|
|
ex_andi ds 3
|
|||
|
|
ex_eori ds 3
|
|||
|
|
ex_orai ds 3
|
|||
|
|
ex_adci ds 3
|
|||
|
|
ex_sbci ds 3
|
|||
|
|
endif
|
|||
|
|
0217 : c3824100 abs1 db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
|
|||
|
|
021b : 7f abs7f db $7f ;test pattern for compare
|
|||
|
|
;loads
|
|||
|
|
021c : 80800002 fLDx db fn,fn,0,fz ;expected flags for load
|
|||
|
|
;shifts
|
|||
|
|
0220 : rASL ;expected result ASL & ROL -carry
|
|||
|
|
0220 : 86048200 rROL db $86,$04,$82,0 ; "
|
|||
|
|
0224 : 87058301 rROLc db $87,$05,$83,1 ;expected result ROL +carry
|
|||
|
|
0228 : rLSR ;expected result LSR & ROR -carry
|
|||
|
|
0228 : 61412000 rROR db $61,$41,$20,0 ; "
|
|||
|
|
022c : e1c1a080 rRORc db $e1,$c1,$a0,$80 ;expected result ROR +carry
|
|||
|
|
0230 : fASL ;expected flags for shifts
|
|||
|
|
0230 : 81018002 fROL db fnc,fc,fn,fz ;no carry in
|
|||
|
|
0234 : 81018000 fROLc db fnc,fc,fn,0 ;carry in
|
|||
|
|
0238 : fLSR
|
|||
|
|
0238 : 01000102 fROR db fc,0,fc,fz ;no carry in
|
|||
|
|
023c : 81808180 fRORc db fnc,fn,fnc,fn ;carry in
|
|||
|
|
;increments (decrements)
|
|||
|
|
0240 : 7f80ff0001 rINC db $7f,$80,$ff,0,1 ;expected result for INC/DEC
|
|||
|
|
0245 : 0080800200 fINC db 0,fn,fn,fz,0 ;expected flags for INC/DEC
|
|||
|
|
;logical memory operand
|
|||
|
|
024a : 001f7180 absOR db 0,$1f,$71,$80 ;test pattern for OR
|
|||
|
|
024e : 0fff7f80 absAN db $0f,$ff,$7f,$80 ;test pattern for AND
|
|||
|
|
0252 : ff0f8f8f absEO db $ff,$0f,$8f,$8f ;test pattern for EOR
|
|||
|
|
;logical accu operand
|
|||
|
|
0256 : 00f11f00 absORa db 0,$f1,$1f,0 ;test pattern for OR
|
|||
|
|
025a : f0ffffff absANa db $f0,$ff,$ff,$ff ;test pattern for AND
|
|||
|
|
025e : fff0f00f absEOa db $ff,$f0,$f0,$0f ;test pattern for EOR
|
|||
|
|
;logical results
|
|||
|
|
0262 : 00ff7f80 absrlo db 0,$ff,$7f,$80
|
|||
|
|
0266 : 02800080 absflo db fz,fn,0,fn
|
|||
|
|
026a : data_bss_end
|
|||
|
|
|
|||
|
|
|
|||
|
|
code
|
|||
|
|
0400 = org code_segment
|
|||
|
|
0400 : d8 start cld
|
|||
|
|
0401 : a2ff ldx #$ff
|
|||
|
|
0403 : 9a txs
|
|||
|
|
0404 : a900 lda #0 ;*** test 0 = initialize
|
|||
|
|
0406 : 8d0002 sta test_case
|
|||
|
|
0000 = test_num = 0
|
|||
|
|
|
|||
|
|
;stop interrupts before initializing BSS
|
|||
|
|
if I_flag = 1
|
|||
|
|
sei
|
|||
|
|
endif
|
|||
|
|
|
|||
|
|
;initialize I/O for report channel
|
|||
|
|
if report = 1
|
|||
|
|
jsr report_init
|
|||
|
|
endif
|
|||
|
|
|
|||
|
|
;pretest small branch offset
|
|||
|
|
0409 : a205 ldx #5
|
|||
|
|
040b : 4c3304 jmp psb_test
|
|||
|
|
040e : psb_bwok
|
|||
|
|
040e : a005 ldy #5
|
|||
|
|
0410 : d008 bne psb_forw
|
|||
|
|
trap ;branch should be taken
|
|||
|
|
0412 : 4c1204 > jmp * ;failed anyway
|
|||
|
|
|
|||
|
|
0415 : 88 dey ;forward landing zone
|
|||
|
|
0416 : 88 dey
|
|||
|
|
0417 : 88 dey
|
|||
|
|
0418 : 88 dey
|
|||
|
|
0419 : 88 dey
|
|||
|
|
041a : psb_forw
|
|||
|
|
041a : 88 dey
|
|||
|
|
041b : 88 dey
|
|||
|
|
041c : 88 dey
|
|||
|
|
041d : 88 dey
|
|||
|
|
041e : 88 dey
|
|||
|
|
041f : f017 beq psb_fwok
|
|||
|
|
trap ;forward offset
|
|||
|
|
0421 : 4c2104 > jmp * ;failed anyway
|
|||
|
|
|
|||
|
|
|
|||
|
|
0424 : ca dex ;backward landing zone
|
|||
|
|
0425 : ca dex
|
|||
|
|
0426 : ca dex
|
|||
|
|
0427 : ca dex
|
|||
|
|
0428 : ca dex
|
|||
|
|
0429 : psb_back
|
|||
|
|
0429 : ca dex
|
|||
|
|
042a : ca dex
|
|||
|
|
042b : ca dex
|
|||
|
|
042c : ca dex
|
|||
|
|
042d : ca dex
|
|||
|
|
042e : f0de beq psb_bwok
|
|||
|
|
trap ;backward offset
|
|||
|
|
0430 : 4c3004 > jmp * ;failed anyway
|
|||
|
|
|
|||
|
|
0433 : psb_test
|
|||
|
|
0433 : d0f4 bne psb_back
|
|||
|
|
trap ;branch should be taken
|
|||
|
|
0435 : 4c3504 > jmp * ;failed anyway
|
|||
|
|
|
|||
|
|
0438 : psb_fwok
|
|||
|
|
|
|||
|
|
;initialize BSS segment
|
|||
|
|
if load_data_direct != 1
|
|||
|
|
ldx #zp_end-zp_init-1
|
|||
|
|
ld_zp lda zp_init,x
|
|||
|
|
sta zp_bss,x
|
|||
|
|
dex
|
|||
|
|
bpl ld_zp
|
|||
|
|
ldx #data_end-data_init-1
|
|||
|
|
ld_data lda data_init,x
|
|||
|
|
sta data_bss,x
|
|||
|
|
dex
|
|||
|
|
bpl ld_data
|
|||
|
|
if ROM_vectors = 1
|
|||
|
|
ldx #5
|
|||
|
|
ld_vect lda vec_init,x
|
|||
|
|
sta vec_bss,x
|
|||
|
|
dex
|
|||
|
|
bpl ld_vect
|
|||
|
|
endif
|
|||
|
|
endif
|
|||
|
|
|
|||
|
|
;retain status of interrupt flag
|
|||
|
|
if I_flag = 2
|
|||
|
|
php
|
|||
|
|
pla
|
|||
|
|
and #4 ;isolate flag
|
|||
|
|
sta flag_I_on ;or mask
|
|||
|
|
eor #lo(~4) ;reverse
|
|||
|
|
sta flag_I_off ;and mask
|
|||
|
|
endif
|
|||
|
|
|
|||
|
|
;generate checksum for RAM integrity test
|
|||
|
|
if ram_top > -1
|
|||
|
|
lda #0
|
|||
|
|
sta zpt ;set low byte of indirect pointer
|
|||
|
|
sta ram_chksm+1 ;checksum high byte
|
|||
|
|
if disable_selfmod = 0
|
|||
|
|
sta range_adr ;reset self modifying code
|
|||
|
|
endif
|
|||
|
|
clc
|
|||
|
|
ldx #zp_bss-zero_page ;zeropage - write test area
|
|||
|
|
gcs3 adc zero_page,x
|
|||
|
|
bcc gcs2
|
|||
|
|
inc ram_chksm+1 ;carry to high byte
|
|||
|
|
clc
|
|||
|
|
gcs2 inx
|
|||
|
|
bne gcs3
|
|||
|
|
ldx #hi(abs1) ;set high byte of indirect pointer
|
|||
|
|
stx zpt+1
|
|||
|
|
ldy #lo(abs1) ;data after write & execute test area
|
|||
|
|
gcs5 adc (zpt),y
|
|||
|
|
bcc gcs4
|
|||
|
|
inc ram_chksm+1 ;carry to high byte
|
|||
|
|
clc
|
|||
|
|
gcs4 iny
|
|||
|
|
bne gcs5
|
|||
|
|
inx ;advance RAM high address
|
|||
|
|
stx zpt+1
|
|||
|
|
cpx #ram_top
|
|||
|
|
bne gcs5
|
|||
|
|
sta ram_chksm ;checksum complete
|
|||
|
|
endif
|
|||
|
|
next_test
|
|||
|
|
0438 : ad0002 > lda test_case ;previous test
|
|||
|
|
043b : c900 > cmp #test_num
|
|||
|
|
> trap_ne ;test is out of sequence
|
|||
|
|
043d : d0fe > bne * ;failed not equal (non zero)
|
|||
|
|
>
|
|||
|
|
0001 = >test_num = test_num + 1
|
|||
|
|
043f : a901 > lda #test_num ;*** next tests' number
|
|||
|
|
0441 : 8d0002 > sta test_case
|
|||
|
|
> ;check_ram ;uncomment to find altered RAM after each test
|
|||
|
|
|
|||
|
|
|
|||
|
|
if disable_selfmod = 0
|
|||
|
|
;testing relative addressing with BEQ
|
|||
|
|
0444 : a0fe ldy #$fe ;testing maximum range, not -1/-2 (invalid/self adr)
|
|||
|
|
0446 : range_loop
|
|||
|
|
0446 : 88 dey ;next relative address
|
|||
|
|
0447 : 98 tya
|
|||
|
|
0448 : aa tax ;precharge count to end of loop
|
|||
|
|
0449 : 1008 bpl range_fw ;calculate relative address
|
|||
|
|
044b : 18 clc ;avoid branch self or to relative address of branch
|
|||
|
|
044c : 6902 adc #2
|
|||
|
|
044e : ea nop ;offset landing zone - tolerate +/-5 offset to branch
|
|||
|
|
044f : ea nop
|
|||
|
|
0450 : ea nop
|
|||
|
|
0451 : ea nop
|
|||
|
|
0452 : ea nop
|
|||
|
|
0453 : range_fw
|
|||
|
|
0453 : ea nop
|
|||
|
|
0454 : ea nop
|
|||
|
|
0455 : ea nop
|
|||
|
|
0456 : ea nop
|
|||
|
|
0457 : ea nop
|
|||
|
|
0458 : 497f eor #$7f ;complement except sign
|
|||
|
|
045a : 8de604 sta range_adr ;load into test target
|
|||
|
|
045d : a900 lda #0 ;should set zero flag in status register
|
|||
|
|
045f : 4ce504 jmp range_op
|
|||
|
|
|
|||
|
|
0462 : ca dex ; offset landing zone - backward branch too far
|
|||
|
|
0463 : ca dex
|
|||
|
|
0464 : ca dex
|
|||
|
|
0465 : ca dex
|
|||
|
|
0466 : ca dex
|
|||
|
|
;relative address target field with branch under test in the middle
|
|||
|
|
0467 : ca dex ;-128 - max backward
|
|||
|
|
0468 : ca dex
|
|||
|
|
0469 : ca dex
|
|||
|
|
046a : ca dex
|
|||
|
|
046b : ca dex
|
|||
|
|
046c : ca dex
|
|||
|
|
046d : ca dex
|
|||
|
|
046e : ca dex
|
|||
|
|
046f : ca dex ;-120
|
|||
|
|
0470 : ca dex
|
|||
|
|
0471 : ca dex
|
|||
|
|
0472 : ca dex
|
|||
|
|
0473 : ca dex
|
|||
|
|
0474 : ca dex
|
|||
|
|
0475 : ca dex
|
|||
|
|
0476 : ca dex
|
|||
|
|
0477 : ca dex
|
|||
|
|
0478 : ca dex
|
|||
|
|
0479 : ca dex ;-110
|
|||
|
|
047a : ca dex
|
|||
|
|
047b : ca dex
|
|||
|
|
047c : ca dex
|
|||
|
|
047d : ca dex
|
|||
|
|
047e : ca dex
|
|||
|
|
047f : ca dex
|
|||
|
|
0480 : ca dex
|
|||
|
|
0481 : ca dex
|
|||
|
|
0482 : ca dex
|
|||
|
|
0483 : ca dex ;-100
|
|||
|
|
0484 : ca dex
|
|||
|
|
0485 : ca dex
|
|||
|
|
0486 : ca dex
|
|||
|
|
0487 : ca dex
|
|||
|
|
0488 : ca dex
|
|||
|
|
0489 : ca dex
|
|||
|
|
048a : ca dex
|
|||
|
|
048b : ca dex
|
|||
|
|
048c : ca dex
|
|||
|
|
048d : ca dex ;-90
|
|||
|
|
048e : ca dex
|
|||
|
|
048f : ca dex
|
|||
|
|
0490 : ca dex
|
|||
|
|
0491 : ca dex
|
|||
|
|
0492 : ca dex
|
|||
|
|
0493 : ca dex
|
|||
|
|
0494 : ca dex
|
|||
|
|
0495 : ca dex
|
|||
|
|
0496 : ca dex
|
|||
|
|
0497 : ca dex ;-80
|
|||
|
|
0498 : ca dex
|
|||
|
|
0499 : ca dex
|
|||
|
|
049a : ca dex
|
|||
|
|
049b : ca dex
|
|||
|
|
049c : ca dex
|
|||
|
|
049d : ca dex
|
|||
|
|
049e : ca dex
|
|||
|
|
049f : ca dex
|
|||
|
|
04a0 : ca dex
|
|||
|
|
04a1 : ca dex ;-70
|
|||
|
|
04a2 : ca dex
|
|||
|
|
04a3 : ca dex
|
|||
|
|
04a4 : ca dex
|
|||
|
|
04a5 : ca dex
|
|||
|
|
04a6 : ca dex
|
|||
|
|
04a7 : ca dex
|
|||
|
|
04a8 : ca dex
|
|||
|
|
04a9 : ca dex
|
|||
|
|
04aa : ca dex
|
|||
|
|
04ab : ca dex ;-60
|
|||
|
|
04ac : ca dex
|
|||
|
|
04ad : ca dex
|
|||
|
|
04ae : ca dex
|
|||
|
|
04af : ca dex
|
|||
|
|
04b0 : ca dex
|
|||
|
|
04b1 : ca dex
|
|||
|
|
04b2 : ca dex
|
|||
|
|
04b3 : ca dex
|
|||
|
|
04b4 : ca dex
|
|||
|
|
04b5 : ca dex ;-50
|
|||
|
|
04b6 : ca dex
|
|||
|
|
04b7 : ca dex
|
|||
|
|
04b8 : ca dex
|
|||
|
|
04b9 : ca dex
|
|||
|
|
04ba : ca dex
|
|||
|
|
04bb : ca dex
|
|||
|
|
04bc : ca dex
|
|||
|
|
04bd : ca dex
|
|||
|
|
04be : ca dex
|
|||
|
|
04bf : ca dex ;-40
|
|||
|
|
04c0 : ca dex
|
|||
|
|
04c1 : ca dex
|
|||
|
|
04c2 : ca dex
|
|||
|
|
04c3 : ca dex
|
|||
|
|
04c4 : ca dex
|
|||
|
|
04c5 : ca dex
|
|||
|
|
04c6 : ca dex
|
|||
|
|
04c7 : ca dex
|
|||
|
|
04c8 : ca dex
|
|||
|
|
04c9 : ca dex ;-30
|
|||
|
|
04ca : ca dex
|
|||
|
|
04cb : ca dex
|
|||
|
|
04cc : ca dex
|
|||
|
|
04cd : ca dex
|
|||
|
|
04ce : ca dex
|
|||
|
|
04cf : ca dex
|
|||
|
|
04d0 : ca dex
|
|||
|
|
04d1 : ca dex
|
|||
|
|
04d2 : ca dex
|
|||
|
|
04d3 : ca dex ;-20
|
|||
|
|
04d4 : ca dex
|
|||
|
|
04d5 : ca dex
|
|||
|
|
04d6 : ca dex
|
|||
|
|
04d7 : ca dex
|
|||
|
|
04d8 : ca dex
|
|||
|
|
04d9 : ca dex
|
|||
|
|
04da : ca dex
|
|||
|
|
04db : ca dex
|
|||
|
|
04dc : ca dex
|
|||
|
|
04dd : ca dex ;-10
|
|||
|
|
04de : ca dex
|
|||
|
|
04df : ca dex
|
|||
|
|
04e0 : ca dex
|
|||
|
|
04e1 : ca dex
|
|||
|
|
04e2 : ca dex
|
|||
|
|
04e3 : ca dex
|
|||
|
|
04e4 : ca dex ;-3
|
|||
|
|
04e5 : range_op ;test target with zero flag=0, z=1 if previous dex
|
|||
|
|
04e6 = range_adr = *+1 ;modifiable relative address
|
|||
|
|
04e5 : f03e beq *+64 ;+64 if called without modification
|
|||
|
|
04e7 : ca dex ;+0
|
|||
|
|
04e8 : ca dex
|
|||
|
|
04e9 : ca dex
|
|||
|
|
04ea : ca dex
|
|||
|
|
04eb : ca dex
|
|||
|
|
04ec : ca dex
|
|||
|
|
04ed : ca dex
|
|||
|
|
04ee : ca dex
|
|||
|
|
04ef : ca dex
|
|||
|
|
04f0 : ca dex
|
|||
|
|
04f1 : ca dex ;+10
|
|||
|
|
04f2 : ca dex
|
|||
|
|
04f3 : ca dex
|
|||
|
|
04f4 : ca dex
|
|||
|
|
04f5 : ca dex
|
|||
|
|
04f6 : ca dex
|
|||
|
|
04f7 : ca dex
|
|||
|
|
04f8 : ca dex
|
|||
|
|
04f9 : ca dex
|
|||
|
|
04fa : ca dex
|
|||
|
|
04fb : ca dex ;+20
|
|||
|
|
04fc : ca dex
|
|||
|
|
04fd : ca dex
|
|||
|
|
04fe : ca dex
|
|||
|
|
04ff : ca dex
|
|||
|
|
0500 : ca dex
|
|||
|
|
0501 : ca dex
|
|||
|
|
0502 : ca dex
|
|||
|
|
0503 : ca dex
|
|||
|
|
0504 : ca dex
|
|||
|
|
0505 : ca dex ;+30
|
|||
|
|
0506 : ca dex
|
|||
|
|
0507 : ca dex
|
|||
|
|
0508 : ca dex
|
|||
|
|
0509 : ca dex
|
|||
|
|
050a : ca dex
|
|||
|
|
050b : ca dex
|
|||
|
|
050c : ca dex
|
|||
|
|
050d : ca dex
|
|||
|
|
050e : ca dex
|
|||
|
|
050f : ca dex ;+40
|
|||
|
|
0510 : ca dex
|
|||
|
|
0511 : ca dex
|
|||
|
|
0512 : ca dex
|
|||
|
|
0513 : ca dex
|
|||
|
|
0514 : ca dex
|
|||
|
|
0515 : ca dex
|
|||
|
|
0516 : ca dex
|
|||
|
|
0517 : ca dex
|
|||
|
|
0518 : ca dex
|
|||
|
|
0519 : ca dex ;+50
|
|||
|
|
051a : ca dex
|
|||
|
|
051b : ca dex
|
|||
|
|
051c : ca dex
|
|||
|
|
051d : ca dex
|
|||
|
|
051e : ca dex
|
|||
|
|
051f : ca dex
|
|||
|
|
0520 : ca dex
|
|||
|
|
0521 : ca dex
|
|||
|
|
0522 : ca dex
|
|||
|
|
0523 : ca dex ;+60
|
|||
|
|
0524 : ca dex
|
|||
|
|
0525 : ca dex
|
|||
|
|
0526 : ca dex
|
|||
|
|
0527 : ca dex
|
|||
|
|
0528 : ca dex
|
|||
|
|
0529 : ca dex
|
|||
|
|
052a : ca dex
|
|||
|
|
052b : ca dex
|
|||
|
|
052c : ca dex
|
|||
|
|
052d : ca dex ;+70
|
|||
|
|
052e : ca dex
|
|||
|
|
052f : ca dex
|
|||
|
|
0530 : ca dex
|
|||
|
|
0531 : ca dex
|
|||
|
|
0532 : ca dex
|
|||
|
|
0533 : ca dex
|
|||
|
|
0534 : ca dex
|
|||
|
|
0535 : ca dex
|
|||
|
|
0536 : ca dex
|
|||
|
|
0537 : ca dex ;+80
|
|||
|
|
0538 : ca dex
|
|||
|
|
0539 : ca dex
|
|||
|
|
053a : ca dex
|
|||
|
|
053b : ca dex
|
|||
|
|
053c : ca dex
|
|||
|
|
053d : ca dex
|
|||
|
|
053e : ca dex
|
|||
|
|
053f : ca dex
|
|||
|
|
0540 : ca dex
|
|||
|
|
0541 : ca dex ;+90
|
|||
|
|
0542 : ca dex
|
|||
|
|
0543 : ca dex
|
|||
|
|
0544 : ca dex
|
|||
|
|
0545 : ca dex
|
|||
|
|
0546 : ca dex
|
|||
|
|
0547 : ca dex
|
|||
|
|
0548 : ca dex
|
|||
|
|
0549 : ca dex
|
|||
|
|
054a : ca dex
|
|||
|
|
054b : ca dex ;+100
|
|||
|
|
054c : ca dex
|
|||
|
|
054d : ca dex
|
|||
|
|
054e : ca dex
|
|||
|
|
054f : ca dex
|
|||
|
|
0550 : ca dex
|
|||
|
|
0551 : ca dex
|
|||
|
|
0552 : ca dex
|
|||
|
|
0553 : ca dex
|
|||
|
|
0554 : ca dex
|
|||
|
|
0555 : ca dex ;+110
|
|||
|
|
0556 : ca dex
|
|||
|
|
0557 : ca dex
|
|||
|
|
0558 : ca dex
|
|||
|
|
0559 : ca dex
|
|||
|
|
055a : ca dex
|
|||
|
|
055b : ca dex
|
|||
|
|
055c : ca dex
|
|||
|
|
055d : ca dex
|
|||
|
|
055e : ca dex
|
|||
|
|
055f : ca dex ;+120
|
|||
|
|
0560 : ca dex
|
|||
|
|
0561 : ca dex
|
|||
|
|
0562 : ca dex
|
|||
|
|
0563 : ca dex
|
|||
|
|
0564 : ca dex
|
|||
|
|
0565 : ca dex
|
|||
|
|
0566 : ea nop ;offset landing zone - forward branch too far
|
|||
|
|
0567 : ea nop
|
|||
|
|
0568 : ea nop
|
|||
|
|
0569 : ea nop
|
|||
|
|
056a : ea nop
|
|||
|
|
056b : f008 beq range_ok ;+127 - max forward
|
|||
|
|
trap ; bad range
|
|||
|
|
056d : 4c6d05 > jmp * ;failed anyway
|
|||
|
|
|
|||
|
|
0570 : ea nop ;offset landing zone - tolerate +/-5 offset to branch
|
|||
|
|
0571 : ea nop
|
|||
|
|