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Preparation for Debugger module
This commit is contained in:
tudnai
parent
900966da9c
commit
0717ac7fcb
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@ -625,6 +625,7 @@
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32440BA22480D5C0000F9DA1 /* LoRes.swift */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.swift; path = LoRes.swift; sourceTree = "<group>"; };
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324D15D224ADAC71008AAFB0 /* floppy.png */ = {isa = PBXFileReference; lastKnownFileType = image.png; path = floppy.png; sourceTree = "<group>"; };
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32544194264A6C1600B7E3ED /* DisplayView.swift */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.swift; path = DisplayView.swift; sourceTree = "<group>"; };
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325B75DF2909F95000B29605 /* 6502_debugger.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = 6502_debugger.c; sourceTree = "<group>"; };
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325DC40D24AC5ABC00EB8858 /* doc.on.doc.png */ = {isa = PBXFileReference; lastKnownFileType = image.png; path = doc.on.doc.png; sourceTree = "<group>"; };
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325DC40F24AC691B00EB8858 /* rgb_color.png */ = {isa = PBXFileReference; lastKnownFileType = image.png; path = rgb_color.png; sourceTree = "<group>"; };
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325DC41124AC692D00EB8858 /* rgb_mono.png */ = {isa = PBXFileReference; lastKnownFileType = image.png; path = rgb_mono.png; sourceTree = "<group>"; };
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@ -980,6 +981,7 @@
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32439F7522ECD8AD0077AAE0 /* instructions */,
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32439F8522ECD8AD0077AAE0 /* 6502.h */,
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32439F7422ECD8AD0077AAE0 /* 6502.c */,
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325B75DF2909F95000B29605 /* 6502_debugger.c */,
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320F2A8924CFFBE300671B35 /* 6502_std.h */,
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320F2A8A24D0001600671B35 /* 6502_und.h */,
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320F2A8B24D0828600671B35 /* 6502_C.h */,
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@ -220,7 +220,7 @@
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<autoresizingMask key="autoresizingMask" widthSizable="YES" heightSizable="YES"/>
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<subviews>
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<textView editable="NO" selectable="NO" drawsBackground="NO" importsGraphics="NO" richText="NO" horizontallyResizable="YES" verticallyResizable="YES" baseWritingDirection="leftToRight" findStyle="bar" allowsCharacterPickerTouchBarItem="NO" textCompletion="NO" id="Hwx-Gd-XW1" userLabel="Display" customClass="DisplayView" customModule="A2MacTests" customModuleProvider="target">
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<rect key="frame" x="0.0" y="93" width="288" height="1271"/>
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<rect key="frame" x="0.0" y="73" width="288" height="1271"/>
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<autoresizingMask key="autoresizingMask" flexibleMinX="YES" widthSizable="YES" flexibleMaxX="YES" flexibleMinY="YES" heightSizable="YES" flexibleMaxY="YES"/>
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<color key="textColor" name="textColor" catalog="System" colorSpace="catalog"/>
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<color key="backgroundColor" red="0.12549019610000001" green="0.12549019610000001" blue="0.12549019610000001" alpha="0.0" colorSpace="custom" customColorSpace="sRGB"/>
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@ -451,7 +451,7 @@ C20D: 4C C5 FE JMP $FEC5
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<autoresizingMask key="autoresizingMask" widthSizable="YES" heightSizable="YES"/>
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<subviews>
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<textView editable="NO" selectable="NO" drawsBackground="NO" importsGraphics="NO" richText="NO" horizontallyResizable="YES" verticallyResizable="YES" baseWritingDirection="leftToRight" findStyle="bar" allowsCharacterPickerTouchBarItem="NO" textCompletion="NO" id="BHr-Q4-rBI" userLabel="Display" customClass="DisplayView" customModule="A2MacTests" customModuleProvider="target">
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<rect key="frame" x="0.0" y="-65" width="349" height="181"/>
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<rect key="frame" x="0.0" y="-89" width="349" height="182"/>
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<autoresizingMask key="autoresizingMask" flexibleMinX="YES" widthSizable="YES" flexibleMaxX="YES" flexibleMinY="YES" heightSizable="YES" flexibleMaxY="YES"/>
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<color key="textColor" name="textColor" catalog="System" colorSpace="catalog"/>
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<color key="backgroundColor" name="windowBackgroundColor" catalog="System" colorSpace="catalog"/>
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@ -94,7 +94,7 @@ N V - B D I Z C
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m6502.Y, m6502.Y, bin(n: m6502.Y),
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m6502.SP,
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m6502.PC,
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m6502.N > 0, m6502.V > 0, m6502.res > 0, m6502.B > 0, m6502.D > 0, m6502.I > 0, m6502.Z > 0, m6502.C > 0
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m6502.N != 0, m6502.V != 0, m6502.res != 0, m6502.B != 0, m6502.D != 0, m6502.I != 0, m6502.Z != 0, m6502.C != 0
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)
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DispatchQueue.main.async {
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@ -105,7 +105,7 @@ N V - B D I Z C
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func DisplayStack() {
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var stack = ""
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for i : UInt16 in (0x100...0x1FF).reversed() {
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for i : UInt16 in (0x1F0...0x1FF).reversed() {
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stack += String(format:"%03X: %02X\n", i, getMEM(i))
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}
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@ -386,7 +386,7 @@ class ToolBarController: NSWindowController, NSWindowDelegate {
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@IBAction func Debugger(_ sender: Any) {
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if DebuggerToolBarController.current == nil {
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let debuggerStoryboard = NSStoryboard.init(name: NSStoryboard.Name("Debugger"), bundle: nil)
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let debuggerControler = debuggerStoryboard.instantiateController(withIdentifier: NSStoryboard.SceneIdentifier("debuggerWindowController")) as! NSWindowController
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debuggerStoryboard.instantiateController(withIdentifier: NSStoryboard.SceneIdentifier("debuggerWindowController"))
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// debuggerControler.showWindow(self)
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}
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@ -178,7 +178,7 @@ typedef struct {
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located in the same source file -- hence the include...
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**/
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INLINE flags_t getFlags() {
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INLINE flags_t getFlags(void) {
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flags_t f = {
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m6502.C != 0, // Carry Flag
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m6502.Z != 0, // Zero Flag
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@ -209,7 +209,7 @@ INLINE void setFlags( uint8_t byte ) {
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#include "6502_instructions.h"
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INLINE int m6502_Step() {
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INLINE int m6502_Step(void) {
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#ifdef DEBUG___
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@ -28,6 +28,13 @@
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#include "common.h"
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#include "woz.h"
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#ifdef DEBUGGER
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#define INSTR INLINE static
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#else
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#define INSTR INLINE static
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#endif
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#define CRYSTAL_MHZ 14.31818 // NTSC version (original)
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#define DEFAULT_MHZ_6502 (CRYSTAL_MHZ / 14) // 1.023 MHz
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370
src/cpu/6502_debugger.c
Normal file
370
src/cpu/6502_debugger.c
Normal file
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@ -0,0 +1,370 @@
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//
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// main.c
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// 6502
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//
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// Created by Tamas Rudnai on 7/14/19.
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// Copyright © 2019, 2020 Tamas Rudnai. All rights reserved.
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//
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// This file is part of Steve ][ -- The Apple ][ Emulator.
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//
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// Steve ][ is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// Steve ][ is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with Steve ][. If not, see <https://www.gnu.org/licenses/>.
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//
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// Documentations:
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//
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// http://nesdev.com/6502_cpu.txt
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// http://www.oxyron.de/html/opcodes02.html
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// https://macgui.com/kb/article/46
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// https://www.masswerk.at/6502/6502_instruction_set.html
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//
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#define CLK_WAIT
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#define DEBUGGER
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <string.h>
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#include <time.h>
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#include "6502.h"
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#include "speaker.h"
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void ViewController_spk_up_play(void);
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void ViewController_spk_dn_play(void);
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volatile cpuMode_s cpuMode = cpuMode_normal;
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volatile cpuState_s cpuState = cpuState_unknown;
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#include "../util/common.h"
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#define SOFTRESET_VECTOR 0x3F2
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#define NMI_VECTOR 0xFFFA
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#define RESET_VECTOR 0xFFFC
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#define IRQ_VECTOR 0xFFFE
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const unsigned long long int iterations = G;
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unsigned long long int inst_cnt = 0;
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unsigned int video_fps_divider = DEF_VIDEO_DIV;
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unsigned int fps = DEFAULT_FPS;
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const double default_MHz_6502 = DEFAULT_MHZ_6502; // default_crystal_MHz / 14; // 1.023; // 2 * M; // 4 * M; // 8 * M; // 16 * M; // 128 * M; // 256 * M; // 512 * M;
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const double iigs_MHz_6502 = 2.8;
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const double iicplus_MHz_6502 = 4;
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const double startup_MHz_6502 = 32;
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double MHz_6502 = default_MHz_6502;
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unsigned int clk_6502_per_frm = FRAME_INIT( default_MHz_6502 );
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unsigned int clk_6502_per_frm_set = FRAME_INIT( default_MHz_6502 );
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unsigned int clk_6502_per_frm_max_sound = 4 * FRAME_INIT( default_MHz_6502 );
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unsigned int clk_6502_per_frm_max = 0;
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unsigned long long tick_per_sec = G;
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unsigned long long tick_6502_per_sec = 0;
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extern m6502_t m6502;
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const int ecoSpindown = 25; // initial value of ECO Spingdown Counter
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#include "../util/disassembler.h"
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#include "../dev/mem/mmio.h"
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typedef struct {
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uint8_t L;
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uint8_t H;
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} bytes_t;
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/**
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Instruction Implementations
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!!!! `his has to be here!!!
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This idea is that "INLINE" would work only if it is
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located in the same source file -- hence the include...
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**/
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#include "6502_instructions.h"
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INLINE int m6502_Step(void) {
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#ifdef DEBUG___
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switch ( m6502.PC ) {
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case 0x1E60:
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printf("Wavy Navy...\n");
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break;
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default:
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break;
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}
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switch ( m6502.PC ) {
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case 0xC600:
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printf("DISK...\n");
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break;
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case 0xC62F:
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printf("DISK IO...\n");
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break;
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default:
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break;
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}
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switch ( m6502.PC ) {
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case 0xE000:
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dbgPrintf("START...\n");
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break;
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case 0xF168:
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dbgPrintf("START...\n");
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break;
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case 0xF16B:
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dbgPrintf("START...\n");
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break;
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case 0xF195: // RAM size init
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dbgPrintf("START...\n");
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break;
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default:
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break;
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}
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#endif
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disNewInstruction();
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switch ( fetch() ) {
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#include "6502_std.h" // Standard 6502 instructions
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//#include "6502_und.h" // Undocumented 6502 instructions
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#include "6502_C.h" // Extended 65C02 instructions
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default:
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dbgPrintf("%04X: Unimplemented Instruction 0x%02X\n", m6502.PC -1, memread( m6502.PC -1 ));
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return 2;
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} // switch fetch16
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return 2;
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}
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unsigned long long ee = 0;
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unsigned long long dd = 0;
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// nanosec does not work very well for some reason
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struct timespec tim = { 0, 400L };
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double mips = 0;
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double mhz = 0;
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unsigned long long epoch = 0;
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void m6502_Run() {
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// init time
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//#ifdef CLK_WAIT
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// unsigned long long elpased = (unsigned long long)-1LL;
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//#endif
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m6502.clktime += m6502.clkfrm;
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m6502.clkfrm = 0;
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m6502.lastIO = 0;
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if( diskAccelerator_count ) {
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if( --diskAccelerator_count <= 0 ) {
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// make sure we only adjust clock once to get back to normal
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diskAccelerator_count = 0;
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clk_6502_per_frm = clk_6502_per_frm_set;
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}
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}
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#ifdef SPEEDTEST
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for ( inst_cnt = 0; inst_cnt < iterations ; inst_cnt++ )
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#elif defined( CLK_WAIT )
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// we clear the clkfrm from ViewController Update()
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// we will also use this to pause the simulation if not finished by the end of the frame
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for ( clk_6502_per_frm_max = clk_6502_per_frm; m6502.clkfrm < clk_6502_per_frm_max ; m6502.clkfrm += m6502_Step() )
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#else
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// this is for max speed only -- WARNING! It works only if simulation runs in a completely different thread from the Update()
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for ( ; ; )
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#endif
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{
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// TODO: clkfrm is already increamented!!!
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printDisassembly(outdev);
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#ifdef INTERRUPT_CHECK_PER_STEP
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if ( m6502.IF ) {
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switch (m6502.interrupt) {
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case HALT:
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// CPU is haletd, nothing to do here...
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return;
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case IRQ:
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interrupt_IRQ();
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break;
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case NMI:
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interrupt_NMI();
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break;
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case HARDRESET:
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hardReset();
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break;
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case SOFTRESET:
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softReset();
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break;
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default:
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break;
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}
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m6502.IF = 0;
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}
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#endif // INTERRUPT_CHECK_PER_STEP
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}
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if ( cpuMode == cpuMode_eco ) {
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// check if this is a busy keyboard poll (aka waiting for user input)
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if ( m6502.clkfrm - m6502.lastIO < 16 ) {
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if (m6502.ecoSpindown) {
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m6502.ecoSpindown--;
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}
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else {
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cpuState = cpuState_halting;
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}
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}
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}
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// play the entire sound buffer for this frame
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spkr_update();
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// this will take care of turning off disk motor sound when time is up
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spkr_update_disk_sfx();
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}
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void read_rom( const char * bundlePath, const char * filename, uint8_t * rom, const uint16_t addr, const uint16_t size ) {
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char fullPath[256];
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strcpy( fullPath, bundlePath );
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strcat( fullPath, "/");
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strcat( fullPath, filename );
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FILE * f = fopen(fullPath, "rb");
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if (f == NULL) {
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perror("Failed to read ROM image: ");
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return;
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}
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fseek(f, 0L, SEEK_END);
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uint16_t flen = ftell(f);
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fseek(f, 0L, SEEK_SET);
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if ( size && (size > flen) ) {
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printf("ROM image is too small (size:0x%04X flen:0x%04X)\n", size, flen);
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return;
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}
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fread( rom + addr, 1, size, f);
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fclose(f);
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||||
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||||
}
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||||
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size_t getFileSize ( const char * fullPath ) {
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FILE * f = fopen(fullPath, "rb");
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if (f == NULL) {
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perror("Failed to get filesize for ROM image: ");
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return 0;
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}
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fseek(f, 0L, SEEK_END);
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size_t flen = ftell(f);
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fseek(f, 0L, SEEK_SET);
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fclose(f);
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return flen;
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}
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void rom_loadFile( const char * bundlePath, const char * filename ) {
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char fullPath[256];
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strcpy( fullPath, bundlePath );
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strcat( fullPath, "/");
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strcat( fullPath, filename );
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printf("Loading ROM: %s\n", filename);
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size_t flen = getFileSize(fullPath);
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if ( flen == 0 ) {
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return; // there was an error
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}
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else if ( flen == 32 * KB ) {
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read_rom( bundlePath, filename, INT_64K_ROM + 0x8000, 0, 32 * KB);
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memcpy(Apple2_64K_MEM + 0xC000, INT_64K_ROM + 0xC000, 16 * KB); // activate the upper ROM
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}
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else if ( flen == 16 * KB ) {
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read_rom( bundlePath, filename, INT_64K_ROM + 0xC000, 0, 16 * KB);
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memcpy(Apple2_64K_MEM + 0xC000, INT_64K_ROM + 0xC000, 16 * KB);
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}
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||||
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||||
else if ( flen == 12 * KB ) {
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read_rom( bundlePath, filename, INT_64K_ROM + 0xD000, 0x1000, 12 * KB);
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memcpy(Apple2_64K_MEM + 0xD000, INT_64K_ROM + 0xD000, 12 * KB);
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}
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||||
|
||||
// make a copy of the perfieral ROM area -- so it will fall back to this if no card inserted
|
||||
memcpy(EXP_64K_ROM + 0xC100, INT_64K_ROM + 0xC100, 0x0F00);
|
||||
}
|
||||
|
||||
|
||||
void openLog() {
|
||||
#ifdef DISASSEMBLER
|
||||
outdev = fopen("/Users/trudnai/Library/Containers/com.trudnai.steveii/Data/disassembly_new.log", "w+");
|
||||
#endif
|
||||
// for DEBUG ONLY!!! -- use stdout if could not create log file
|
||||
// if (outdev == NULL) {
|
||||
// outdev = stdout;
|
||||
// }
|
||||
}
|
||||
|
||||
|
||||
void closeLog() {
|
||||
if ( ( outdev ) && ( outdev != stdout ) && ( outdev != stderr ) ) {
|
||||
fclose(outdev);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -45,7 +45,7 @@
|
|||
(indirect),Y ADC (oper),Y 71 2 5*
|
||||
**/
|
||||
#ifndef DEBUGGER
|
||||
INLINE void _ADC( uint8_t src ) {
|
||||
INSTR void _ADC( uint8_t src ) {
|
||||
uint16_t tmp;
|
||||
|
||||
// V = C7 != C6
|
||||
|
|
@ -81,7 +81,7 @@ INLINE void _ADC( uint8_t src ) {
|
|||
|
||||
}
|
||||
#endif
|
||||
INLINE void ADC( uint8_t src ) {
|
||||
INSTR void ADC( uint8_t src ) {
|
||||
dbgPrintf("ADC(%02X) ", src);
|
||||
disPrintf(disassembly.inst, "ADC");
|
||||
|
||||
|
|
@ -108,7 +108,7 @@ INLINE void ADC( uint8_t src ) {
|
|||
(indirect),Y SBC (oper),Y F1 2 5*
|
||||
**/
|
||||
#ifndef DEBUGGER
|
||||
INLINE void _SBC( uint8_t src ) {
|
||||
INSTR void _SBC( uint8_t src ) {
|
||||
uint16_t tmp;
|
||||
|
||||
if( m6502.D ) {
|
||||
|
|
@ -134,7 +134,7 @@ INLINE void _SBC( uint8_t src ) {
|
|||
set_flags_NZ( m6502.A = tmp );
|
||||
}
|
||||
#endif
|
||||
INLINE void SBC( uint8_t src ) {
|
||||
INSTR void SBC( uint8_t src ) {
|
||||
dbgPrintf("SBC(%02X) ", src);
|
||||
disPrintf(disassembly.inst, "SBC");
|
||||
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
#ifndef __6502_INSTR_BRANCH_H__
|
||||
#define __6502_INSTR_BRANCH_H__
|
||||
|
||||
INLINE void BRA( int8_t reladdr ) {
|
||||
INSTR void BRA( int8_t reladdr ) {
|
||||
uint8_t pg = m6502.PC >> 8;
|
||||
m6502.PC += reladdr;
|
||||
m6502.clkfrm += m6502.PC >> 8 == pg ? 1 : 2;
|
||||
|
|
@ -47,7 +47,7 @@ INLINE void BRA( int8_t reladdr ) {
|
|||
--------------------------------------------
|
||||
relative BCC oper 90 2 2**
|
||||
**/
|
||||
INLINE void BCC( int8_t reladdr ) {
|
||||
INSTR void BCC( int8_t reladdr ) {
|
||||
dbgPrintf("BCC ");
|
||||
disPrintf(disassembly.inst, "BCC");
|
||||
|
||||
|
|
@ -71,7 +71,7 @@ INLINE void BCC( int8_t reladdr ) {
|
|||
--------------------------------------------
|
||||
relative BCS oper B0 2 2**
|
||||
**/
|
||||
INLINE void BCS( int8_t reladdr ) {
|
||||
INSTR void BCS( int8_t reladdr ) {
|
||||
dbgPrintf("BCS ");
|
||||
disPrintf(disassembly.inst, "BCS");
|
||||
|
||||
|
|
@ -95,7 +95,7 @@ INLINE void BCS( int8_t reladdr ) {
|
|||
--------------------------------------------
|
||||
relative BNE oper D0 2 2**
|
||||
**/
|
||||
INLINE void BNE( int8_t reladdr ) {
|
||||
INSTR void BNE( int8_t reladdr ) {
|
||||
dbgPrintf("BNE ");
|
||||
disPrintf(disassembly.inst, "BNE");
|
||||
|
||||
|
|
@ -119,7 +119,7 @@ INLINE void BNE( int8_t reladdr ) {
|
|||
--------------------------------------------
|
||||
relative BEQ oper F0 2 2**
|
||||
**/
|
||||
INLINE void BEQ( int8_t reladdr ) {
|
||||
INSTR void BEQ( int8_t reladdr ) {
|
||||
dbgPrintf("BEQ ");
|
||||
disPrintf(disassembly.inst, "BEQ");
|
||||
|
||||
|
|
@ -143,7 +143,7 @@ INLINE void BEQ( int8_t reladdr ) {
|
|||
--------------------------------------------
|
||||
relative BPL oper 10 2 2**
|
||||
**/
|
||||
INLINE void BPL( int8_t reladdr ) {
|
||||
INSTR void BPL( int8_t reladdr ) {
|
||||
dbgPrintf("BPL ");
|
||||
disPrintf(disassembly.inst, "BPL");
|
||||
|
||||
|
|
@ -167,7 +167,7 @@ INLINE void BPL( int8_t reladdr ) {
|
|||
--------------------------------------------
|
||||
relative BMI oper 30 2 2**
|
||||
**/
|
||||
INLINE void BMI( int8_t reladdr ) {
|
||||
INSTR void BMI( int8_t reladdr ) {
|
||||
dbgPrintf("BMI ");
|
||||
disPrintf(disassembly.inst, "BMI");
|
||||
|
||||
|
|
@ -191,7 +191,7 @@ INLINE void BMI( int8_t reladdr ) {
|
|||
--------------------------------------------
|
||||
relative BVC oper 50 2 2**
|
||||
**/
|
||||
INLINE void BVC( int8_t reladdr ) {
|
||||
INSTR void BVC( int8_t reladdr ) {
|
||||
dbgPrintf("BVC ");
|
||||
disPrintf(disassembly.inst, "BVC");
|
||||
|
||||
|
|
@ -215,7 +215,7 @@ INLINE void BVC( int8_t reladdr ) {
|
|||
--------------------------------------------
|
||||
relative BVC oper 70 2 2**
|
||||
**/
|
||||
INLINE void BVS( int8_t reladdr ) {
|
||||
INSTR void BVS( int8_t reladdr ) {
|
||||
dbgPrintf("BVS ");
|
||||
disPrintf(disassembly.inst, "BVS");
|
||||
|
||||
|
|
@ -271,7 +271,7 @@ INLINE void BVS( int8_t reladdr ) {
|
|||
|
||||
**/
|
||||
#ifndef DEBUGGER
|
||||
#define BBR(n) INLINE void BBR##n( uint8_t src, int8_t reladdr ) { \
|
||||
#define BBR(n) INSTR void BBR##n( uint8_t src, int8_t reladdr ) { \
|
||||
dbgPrintf("BBR"#n" "); \
|
||||
disPrintf(disassembly.inst, "BBR"#n); \
|
||||
if ( ! (src & (1 << n) ) ) { \
|
||||
|
|
@ -279,7 +279,7 @@ disPrintf(disassembly.inst, "BBR"#n); \
|
|||
} \
|
||||
}
|
||||
#else
|
||||
#define BBR(n) INLINE void BBR##n( uint8_t src, int8_t reladdr ) { \
|
||||
#define BBR(n) INSTR void BBR##n( uint8_t src, int8_t reladdr ) { \
|
||||
dbgPrintf("BBR"#n" "); \
|
||||
disPrintf(disassembly.inst, "BBR"#n); \
|
||||
}
|
||||
|
|
@ -296,7 +296,7 @@ disPrintf(disassembly.inst, "BBR"#n); \
|
|||
|
||||
|
||||
#ifndef DEBUGGER
|
||||
#define BBS(n) INLINE void BBS##n( uint8_t src, int8_t reladdr ) { \
|
||||
#define BBS(n) INSTR void BBS##n( uint8_t src, int8_t reladdr ) { \
|
||||
dbgPrintf("BBS"#n" "); \
|
||||
disPrintf(disassembly.inst, "BBS"#n); \
|
||||
if ( (src & (1 << n) ) ) { \
|
||||
|
|
@ -304,7 +304,7 @@ disPrintf(disassembly.inst, "BBS"#n); \
|
|||
} \
|
||||
}
|
||||
#else
|
||||
#define BBS(n) INLINE void BBS##n( uint8_t src, int8_t reladdr ) { \
|
||||
#define BBS(n) INSTR void BBS##n( uint8_t src, int8_t reladdr ) { \
|
||||
dbgPrintf("BBS"#n" "); \
|
||||
disPrintf(disassembly.inst, "BBS"#n); \
|
||||
}
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@
|
|||
absolute JMP oper 4C 3 3
|
||||
indirect JMP (oper) 6C 3 5
|
||||
**/
|
||||
INLINE void JMP( uint16_t addr ) {
|
||||
INSTR void JMP( uint16_t addr ) {
|
||||
dbgPrintf("JMP %04X ", addr);
|
||||
disPrintf(disassembly.inst, "JMP");
|
||||
|
||||
|
|
@ -84,7 +84,7 @@ void JUMP( uint16_t addr ) {
|
|||
--------------------------------------------
|
||||
absolute JSR oper 20 3 6
|
||||
**/
|
||||
INLINE void JSR( uint16_t addr ) {
|
||||
INSTR void JSR( uint16_t addr ) {
|
||||
dbgPrintf("JSR ");
|
||||
disPrintf(disassembly.inst, "JSR");
|
||||
|
||||
|
|
@ -104,7 +104,7 @@ INLINE void JSR( uint16_t addr ) {
|
|||
--------------------------------------------
|
||||
implied RTS 60 1 6
|
||||
**/
|
||||
INLINE void RTS() {
|
||||
INSTR void RTS(void) {
|
||||
dbgPrintf("RTS ");
|
||||
disPrintf(disassembly.inst, "RTS");
|
||||
|
||||
|
|
@ -129,7 +129,7 @@ INLINE void RTS() {
|
|||
--------------------------------------------
|
||||
implied RTI 40 1 6
|
||||
**/
|
||||
INLINE void RTI() {
|
||||
INSTR void RTI(void) {
|
||||
dbgPrintf("RTI ");
|
||||
disPrintf(disassembly.inst, "RTI");
|
||||
|
||||
|
|
|
|||
|
|
@ -39,7 +39,7 @@
|
|||
absolute BIT oper 2C 3 4
|
||||
|
||||
**/
|
||||
INLINE void BIT( uint8_t src ) {
|
||||
INSTR void BIT( uint8_t src ) {
|
||||
dbgPrintf("BIT(%02X) ", src);
|
||||
disPrintf(disassembly.inst, "BIT");
|
||||
|
||||
|
|
@ -71,7 +71,7 @@ INLINE void BIT( uint8_t src ) {
|
|||
1C 3 6 abs ......Z. TRB $3456
|
||||
|
||||
**/
|
||||
INLINE void TRB( uint16_t addr ) {
|
||||
INSTR void TRB( uint16_t addr ) {
|
||||
dbgPrintf("TRB(%02X) ", src);
|
||||
disPrintf(disassembly.inst, "TRB");
|
||||
|
||||
|
|
@ -101,7 +101,7 @@ INLINE void TRB( uint16_t addr ) {
|
|||
0C 3 6 abs ......Z. TSB $3456
|
||||
|
||||
**/
|
||||
INLINE void TSB( uint16_t addr ) {
|
||||
INSTR void TSB( uint16_t addr ) {
|
||||
dbgPrintf("TSB(%02X) ", src);
|
||||
disPrintf(disassembly.inst, "TSB");
|
||||
|
||||
|
|
@ -129,11 +129,11 @@ INLINE void TSB( uint16_t addr ) {
|
|||
(indirect),Y CMP (oper),Y D1 2 5*
|
||||
**/
|
||||
#ifndef DEBUGGER
|
||||
INLINE void _CMP( uint8_t src ) {
|
||||
INSTR void _CMP( uint8_t src ) {
|
||||
set_flags_NZC( (int16_t)m6502.A - src );
|
||||
}
|
||||
#endif
|
||||
INLINE void CMP( uint8_t src ) {
|
||||
INSTR void CMP( uint8_t src ) {
|
||||
dbgPrintf("CMP(%02X) ", src);
|
||||
disPrintf(disassembly.inst, "CMP");
|
||||
|
||||
|
|
@ -154,7 +154,7 @@ INLINE void CMP( uint8_t src ) {
|
|||
zeropage CPX oper E4 2 3
|
||||
absolute CPX oper EC 3 4
|
||||
**/
|
||||
INLINE void CPX( uint8_t src ) {
|
||||
INSTR void CPX( uint8_t src ) {
|
||||
dbgPrintf("CPX(%02X) ", src);
|
||||
disPrintf(disassembly.inst, "CPX");
|
||||
|
||||
|
|
@ -175,7 +175,7 @@ INLINE void CPX( uint8_t src ) {
|
|||
zeropage CPY oper C4 2 3
|
||||
absolute CPY oper CC 3 4
|
||||
**/
|
||||
INLINE void CPY( uint8_t src ) {
|
||||
INSTR void CPY( uint8_t src ) {
|
||||
dbgPrintf("CPY(%02X) ", src);
|
||||
disPrintf(disassembly.inst, "CPY");
|
||||
|
||||
|
|
|
|||
|
|
@ -39,11 +39,11 @@
|
|||
absolute,X INC oper,X FE 3 7
|
||||
**/
|
||||
#ifndef DEBUGGER
|
||||
INLINE void _INC( uint16_t addr ) {
|
||||
INSTR void _INC( uint16_t addr ) {
|
||||
set_flags_NZ( ++(WRLOMEM[addr]) );
|
||||
}
|
||||
#endif
|
||||
INLINE void INC( uint16_t addr ) {
|
||||
INSTR void INC( uint16_t addr ) {
|
||||
disPrintf(disassembly.inst, "INC");
|
||||
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -61,7 +61,7 @@ INLINE void INC( uint16_t addr ) {
|
|||
--------------------------------------------
|
||||
implied INX E8 1 2
|
||||
**/
|
||||
INLINE void INX() {
|
||||
INSTR void INX(void) {
|
||||
dbgPrintf("INX %02X -> ", m6502.X);
|
||||
disPrintf(disassembly.inst, "INX");
|
||||
|
||||
|
|
@ -81,7 +81,7 @@ INLINE void INX() {
|
|||
--------------------------------------------
|
||||
implied INY C8 1 2
|
||||
**/
|
||||
INLINE void INY() {
|
||||
INSTR void INY(void) {
|
||||
dbgPrintf("INY %02X -> ", m6502.Y);
|
||||
disPrintf(disassembly.inst, "INY");
|
||||
|
||||
|
|
@ -101,7 +101,7 @@ INLINE void INY() {
|
|||
--------------------------------------------
|
||||
implied INA C8 1 2
|
||||
**/
|
||||
INLINE void INA() {
|
||||
INSTR void INA(void) {
|
||||
dbgPrintf("INA %02X -> ", m6502.A);
|
||||
disPrintf(disassembly.inst, "INA");
|
||||
|
||||
|
|
@ -125,11 +125,11 @@ INLINE void INA() {
|
|||
absolute,X DEC oper,X DE 3 7
|
||||
**/
|
||||
#ifndef DEBUGGER
|
||||
INLINE void _DEC( uint16_t addr ) {
|
||||
INSTR void _DEC( uint16_t addr ) {
|
||||
set_flags_NZ( --(WRLOMEM[addr]) );
|
||||
}
|
||||
#endif
|
||||
INLINE void DEC( uint16_t addr ) {
|
||||
INSTR void DEC( uint16_t addr ) {
|
||||
disPrintf(disassembly.inst, "DEC");
|
||||
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -147,7 +147,7 @@ INLINE void DEC( uint16_t addr ) {
|
|||
--------------------------------------------
|
||||
implied DEC CA 1 2
|
||||
**/
|
||||
INLINE void DEX() {
|
||||
INSTR void DEX(void) {
|
||||
dbgPrintf("DEX %02X -> ", m6502.X);
|
||||
disPrintf(disassembly.inst, "DEX");
|
||||
|
||||
|
|
@ -167,7 +167,7 @@ INLINE void DEX() {
|
|||
--------------------------------------------
|
||||
implied DEC 88 1 2
|
||||
**/
|
||||
INLINE void DEY() {
|
||||
INSTR void DEY(void) {
|
||||
dbgPrintf("DEY %02X -> ", m6502.Y);
|
||||
disPrintf(disassembly.inst, "DEY");
|
||||
|
||||
|
|
@ -187,7 +187,7 @@ addressing assembler opc bytes cyles
|
|||
--------------------------------------------
|
||||
implied DEC 88 1 2
|
||||
**/
|
||||
INLINE void DEA() {
|
||||
INSTR void DEA(void) {
|
||||
dbgPrintf("DEA %02X -> ", m6502.A);
|
||||
disPrintf(disassembly.inst, "DEA");
|
||||
|
||||
|
|
|
|||
|
|
@ -45,7 +45,7 @@
|
|||
(indirect,X) LDA (oper,X) A1 2 6
|
||||
(indirect),Y LDA (oper),Y B1 2 5*
|
||||
**/
|
||||
INLINE void LDA( uint8_t src ) {
|
||||
INSTR void LDA( uint8_t src ) {
|
||||
dbgPrintf("LDA(%02X) ", src);
|
||||
disPrintf(disassembly.inst, "LDA");
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -67,7 +67,7 @@ INLINE void LDA( uint8_t src ) {
|
|||
absolute LDX oper AE 3 4
|
||||
absolute,Y LDX oper,Y BE 3 4*
|
||||
**/
|
||||
INLINE void LDX( uint8_t src ) {
|
||||
INSTR void LDX( uint8_t src ) {
|
||||
dbgPrintf("LDX(%02X) ", src);
|
||||
disPrintf(disassembly.inst, "LDX");
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -89,7 +89,7 @@ INLINE void LDX( uint8_t src ) {
|
|||
absolute LDY oper AC 3 4
|
||||
absolute,X LDY oper,X BC 3 4*
|
||||
**/
|
||||
INLINE void LDY( uint8_t src ) {
|
||||
INSTR static void LDY( uint8_t src ) {
|
||||
dbgPrintf("LDY(%02X) ", src);
|
||||
disPrintf(disassembly.inst, "LDY");
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -111,7 +111,7 @@ char * charConv =
|
|||
|
||||
(not a real instruction, only a helper function)
|
||||
**/
|
||||
INLINE void STR( uint16_t addr, uint8_t src ) {
|
||||
INSTR void STR( uint16_t addr, uint8_t src ) {
|
||||
dbgPrintf("STR [%04X], %02X ", addr, src );
|
||||
#ifndef DEBUGGER
|
||||
memwrite(addr, src);
|
||||
|
|
@ -134,7 +134,7 @@ INLINE void STR( uint16_t addr, uint8_t src ) {
|
|||
(indirect,X) STA (oper,X) 81 2 6
|
||||
(indirect),Y STA (oper),Y 91 2 6
|
||||
**/
|
||||
INLINE void STA( uint16_t addr ) {
|
||||
INSTR void STA( uint16_t addr ) {
|
||||
dbgPrintf("STA ");
|
||||
disPrintf(disassembly.inst, "STA");
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -154,7 +154,7 @@ INLINE void STA( uint16_t addr ) {
|
|||
zeropage,Y STX oper,Y 96 2 4
|
||||
absolute STX oper 8E 3 4
|
||||
**/
|
||||
INLINE void STX( uint16_t addr ) {
|
||||
INSTR void STX( uint16_t addr ) {
|
||||
dbgPrintf("STX ");
|
||||
disPrintf(disassembly.inst, "STX");
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -174,7 +174,7 @@ INLINE void STX( uint16_t addr ) {
|
|||
zeropage,X STY oper,X 94 2 4
|
||||
absolute STY oper 8C 3 4
|
||||
**/
|
||||
INLINE void STY( uint16_t addr ) {
|
||||
INSTR void STY( uint16_t addr ) {
|
||||
dbgPrintf("STY ");
|
||||
disPrintf(disassembly.inst, "STY");
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -195,7 +195,7 @@ INLINE void STY( uint16_t addr ) {
|
|||
9C 3 4 abs ........ STZ $3456
|
||||
9E 3 5 abs,X ........ STZ $3456,X
|
||||
**/
|
||||
INLINE void STZ( uint16_t addr ) {
|
||||
INSTR void STZ( uint16_t addr ) {
|
||||
dbgPrintf("STZ ");
|
||||
disPrintf(disassembly.inst, "STZ");
|
||||
#ifndef DEBUGGER
|
||||
|
|
|
|||
|
|
@ -43,11 +43,11 @@
|
|||
(indirect),Y ORA (oper),Y 11 2 5*
|
||||
**/
|
||||
#ifndef DEBUGGER
|
||||
INLINE void _ORA( uint8_t src ) {
|
||||
INSTR void _ORA( uint8_t src ) {
|
||||
set_flags_NZ( m6502.A |= src );
|
||||
}
|
||||
#endif
|
||||
INLINE void ORA( uint8_t src ) {
|
||||
INSTR void ORA( uint8_t src ) {
|
||||
dbgPrintf("ORA(%02X) ", src);
|
||||
disPrintf(disassembly.inst, "ORA");
|
||||
|
||||
|
|
@ -74,11 +74,11 @@ INLINE void ORA( uint8_t src ) {
|
|||
(indirect),Y AND (oper),Y 31 2 5*
|
||||
**/
|
||||
#ifndef DEBUGGER
|
||||
INLINE void _AND( uint8_t src ) {
|
||||
INSTR void _AND( uint8_t src ) {
|
||||
set_flags_NZ( m6502.A &= src );
|
||||
}
|
||||
#endif
|
||||
INLINE void AND( uint8_t src ) {
|
||||
INSTR void AND( uint8_t src ) {
|
||||
dbgPrintf("AND(%02X) ", src);
|
||||
disPrintf(disassembly.inst, "AND");
|
||||
|
||||
|
|
@ -104,7 +104,7 @@ INLINE void AND( uint8_t src ) {
|
|||
(indirect,X) EOR (oper,X) 41 2 6
|
||||
(indirect),Y EOR (oper),Y 51 2 5*
|
||||
**/
|
||||
INLINE void EOR( uint8_t src ) {
|
||||
INSTR void EOR( uint8_t src ) {
|
||||
dbgPrintf("EOR(%02X) ", src);
|
||||
disPrintf(disassembly.inst, "EOR");
|
||||
|
||||
|
|
|
|||
|
|
@ -35,7 +35,7 @@
|
|||
--------------------------------------------
|
||||
implied BRK 00 1 7
|
||||
**/
|
||||
INLINE int BRK() {
|
||||
INSTR int BRK(void) {
|
||||
dbgPrintf("BRK ");
|
||||
disPrintf(disassembly.inst, "BRK");
|
||||
|
||||
|
|
@ -53,7 +53,7 @@ INLINE int BRK() {
|
|||
/**
|
||||
HLT / JAM / KIL Halts (Hangs / Jams / Kills) the CPU - Well, it hangs it untill the next power cycle
|
||||
**/
|
||||
INLINE void HLT() {
|
||||
INSTR void HLT(void) {
|
||||
disPrintf(disassembly.inst, "HLT");
|
||||
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -71,7 +71,7 @@ INLINE void HLT() {
|
|||
--------------------------------------------
|
||||
implied NOP EA 1 2
|
||||
**/
|
||||
INLINE void NOP() {
|
||||
INSTR void NOP(void) {
|
||||
dbgPrintf("NOP ");
|
||||
disPrintf(disassembly.inst, "NOP");
|
||||
}
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@
|
|||
--------------------------------------------
|
||||
implied CLC 18 1 2
|
||||
**/
|
||||
INLINE void CLC() {
|
||||
INSTR void CLC(void) {
|
||||
dbgPrintf("CLC ");
|
||||
disPrintf(disassembly.inst, "CLC");
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -52,7 +52,7 @@ INLINE void CLC() {
|
|||
--------------------------------------------
|
||||
implied CLD D8 1 2
|
||||
**/
|
||||
INLINE void CLD() {
|
||||
INSTR void CLD(void) {
|
||||
dbgPrintf("CLD ");
|
||||
disPrintf(disassembly.inst, "CLD");
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -70,7 +70,7 @@ INLINE void CLD() {
|
|||
--------------------------------------------
|
||||
implied CLI 58 1 2
|
||||
**/
|
||||
INLINE void CLI() {
|
||||
INSTR void CLI(void) {
|
||||
dbgPrintf("CLI ");
|
||||
disPrintf(disassembly.inst, "CLI");
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -88,7 +88,7 @@ INLINE void CLI() {
|
|||
--------------------------------------------
|
||||
implied CLV B8 1 2
|
||||
**/
|
||||
INLINE void CLV() {
|
||||
INSTR void CLV(void) {
|
||||
dbgPrintf("CLV ");
|
||||
disPrintf(disassembly.inst, "CLV");
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -106,7 +106,7 @@ INLINE void CLV() {
|
|||
--------------------------------------------
|
||||
implied SEC 38 1 2
|
||||
**/
|
||||
INLINE void SEC() {
|
||||
INSTR void SEC(void) {
|
||||
dbgPrintf("SEC ");
|
||||
disPrintf(disassembly.inst, "SEC");
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -124,7 +124,7 @@ INLINE void SEC() {
|
|||
--------------------------------------------
|
||||
implied SED F8 1 2
|
||||
**/
|
||||
INLINE void SED() {
|
||||
INSTR void SED(void) {
|
||||
dbgPrintf("SED ");
|
||||
disPrintf(disassembly.inst, "SED");
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -142,7 +142,7 @@ INLINE void SED() {
|
|||
--------------------------------------------
|
||||
implied SEI 78 1 2
|
||||
**/
|
||||
INLINE void SEI() {
|
||||
INSTR void SEI(void) {
|
||||
dbgPrintf("SEI ");
|
||||
disPrintf(disassembly.inst, "SEI");
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -190,13 +190,13 @@ INLINE void SEI() {
|
|||
F7 2 5 zp ........ SMB7 $12
|
||||
**/
|
||||
#ifndef DEBUGGER
|
||||
#define RMB(n) INLINE void RMB##n( uint8_t zpg ) { \
|
||||
#define RMB(n) INSTR void RMB##n( uint8_t zpg ) { \
|
||||
dbgPrintf("RMB"#n" "); \
|
||||
disPrintf(disassembly.inst, "RMB"#n); \
|
||||
WRLOMEM[zpg] &= ~(1 << n); \
|
||||
}
|
||||
#else
|
||||
#define RMB(n) INLINE void RMB##n( uint8_t zpg ) { \
|
||||
#define RMB(n) INSTR void RMB##n( uint8_t zpg ) { \
|
||||
dbgPrintf("RMB"#n" "); \
|
||||
disPrintf(disassembly.inst, "RMB"#n); \
|
||||
}
|
||||
|
|
@ -213,13 +213,13 @@ INLINE void SEI() {
|
|||
|
||||
|
||||
#ifndef DEBUGGER
|
||||
#define SMB(n) INLINE void SMB##n( uint8_t zpg ) { \
|
||||
#define SMB(n) INSTR void SMB##n( uint8_t zpg ) { \
|
||||
dbgPrintf("SMB"#n" "); \
|
||||
disPrintf(disassembly.inst, "SMB"#n); \
|
||||
WRLOMEM[zpg] |= (1 << n); \
|
||||
}
|
||||
#else
|
||||
#define SMB(n) INLINE void SMB##n( uint8_t zpg ) { \
|
||||
#define SMB(n) INSTR void SMB##n( uint8_t zpg ) { \
|
||||
dbgPrintf("SMB"#n" "); \
|
||||
disPrintf(disassembly.inst, "SMB"#n); \
|
||||
}
|
||||
|
|
|
|||
|
|
@ -40,12 +40,12 @@
|
|||
absolute,X ASL oper,X 1E 3 7
|
||||
**/
|
||||
#ifndef DEBUGGER
|
||||
INLINE void _ASL( uint16_t addr ) {
|
||||
INSTR void _ASL( uint16_t addr ) {
|
||||
m6502.C = memread(addr) & 0x80;
|
||||
set_flags_NZ( WRLOMEM[addr] <<= 1 );
|
||||
}
|
||||
#endif
|
||||
INLINE void ASL( uint16_t addr ) {
|
||||
INSTR void ASL( uint16_t addr ) {
|
||||
dbgPrintf("ASL ");
|
||||
disPrintf(disassembly.inst, "ASL");
|
||||
|
||||
|
|
@ -53,7 +53,7 @@ INLINE void ASL( uint16_t addr ) {
|
|||
_ASL(addr);
|
||||
#endif
|
||||
}
|
||||
INLINE void ASLA() {
|
||||
INSTR void ASLA(void) {
|
||||
dbgPrintf("ASL ");
|
||||
disPrintf(disassembly.inst, "ASL");
|
||||
|
||||
|
|
@ -77,7 +77,7 @@ INLINE void ASLA() {
|
|||
absolute LSR oper 4E 3 6
|
||||
absolute,X LSR oper,X 5E 3 7
|
||||
**/
|
||||
INLINE void LSR( uint16_t addr ) {
|
||||
INSTR void LSR( uint16_t addr ) {
|
||||
dbgPrintf("LSR ");
|
||||
disPrintf(disassembly.inst, "LSR");
|
||||
|
||||
|
|
@ -86,7 +86,7 @@ INLINE void LSR( uint16_t addr ) {
|
|||
set_flags_NZ( WRLOMEM[addr] >>= 1 );
|
||||
#endif
|
||||
}
|
||||
INLINE void LSRA() {
|
||||
INSTR void LSRA(void) {
|
||||
dbgPrintf("LSR ");
|
||||
disPrintf(disassembly.inst, "LSR");
|
||||
|
||||
|
|
@ -111,14 +111,14 @@ INLINE void LSRA() {
|
|||
absolute,X ROL oper,X 3E 3 7
|
||||
**/
|
||||
#ifndef DEBUGGER
|
||||
INLINE void _ROL( uint16_t addr ) {
|
||||
INSTR void _ROL( uint16_t addr ) {
|
||||
uint8_t C = m6502.C != 0;
|
||||
m6502.C = WRLOMEM[addr] & 0x80;
|
||||
WRLOMEM[addr] <<= 1;
|
||||
set_flags_NZ( WRLOMEM[addr] |= C );
|
||||
}
|
||||
#endif
|
||||
INLINE void ROL( uint16_t addr ) {
|
||||
INSTR void ROL( uint16_t addr ) {
|
||||
dbgPrintf("ROL ");
|
||||
disPrintf(disassembly.inst, "ROL");
|
||||
|
||||
|
|
@ -126,7 +126,7 @@ INLINE void ROL( uint16_t addr ) {
|
|||
_ROL(addr);
|
||||
#endif
|
||||
}
|
||||
INLINE void ROLA() {
|
||||
INSTR void ROLA(void) {
|
||||
dbgPrintf("ROL ");
|
||||
disPrintf(disassembly.inst, "ROL");
|
||||
|
||||
|
|
@ -153,14 +153,14 @@ INLINE void ROLA() {
|
|||
absolute,X ROR oper,X 7E 3 7
|
||||
**/
|
||||
#ifndef DEBUGGER
|
||||
INLINE void _ROR( uint16_t addr ) {
|
||||
INSTR void _ROR( uint16_t addr ) {
|
||||
uint8_t C = m6502.C != 0;
|
||||
m6502.C = WRLOMEM[addr] & 1;
|
||||
WRLOMEM[addr] >>= 1;
|
||||
set_flags_NZ( WRLOMEM[addr] |= C << 7 );
|
||||
}
|
||||
#endif
|
||||
INLINE void ROR( uint16_t addr ) {
|
||||
INSTR void ROR( uint16_t addr ) {
|
||||
dbgPrintf("ROR ");
|
||||
disPrintf(disassembly.inst, "ROR");
|
||||
|
||||
|
|
@ -168,7 +168,7 @@ INLINE void ROR( uint16_t addr ) {
|
|||
_ROR(addr);
|
||||
#endif
|
||||
}
|
||||
INLINE void RORA() {
|
||||
INSTR void RORA(void) {
|
||||
dbgPrintf("ROR ");
|
||||
disPrintf(disassembly.inst, "ROR");
|
||||
|
||||
|
|
|
|||
|
|
@ -28,22 +28,22 @@ static const uint16_t stack_base_addr = 0x100;
|
|||
|
||||
|
||||
#ifndef DEBUGGER
|
||||
INLINE void PUSH( uint8_t src ) {
|
||||
INSTR void PUSH( uint8_t src ) {
|
||||
// DO NOT MAKE IT NICER! faster this way!
|
||||
WRLOMEM[ stack_base_addr | m6502.SP-- ] = src;
|
||||
}
|
||||
|
||||
INLINE uint8_t POP() {
|
||||
INSTR uint8_t POP(void) {
|
||||
return Apple2_64K_MEM[ stack_base_addr | ++m6502.SP ];
|
||||
}
|
||||
|
||||
|
||||
INLINE void PUSH_addr( uint16_t addr ) {
|
||||
INSTR void PUSH_addr( uint16_t addr ) {
|
||||
PUSH( (uint8_t)(addr >> 8) );
|
||||
PUSH( (uint8_t)addr );
|
||||
}
|
||||
|
||||
INLINE uint16_t POP_addr() {
|
||||
INLINE uint16_t POP_addr(void) {
|
||||
return POP() + ( POP() << 8 );
|
||||
}
|
||||
#endif
|
||||
|
|
@ -58,7 +58,7 @@ INLINE uint16_t POP_addr() {
|
|||
--------------------------------------------
|
||||
implied PHA 48 1 3
|
||||
**/
|
||||
INLINE void PHA() {
|
||||
INSTR void PHA(void) {
|
||||
dbgPrintf("PHA %02X ", m6502.A);
|
||||
disPrintf(disassembly.inst, "PHA");
|
||||
|
||||
|
|
@ -77,7 +77,7 @@ INLINE void PHA() {
|
|||
--------------------------------------------
|
||||
implied PHX 48 1 3
|
||||
**/
|
||||
INLINE void PHX() {
|
||||
INSTR void PHX(void) {
|
||||
dbgPrintf("PHX %02X ", m6502.X);
|
||||
disPrintf(disassembly.inst, "PHX");
|
||||
|
||||
|
|
@ -96,7 +96,7 @@ INLINE void PHX() {
|
|||
--------------------------------------------
|
||||
implied PHY 48 1 3
|
||||
**/
|
||||
INLINE void PHY() {
|
||||
INSTR void PHY(void) {
|
||||
dbgPrintf("PHY %02X ", m6502.Y);
|
||||
disPrintf(disassembly.inst, "PHY");
|
||||
|
||||
|
|
@ -115,7 +115,7 @@ INLINE void PHY() {
|
|||
--------------------------------------------
|
||||
implied PLA 68 1 4
|
||||
**/
|
||||
INLINE void PLA() {
|
||||
INSTR void PLA(void) {
|
||||
#ifndef DEBUGGER
|
||||
m6502.A = POP();
|
||||
#endif
|
||||
|
|
@ -138,7 +138,7 @@ INLINE void PLA() {
|
|||
--------------------------------------------
|
||||
implied PLX 68 1 4
|
||||
**/
|
||||
INLINE void PLX() {
|
||||
INSTR void PLX(void) {
|
||||
#ifndef DEBUGGER
|
||||
m6502.X = POP();
|
||||
#endif
|
||||
|
|
@ -161,7 +161,7 @@ INLINE void PLX() {
|
|||
--------------------------------------------
|
||||
implied PLY 68 1 4
|
||||
**/
|
||||
INLINE void PLY() {
|
||||
INSTR void PLY(void) {
|
||||
#ifndef DEBUGGER
|
||||
m6502.Y = POP();
|
||||
#endif
|
||||
|
|
@ -184,7 +184,7 @@ INLINE void PLY() {
|
|||
--------------------------------------------
|
||||
implied PHP 08 1 3
|
||||
**/
|
||||
INLINE void PHP() {
|
||||
INSTR void PHP(void) {
|
||||
dbgPrintf("PHP %02X ", m6502.SR);
|
||||
disPrintf(disassembly.inst, "PHP");
|
||||
|
||||
|
|
@ -203,7 +203,7 @@ INLINE void PHP() {
|
|||
--------------------------------------------
|
||||
implied PLP 28 1 4
|
||||
**/
|
||||
INLINE void PLP() {
|
||||
INSTR void PLP(void) {
|
||||
#ifndef DEBUGGER
|
||||
setFlags(POP() | 0x30); // res and B flag should be set
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -35,7 +35,7 @@
|
|||
--------------------------------------------
|
||||
implied TAX AA 1 2
|
||||
**/
|
||||
INLINE void TAX() {
|
||||
INSTR void TAX(void) {
|
||||
dbgPrintf("TAX(%02X) ", m6502.A);
|
||||
disPrintf(disassembly.inst, "TAX");
|
||||
|
||||
|
|
@ -54,7 +54,7 @@ INLINE void TAX() {
|
|||
--------------------------------------------
|
||||
implied TXA 8A 1 2
|
||||
**/
|
||||
INLINE void TXA() {
|
||||
INSTR void TXA(void) {
|
||||
dbgPrintf("TXA(%02X) ", m6502.X);
|
||||
disPrintf(disassembly.inst, "TXA");
|
||||
|
||||
|
|
@ -74,7 +74,7 @@ INLINE void TXA() {
|
|||
--------------------------------------------
|
||||
implied TAY A8 1 2
|
||||
**/
|
||||
INLINE void TAY() {
|
||||
INSTR void TAY(void) {
|
||||
dbgPrintf("TAY ");
|
||||
disPrintf(disassembly.inst, "TAY");
|
||||
|
||||
|
|
@ -93,7 +93,7 @@ INLINE void TAY() {
|
|||
--------------------------------------------
|
||||
implied TYA 98 1 2
|
||||
**/
|
||||
INLINE void TYA() {
|
||||
INSTR void TYA(void) {
|
||||
dbgPrintf("TYA(%02X) ", m6502.Y);
|
||||
disPrintf(disassembly.inst, "TYA");
|
||||
|
||||
|
|
@ -112,7 +112,7 @@ INLINE void TYA() {
|
|||
--------------------------------------------
|
||||
implied TSX BA 1 2
|
||||
**/
|
||||
INLINE void TSX() {
|
||||
INSTR void TSX(void) {
|
||||
dbgPrintf("TSX(%02X) ", m6502.SP);
|
||||
disPrintf(disassembly.inst, "TSX");
|
||||
|
||||
|
|
@ -131,7 +131,7 @@ INLINE void TSX() {
|
|||
--------------------------------------------
|
||||
implied TXS 9A 1 2
|
||||
**/
|
||||
INLINE void TXS() {
|
||||
INSTR void TXS(void) {
|
||||
dbgPrintf("TXS(%02X) ", m6502.X);
|
||||
disPrintf(disassembly.inst, "TXS");
|
||||
|
||||
|
|
|
|||
|
|
@ -32,7 +32,7 @@ ANC - "AND" Memory with Accumulator
|
|||
(M "AND" A) -> A
|
||||
THEN msb(A) -> C
|
||||
**/
|
||||
INLINE void ANC ( uint8_t src ) {
|
||||
INSTR void ANC ( uint8_t src ) {
|
||||
disPrintf(disassembly.inst, "ANC");
|
||||
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -52,7 +52,7 @@ INLINE void ANC ( uint8_t src ) {
|
|||
THEN msb(A) -> C
|
||||
THEN ROR A
|
||||
**/
|
||||
INLINE void ARC ( uint8_t src ) {
|
||||
INSTR void ARC ( uint8_t src ) {
|
||||
disPrintf(disassembly.inst, "ARC");
|
||||
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -74,7 +74,7 @@ INLINE void ARC ( uint8_t src ) {
|
|||
(M "AND" A) -> A
|
||||
THEN LSR A
|
||||
**/
|
||||
INLINE void ASR ( uint8_t src ) {
|
||||
INSTR void ASR ( uint8_t src ) {
|
||||
disPrintf(disassembly.inst, "ASR");
|
||||
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -95,7 +95,7 @@ INLINE void ASR ( uint8_t src ) {
|
|||
(M - 1) -> M
|
||||
THEN CMP M
|
||||
**/
|
||||
INLINE void DCP ( uint16_t addr ) {
|
||||
INSTR void DCP ( uint16_t addr ) {
|
||||
disPrintf(disassembly.inst, "DCP");
|
||||
#ifndef DEBUGGER
|
||||
_DEC(addr);
|
||||
|
|
@ -107,7 +107,7 @@ INLINE void DCP ( uint16_t addr ) {
|
|||
/**
|
||||
LAS - Stores {adr} & S into A, X and S
|
||||
**/
|
||||
INLINE void LAS ( uint8_t src ) {
|
||||
INSTR void LAS ( uint8_t src ) {
|
||||
disPrintf(disassembly.inst, "LAS");
|
||||
#ifndef DEBUGGER
|
||||
set_flags_NZ( m6502.A = m6502.X = m6502.SP = m6502.SP & src );
|
||||
|
|
@ -122,7 +122,7 @@ INLINE void LAS ( uint8_t src ) {
|
|||
(M + 1) -> M
|
||||
THEN (A - M - ~C) -> A
|
||||
**/
|
||||
INLINE void ISB ( uint16_t addr ) {
|
||||
INSTR void ISB ( uint16_t addr ) {
|
||||
disPrintf(disassembly.inst, "ISB");
|
||||
#ifndef DEBUGGER
|
||||
_INC(addr);
|
||||
|
|
@ -136,7 +136,7 @@ INLINE void ISB ( uint16_t addr ) {
|
|||
|
||||
M -> X,A
|
||||
**/
|
||||
INLINE void LAX ( uint8_t src ) {
|
||||
INSTR void LAX ( uint8_t src ) {
|
||||
disPrintf(disassembly.inst, "LAX");
|
||||
#ifndef DEBUGGER
|
||||
set_flags_NZ(m6502.A = m6502.X = src);
|
||||
|
|
@ -151,7 +151,7 @@ INLINE void LAX ( uint8_t src ) {
|
|||
ROL M
|
||||
AND M
|
||||
**/
|
||||
INLINE void RLA ( uint16_t addr ) {
|
||||
INSTR void RLA ( uint16_t addr ) {
|
||||
disPrintf(disassembly.inst, "RLA");
|
||||
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -168,7 +168,7 @@ INLINE void RLA ( uint16_t addr ) {
|
|||
ROR M
|
||||
ADC M
|
||||
**/
|
||||
INLINE void RRA ( uint16_t addr ) {
|
||||
INSTR void RRA ( uint16_t addr ) {
|
||||
disPrintf(disassembly.inst, "RRA");
|
||||
#ifndef DEBUGGER
|
||||
_ROR(addr);
|
||||
|
|
@ -185,7 +185,7 @@ INLINE void RRA ( uint16_t addr ) {
|
|||
THEN (SP "AND" (MSB(adr)+1)) -> M
|
||||
**/
|
||||
|
||||
INLINE void SAS ( uint16_t addr ) {
|
||||
INSTR void SAS ( uint16_t addr ) {
|
||||
disPrintf(disassembly.inst, "SAS");
|
||||
#ifndef DEBUGGER
|
||||
m6502.SP = m6502.A & m6502.X;
|
||||
|
|
@ -215,7 +215,7 @@ INLINE void SAS ( uint16_t addr ) {
|
|||
be ignored in the subtraction but set according to the result.
|
||||
|
||||
**/
|
||||
INLINE void SBX ( uint8_t src ) {
|
||||
INSTR void SBX ( uint8_t src ) {
|
||||
disPrintf(disassembly.inst, "SBX");
|
||||
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -237,7 +237,7 @@ INLINE void SBX ( uint8_t src ) {
|
|||
(X "AND" A "AND" addr.H) -> M
|
||||
**/
|
||||
|
||||
INLINE void SHA ( uint16_t addr ) {
|
||||
INSTR void SHA ( uint16_t addr ) {
|
||||
disPrintf(disassembly.inst, "SHA");
|
||||
#ifndef DEBUGGER
|
||||
set_flags_NZ( WRLOMEM[addr] = m6502.X & m6502.A & ((addr >> 8) + 1) );
|
||||
|
|
@ -251,7 +251,7 @@ INLINE void SHA ( uint16_t addr ) {
|
|||
((MSB(adr)+1) "AND" Y) -> M
|
||||
**/
|
||||
|
||||
INLINE void SHY ( uint16_t addr ) {
|
||||
INSTR void SHY ( uint16_t addr ) {
|
||||
disPrintf(disassembly.inst, "SHY");
|
||||
#ifndef DEBUGGER
|
||||
set_flags_NZ( WRLOMEM[addr] = m6502.Y &((addr >> 8) + 1) );
|
||||
|
|
@ -265,7 +265,7 @@ INLINE void SHY ( uint16_t addr ) {
|
|||
((MSB(adr)+1) "AND" X) -> M
|
||||
**/
|
||||
|
||||
INLINE void SHX ( uint16_t addr ) {
|
||||
INSTR void SHX ( uint16_t addr ) {
|
||||
disPrintf(disassembly.inst, "SHX");
|
||||
#ifndef DEBUGGER
|
||||
set_flags_NZ( WRLOMEM[addr] = m6502.X &((addr >> 8) + 1) );
|
||||
|
|
@ -283,7 +283,7 @@ INLINE void SHX ( uint16_t addr ) {
|
|||
-> A,M
|
||||
**/
|
||||
|
||||
INLINE void SLO ( uint16_t addr ) {
|
||||
INSTR void SLO ( uint16_t addr ) {
|
||||
disPrintf(disassembly.inst, "SLO");
|
||||
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -300,7 +300,7 @@ INLINE void SLO ( uint16_t addr ) {
|
|||
(A "AND" X) -> M
|
||||
**/
|
||||
|
||||
INLINE void SAX ( uint16_t addr ) {
|
||||
INSTR void SAX ( uint16_t addr ) {
|
||||
disPrintf(disassembly.inst, "SAX");
|
||||
#ifndef DEBUGGER
|
||||
set_flags_NZ( WRLOMEM[addr] = m6502.A & m6502.X );
|
||||
|
|
@ -316,7 +316,7 @@ INLINE void SAX ( uint16_t addr ) {
|
|||
ORA M
|
||||
**/
|
||||
|
||||
INLINE void SRE ( uint16_t addr ) {
|
||||
INSTR void SRE ( uint16_t addr ) {
|
||||
disPrintf(disassembly.inst, "SRE");
|
||||
|
||||
#ifndef DEBUGGER
|
||||
|
|
@ -335,7 +335,7 @@ XAA - "AND" Memory with Index X into Accumulator
|
|||
|
||||
(M "AND" X) -> A
|
||||
**/
|
||||
INLINE void XAA ( uint8_t src ) {
|
||||
INSTR void XAA ( uint8_t src ) {
|
||||
disPrintf(disassembly.inst, "XAA");
|
||||
#ifndef DEBUGGER
|
||||
set_flags_NZ( m6502.A = m6502.X & src );
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user