diff --git a/src/cpu/6502.c b/src/cpu/6502.c index 1931bcc..840863d 100644 --- a/src/cpu/6502.c +++ b/src/cpu/6502.c @@ -111,7 +111,7 @@ m6502_t m6502 = { 0, // clklast 0, // clkfrm - 0, // clk_wrenable +// 0, // clk_wrenable 0, // lastIO 0, // ecoSpindown diff --git a/src/cpu/6502.h b/src/cpu/6502.h index 51180fb..5b41c57 100644 --- a/src/cpu/6502.h +++ b/src/cpu/6502.h @@ -128,6 +128,8 @@ typedef struct debugger_s { } debugger_t; +typedef uint32_t clkfrm_t; + //#pragma pack(1) typedef struct m6502_s { uint8_t A; // 0: Accumulator @@ -156,13 +158,13 @@ typedef struct m6502_s { uint8_t SP; // 13: Stack Pointer ( stack addr = 0x01 + sp ) // unsigned clk; // Clock Counter - uint64_t clktime; // 14: - uint64_t clklast; // 15: - uint32_t clkfrm; // 16: + clkfrm_t clktime; // 14: + clkfrm_t clklast; // 15: + clkfrm_t clkfrm; // 16: - uint64_t clk_wrenable; // CPU clock when WRITE RAM is triggered +// uint64_t clk_wrenable; // CPU clock when WRITE RAM is triggered - uint64_t lastIO; // Last time I/O accessed + clkfrm_t lastIO; // Last time I/O accessed int ecoSpindown; // spindown counter for eco mode debugger_t debugger; diff --git a/src/cpu/6502_bp.c b/src/cpu/6502_bp.c index 4425b4c..d56e750 100644 --- a/src/cpu/6502_bp.c +++ b/src/cpu/6502_bp.c @@ -135,10 +135,9 @@ int m6502_dbg_bp_search(uint16_t arr[], int l, int r, uint16_t addr) { /// Get index of the last BP -/// @param i Current last index /// @return Index of the last breakpoint or 0 if non -int m6502_dbg_bp_get_last(uint16_t *bp, int i) { - for(; i >= 0; i--) { +int m6502_dbg_bp_get_last(uint16_t *bp) { + for(int i = LAST_IDX(bp); i >= 0; i--) { if ( bp[i] ) { return i; } @@ -205,8 +204,9 @@ int m6502_dbg_bp_compact(uint16_t * bp) { if ( i > 1 ) { memcpy(bp + 1, bp + i, LAST_IDX(bp) * sizeof(uint16_t)); } + LAST_IDX(bp) = i = m6502_dbg_bp_get_last(bp); memset(bp + i + 1, 0, (DEBUG_MAX_BREAKPOINTS - i - 2) * sizeof(uint16_t)); - return m6502_dbg_bp_get_last(bp, LAST_IDX(bp)); + return i; } @@ -230,7 +230,7 @@ int m6502_dbg_bp_add(uint16_t * bp, uint16_t addr) { if (LAST_IDX(bp) < DEBUG_MAX_BREAKPOINTS - 1) { bp[++LAST_IDX(bp)] = addr; m6502_dbg_bp_sort(bp, 1, LAST_IDX(bp)); - LAST_IDX(bp) = m6502_dbg_bp_compact(bp); + m6502_dbg_bp_compact(bp); return LAST_IDX(bp); } // no empty slots @@ -245,7 +245,7 @@ int m6502_dbg_bp_del(uint16_t * bp, uint16_t addr) { if (i >= 0) { bp[i] = 0; m6502_dbg_bp_sort(breakpoints, 1, LAST_IDX(bp)); - LAST_IDX(bp) = m6502_dbg_bp_compact(bp); + m6502_dbg_bp_compact(bp); } return LAST_IDX(bp); } diff --git a/src/cpu/65C02.c b/src/cpu/65C02.c index 9716b0c..47f02dc 100644 --- a/src/cpu/65C02.c +++ b/src/cpu/65C02.c @@ -90,7 +90,7 @@ m6502_t m6502 = { 0, // clklast 0, // clkfrm - 0, // clk_wrenable +// 0, // clk_wrenable 0, // lastIO 0, // ecoSpindown diff --git a/src/dev/disk/woz.c b/src/dev/disk/woz.c index 46d1107..1b39b64 100644 --- a/src/dev/disk/woz.c +++ b/src/dev/disk/woz.c @@ -324,7 +324,7 @@ uint8_t woz_read() { static uint8_t latch = 0; - uint64_t clktime = m6502.clktime + m6502.clkfrm; + clkfrm_t clktime = m6502.clktime + m6502.clkfrm; clkelpased = clktime - m6502.clklast; m6502.clklast = clktime; @@ -410,7 +410,7 @@ void woz_write( uint8_t data ) { woz_flags.disk_modified = 1; - uint64_t clktime = m6502.clktime + m6502.clkfrm; + clkfrm_t clktime = m6502.clktime + m6502.clkfrm; clkelpased = clktime - m6502.clklast; m6502.clklast = clktime; diff --git a/src/dev/mem/mmio.c b/src/dev/mem/mmio.c index 5a5cc61..dea97e9 100644 --- a/src/dev/mem/mmio.c +++ b/src/dev/mem/mmio.c @@ -97,7 +97,7 @@ INLINE void set_MEM_readonly(void) { /// Returns TRUE if already writeable or second of the "two consecutive" reads on appropriate soft switches INLINE int is_wr_enabled(void) { - uint64_t clk = m6502.clktime + m6502.clkfrm; +// uint64_t clk = m6502.clktime + m6502.clkfrm; // uint64_t elapsed = clk - m6502.clk_wrenable; // int is_enabled = ( elapsed < 16 ) || MEMcfg.WR_RAM; int is_enabled = ++MEMcfg.WR_RAM_cntr >= 1 || MEMcfg.WR_RAM; @@ -105,7 +105,7 @@ INLINE int is_wr_enabled(void) { // printf("is_wr_enabled elapsed:%llu was_enabled:%i to_be_enabled:%i\n", elapsed, MEMcfg.WR_RAM, is_enabled); dbgPrintf2("is_wr_enabled WR_RAM_cntr:%u was_enabled:%i to_be_enabled:%i\n", MEMcfg.WR_RAM_cntr, MEMcfg.WR_RAM, is_enabled); - m6502.clk_wrenable = clk; +// m6502.clk_wrenable = clk; return is_enabled; }