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Bugfixes merged from Master

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This commit is contained in:
tudnai 2020-04-30 12:01:35 -07:00
parent 016a132ba7
commit 1b95e22568
2 changed files with 29 additions and 33 deletions
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4
src/cpu/6502.c
View File

@ -886,14 +886,14 @@ void rom_loadFile( const char * bundlePath, const char * filename ) {
else if ( flen == 16 * KB ) {
read_rom( bundlePath, filename, Apple2_16K_ROM, 0);
memcpy(Apple2_64K_MEM + 0xC000, Apple2_16K_ROM, 16 * KB);
// memcpy(Apple2_64K_MEM + 0xC000, Apple2_16K_ROM, 16 * KB);
// SWITCH_CX_ROM( RAM_PG_RD_TBL, 0xC0, Apple2_16K_ROM, 0x00);
}
else if ( flen == 12 * KB ) {
read_rom( bundlePath, filename, Apple2_16K_ROM, 0x1000);
memcpy(Apple2_64K_MEM + 0xD000, Apple2_16K_ROM + 0x1000, 12 * KB);
// memcpy(Apple2_64K_MEM + 0xD000, Apple2_16K_ROM + 0x1000, 12 * KB);
}
}

58
src/dev/mem/mmio.h
View File

@ -357,40 +357,40 @@ enum mmio {
void resetMemory() {
// 48K main memory
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x00, Apple2_64K_RAM, 0x00)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x10, Apple2_64K_RAM, 0x10)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x20, Apple2_64K_RAM, 0x20)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x30, Apple2_64K_RAM, 0x30)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x40, Apple2_64K_RAM, 0x40)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x50, Apple2_64K_RAM, 0x50)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x60, Apple2_64K_RAM, 0x60)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x70, Apple2_64K_RAM, 0x70)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x80, Apple2_64K_RAM, 0x80)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x90, Apple2_64K_RAM, 0x90)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xA0, Apple2_64K_RAM, 0xA0)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xB0, Apple2_64K_RAM, 0xB0)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x00, Apple2_64K_MEM, 0x00)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x10, Apple2_64K_MEM, 0x10)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x20, Apple2_64K_MEM, 0x20)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x30, Apple2_64K_MEM, 0x30)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x40, Apple2_64K_MEM, 0x40)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x50, Apple2_64K_MEM, 0x50)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x60, Apple2_64K_MEM, 0x60)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x70, Apple2_64K_MEM, 0x70)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x80, Apple2_64K_MEM, 0x80)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x90, Apple2_64K_MEM, 0x90)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xA0, Apple2_64K_MEM, 0xA0)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xB0, Apple2_64K_MEM, 0xB0)
// I/O Addresses
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xC0, Apple2_64K_RAM, 0xC0)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xC0, Apple2_64K_MEM, 0xC0)
// Reading from the ROM
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xD0, Apple2_16K_ROM, 0x10) // D0
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xE0, Apple2_16K_ROM, 0x20) // E0
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xF0, Apple2_16K_ROM, 0x30) // F0
// 48K main memory
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x00, Apple2_64K_RAM, 0x00)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x10, Apple2_64K_RAM, 0x10)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x20, Apple2_64K_RAM, 0x20)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x30, Apple2_64K_RAM, 0x30)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x40, Apple2_64K_RAM, 0x40)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x50, Apple2_64K_RAM, 0x50)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x60, Apple2_64K_RAM, 0x60)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x70, Apple2_64K_RAM, 0x70)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x80, Apple2_64K_RAM, 0x80)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x90, Apple2_64K_RAM, 0x90)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xA0, Apple2_64K_RAM, 0xA0)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xB0, Apple2_64K_RAM, 0xB0)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x00, Apple2_64K_MEM, 0x00)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x10, Apple2_64K_MEM, 0x10)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x20, Apple2_64K_MEM, 0x20)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x30, Apple2_64K_MEM, 0x30)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x40, Apple2_64K_MEM, 0x40)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x50, Apple2_64K_MEM, 0x50)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x60, Apple2_64K_MEM, 0x60)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x70, Apple2_64K_MEM, 0x70)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x80, Apple2_64K_MEM, 0x80)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x90, Apple2_64K_MEM, 0x90)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xA0, Apple2_64K_MEM, 0xA0)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xB0, Apple2_64K_MEM, 0xB0)
// I/O Addresses
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xC0, Apple2_64K_RAM, 0xC0)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xC0, Apple2_64K_MEM, 0xC0)
// NO Writing to the ROM
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xD0, Apple2_Dummy_RAM, 0 );
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xE0, Apple2_Dummy_RAM, 0 );
@ -406,9 +406,8 @@ void resetMemory() {
MEMcfg.RD_AUX_MEM = 0;
MEMcfg.WR_AUX_MEM = 0;
MEMcfg.int_Cx_ROM = 0;
MEMcfg.slot_C3_ROM = 0;
MEMcfg.ALT_ZP = 0;
MEMcfg.RD_AUX_MEM = 0;
MEMcfg.WR_AUX_MEM = 0;
MEMcfg.txt_page_2 = 0;
@ -416,11 +415,8 @@ void resetMemory() {
memset( Apple2_64K_AUX, 0, sizeof(Apple2_64K_AUX) );
// 64K Main Memory Area
memset( Apple2_64K_RAM, 0, sizeof(Apple2_64K_RAM) );
// 16K Memory Expansion
memset( Apple2_16K_RAM, 0, sizeof(Apple2_16K_RAM) );
// I/O area should be 0 -- just in case we decide to init RAM with a different pattern...
memset( Apple2_64K_RAM + 0xC000, 0, 0x1000 );
}