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Code Issues Projects Releases Wiki Activity

Implementing Memory & I/O Break 3

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This commit is contained in:
tudnai 2022-11-17 19:32:56 -08:00
parent 5fdab01ca4
commit 20daf5c73c
29 changed files with 493 additions and 372 deletions
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8
A2Mac.xcodeproj/project.pbxproj
View File

@ -234,6 +234,8 @@
32D08A1529219C6B00F2B486 /* HexDigitFormatter.swift in Sources */ = {isa = PBXBuildFile; fileRef = 32D08A1329219C6A00F2B486 /* HexDigitFormatter.swift */; };
32D08A202921A8FA00F2B486 /* String.swift in Sources */ = {isa = PBXBuildFile; fileRef = 32D08A1F2921A8F900F2B486 /* String.swift */; };
32D08A212921A8FA00F2B486 /* String.swift in Sources */ = {isa = PBXBuildFile; fileRef = 32D08A1F2921A8F900F2B486 /* String.swift */; };
32D08A7429272FDD00F2B486 /* 6502_dis_utils.c in Sources */ = {isa = PBXBuildFile; fileRef = 32D08A7329272FDD00F2B486 /* 6502_dis_utils.c */; };
32D08A7529272FDD00F2B486 /* 6502_dis_utils.c in Sources */ = {isa = PBXBuildFile; fileRef = 32D08A7329272FDD00F2B486 /* 6502_dis_utils.c */; };
32E3126624A7193700E61891 /* disk_ii_arm.sfx in Resources */ = {isa = PBXBuildFile; fileRef = 32E3126424A7193700E61891 /* disk_ii_arm.sfx */; };
32E3126724A7194900E61891 /* disk_ii_arm.sfx in Copy SFX Files */ = {isa = PBXBuildFile; fileRef = 32E3126424A7193700E61891 /* disk_ii_arm.sfx */; };
32E3126924A98B9300E61891 /* dsk2woz.c in Sources */ = {isa = PBXBuildFile; fileRef = 32E3126824A98B9300E61891 /* dsk2woz.c */; };
@ -757,6 +759,8 @@
32D089EC291EE19200F2B486 /* UnfairLock.swift */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.swift; path = UnfairLock.swift; sourceTree = "<group>"; };
32D08A1329219C6A00F2B486 /* HexDigitFormatter.swift */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.swift; path = HexDigitFormatter.swift; sourceTree = "<group>"; };
32D08A1F2921A8F900F2B486 /* String.swift */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.swift; path = String.swift; sourceTree = "<group>"; };
32D08A7329272FDD00F2B486 /* 6502_dis_utils.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = 6502_dis_utils.c; sourceTree = "<group>"; };
32D08A7F2927306D00F2B486 /* 6502_dis_utils.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = 6502_dis_utils.h; sourceTree = "<group>"; };
32DBF7632334657900DD50E7 /* HiRes.swift */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.swift; path = HiRes.swift; sourceTree = "<group>"; };
32DBF76723373FB400DD50E7 /* 6502_dis.h */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.c.h; path = 6502_dis.h; sourceTree = "<group>"; };
32E21BE62491BF8B006C0C72 /* apple-rainbow.png */ = {isa = PBXFileReference; lastKnownFileType = image.png; path = "apple-rainbow.png"; sourceTree = "<group>"; };
@ -1005,6 +1009,8 @@
325B75DF2909F95000B29605 /* 6502_dbg.c */,
32DBF76723373FB400DD50E7 /* 6502_dis.h */,
3268B97927DE7D6A003FBDCC /* 6502_dis.c */,
32D08A7F2927306D00F2B486 /* 6502_dis_utils.h */,
32D08A7329272FDD00F2B486 /* 6502_dis_utils.c */,
32D08987291A450400F2B486 /* 6502_bp.h */,
32D0897B291A44F200F2B486 /* 6502_bp.c */,
320F2A8924CFFBE300671B35 /* 6502_std.h */,
@ -1666,6 +1672,7 @@
32BCCCFC2650D275002151C5 /* 6502.c in Sources */,
32799F7E264B1A5700255669 /* PreferencesWindowController.swift in Sources */,
32799F80264B1A5700255669 /* dsk2woz.c in Sources */,
32D08A7529272FDD00F2B486 /* 6502_dis_utils.c in Sources */,
32799F81264B1A5700255669 /* disk.c in Sources */,
3268B97B27DE7D6B003FBDCC /* 6502_dis.c in Sources */,
32C82360290888D10018438F /* CheatMenu.swift in Sources */,
@ -1714,6 +1721,7 @@
32D08A202921A8FA00F2B486 /* String.swift in Sources */,
32D089D8291E1BF800F2B486 /* DisassView.swift in Sources */,
32C6995D27C548C800D0F25D /* Shaders.metal in Sources */,
32D08A7429272FDD00F2B486 /* 6502_dis_utils.c in Sources */,
325EB62F23F8856F00C6B4A4 /* woz.c in Sources */,
32100AB42877AB8600D894EE /* scsi.c in Sources */,
32A6AB0F266AF5160023257A /* paddle.c in Sources */,

32
A2Mac.xcodeproj/project.xcworkspace/xcuserdata/trudnai.xcuserdatad/xcdebugger/Expressions.xcexplist
View File

@ -304,6 +304,17 @@
</ContextState>
<ContextState
contextName = "m6502_dbg_bp_compact:6502_bp.c">
<PersistentStrings>
<PersistentString
value = "mem_rd_bp">
</PersistentString>
<PersistentString
value = "bp + i + 1">
</PersistentString>
<PersistentString
value = "256 - i - 2 ">
</PersistentString>
</PersistentStrings>
</ContextState>
<ContextState
contextName = "m6502_dbg_bp_get_last:6502_bp.c">
@ -583,6 +594,14 @@
<ContextState
contextName = "disassemblyLine:disassembler.c">
</ContextState>
<ContextState
contextName = "_memread:mmio.c">
<PersistentStrings>
<PersistentString
value = "m6502.PC">
</PersistentString>
</PersistentStrings>
</ContextState>
<ContextState
contextName = "ToolBarController.buttonPressed(_:):ToolBarController.swift">
<PersistentStrings>
@ -870,7 +889,10 @@
contextName = "m6502_dbg_bp_add:6502_bp.c">
<PersistentStrings>
<PersistentString
value = "breakpoints">
value = "mem_rd_bp">
</PersistentString>
<PersistentString
value = "bp">
</PersistentString>
</PersistentStrings>
</ContextState>
@ -1355,6 +1377,14 @@
</PersistentString>
</PersistentStrings>
</ContextState>
<ContextState
contextName = "m6502_dbg_init:6502_dbg.c">
<PersistentStrings>
<PersistentString
value = "mem_read_breakpoints">
</PersistentString>
</PersistentStrings>
</ContextState>
<ContextState
contextName = "ViewController.Update():ViewController.swift">
<PersistentStrings>

1
A2Mac/A2Mac-Bridging-Header.h
View File

@ -32,6 +32,7 @@
#import "6502_bp.h"
#import "6502_dbg.h"
#import "6502_dis.h"
#import "6502_dis_utils.h"
#import "speaker.h" // So we can access to speaker stuff from Swift
#import "disk.h"
#import "dsk2woz.h"

2
src/cpu/6502.c
View File

@ -126,7 +126,7 @@ m6502_t m6502 = {
const int ecoSpindown = 25; // initial value of ECO Spingdown Counter
#include "6502_dis.h"
#include "6502_dis_utils.h"
#include "../dev/mem/mmio.h"

20
src/cpu/6502.h
View File

@ -30,9 +30,9 @@
#ifdef DISASSEMBLER
#define INSTR INLINE UNUSED static
#define INSTR INLINE static
#else
#define INSTR INLINE UNUSED static
#define INSTR INLINE static
#endif
#define CRYSTAL_MHZ 14.31818 // NTSC version (original)
@ -79,7 +79,8 @@ typedef enum : uint8_t {
SOFTRESET,
BREAKPOINT,
BREAKIO,
BREAKMEM,
BREAKRDMEM,
BREAKWRMEM,
} interrupt_t;
@ -241,8 +242,21 @@ extern unsigned int fps;
extern void rom_loadFile( const char * bundlePath, const char * filename );
extern void tst6502(void);
extern void m6502_ColdReset( const char * bundlePath, const char * romFilePath );
INLINE void set_flags_N( const uint8_t test );
INLINE void set_flags_V( const uint8_t test );
INLINE void set_flags_Z( const uint8_t test );
INLINE void set_flags_C( const int16_t test );
INLINE void set_flags_NZ( const uint8_t test );
INLINE void set_flags_NV( const uint8_t test );
INLINE void set_flags_NVZ( const uint8_t test );
INLINE void set_flags_NZC( const int16_t test );
INLINE flags_t getFlags(void);
INLINE void setFlags( uint8_t byte );
extern void m6502_Run(void);
INLINE int m6502_Step(void);
INLINE int m6502_Step_dbg(void);
extern void interrupt_IRQ(void);
extern void interrupt_NMI(void);

37
src/cpu/6502_dbg.c
View File

@ -31,7 +31,7 @@
#define CLK_WAIT
#define DEBUGGER
#define DISASSEMBLER
//#define DISASSEMBLER
#define FETCH_ADDR disass_addr
@ -57,7 +57,7 @@ extern m6502_t m6502;
uint16_t disass_addr = 0xFDED;
#include "6502_dis.h"
//#include "6502_dis.h"
#include "../dev/mem/mmio.h"
@ -80,27 +80,27 @@ typedef struct {
#include "6502_instructions.h"
#include "6502_bp.h"
INLINE int m6502_Disass_1_Instr(void) {
INLINE int m6502_Step_dbg(void) {
disNewInstruction();
_disNewInstruction();
switch ( _fetch_dis() ) {
switch ( fetch() ) {
#include "6502_std.h" // Standard 6502 instructions
//#include "6502_und.h" // Undocumented 6502 instructions
#include "6502_C.h" // Extended 65C02 instructions
default:
dbgPrintf("%04X: Unimplemented Instruction 0x%02X\n", m6502.PC -1, _memread_dis( m6502.PC -1 ));
dbgPrintf("%04X: Unimplemented Instruction 0x%02X\n", m6502.PC -1, memread( m6502.PC -1 ));
m6502.interrupt = INV;
return 2;
} // switch fetch
} // switch fetch16
return 2;
}
void m6502_Debug(void) {
m6502.clktime += m6502.clkfrm;
// m6502.clkfrm = 0;
m6502.lastIO = 0;
m6502.interrupt = NO_INT; // TODO: This should be taken care by the interrupt handler
@ -116,12 +116,12 @@ void m6502_Debug(void) {
clk_6502_per_frm_max = clk_6502_per_frm;
for ( m6502.clkfrm = m6502_Step(); m6502.clkfrm < clk_6502_per_frm_max ; m6502.clkfrm += m6502_Step() ) {
for ( m6502.clkfrm = m6502_Step_dbg(); m6502.clkfrm < clk_6502_per_frm_max; m6502.clkfrm += m6502_Step_dbg() ) {
switch (m6502.interrupt) {
case HALT:
if (m6502.debugger.mask.hlt) {
cpuState = cpuState_halted;
// m6502.debugger.wMask = 0;
// m6502.debugger.wMask = 0;
return;
}
break;
@ -129,7 +129,7 @@ void m6502_Debug(void) {
case BREAK:
if (m6502.debugger.mask.brk) {
cpuState = cpuState_halted;
// m6502.debugger.wMask = 0;
// m6502.debugger.wMask = 0;
return;
}
break;
@ -137,7 +137,7 @@ void m6502_Debug(void) {
case IRQ:
if (m6502.debugger.mask.irq) {
cpuState = cpuState_halted;
// m6502.debugger.wMask = 0;
// m6502.debugger.wMask = 0;
return;
}
break;
@ -145,7 +145,7 @@ void m6502_Debug(void) {
case NMI:
if (m6502.debugger.mask.nmi) {
cpuState = cpuState_halted;
// m6502.debugger.wMask = 0;
// m6502.debugger.wMask = 0;
return;
}
break;
@ -153,7 +153,7 @@ void m6502_Debug(void) {
case INV:
if (m6502.debugger.mask.inv) {
cpuState = cpuState_halted;
// m6502.debugger.wMask = 0;
// m6502.debugger.wMask = 0;
return;
}
break;
@ -163,7 +163,7 @@ void m6502_Debug(void) {
if (m6502.debugger.mask.out) {
if ( m6502.SP >= m6502.debugger.SP ) {
cpuState = cpuState_halted;
// m6502.debugger.wMask = 0;
// m6502.debugger.wMask = 0;
return;
}
}
@ -227,6 +227,9 @@ void m6502_dbg_init(void) {
m6502_dbg_bp_del_all(breakpoints);
m6502_dbg_bp_del_all(mem_read_breakpoints);
m6502_dbg_bp_del_all(mem_write_breakpoints);
// TODO: TESTING ONLY!!!
m6502_dbg_bp_add(mem_read_breakpoints, 0xC000);
}

1
src/cpu/6502_dbg.h
View File

@ -11,7 +11,6 @@
extern uint16_t disass_addr;
extern int m6502_Disass_1_Instr(void);
extern void m6502_Debug(void);
extern void m6502_dbg_on(void);
extern void m6502_dbg_off(void);

199
src/cpu/6502_dis.c
View File

@ -6,190 +6,27 @@
// Copyright © 2022 GameAlloy. All rights reserved.
//
#include <stdio.h>
#include <string.h>
#include <stdarg.h>
#define DISASSEMBLER
#include "6502_dis.h"
#include "6502.h"
#include "6502_bp.h"
#include "6502_instructions.h"
disassembly_t disassembly;
unsigned long long discnt = 0;
INLINE flags_t getFlags2(void) {
flags_t f = {
m6502.C != 0, // Carry Flag
m6502.Z != 0, // Zero Flag
m6502.I != 0, // Interrupt Flag
m6502.D != 0, // Decimal Flag
m6502.B != 0, // B Flag
m6502.res != 0, // reserved -- should be always 1
m6502.V != 0, // Overflow Flag ???
m6502.N != 0, // Negative Flag
};
return f;
INLINE int m6502_Disass_1_Instr(void) {
_disNewInstruction();
switch ( _fetch_dis() ) {
#include "6502_std.h" // Standard 6502 instructions
//#include "6502_und.h" // Undocumented 6502 instructions
#include "6502_C.h" // Extended 65C02 instructions
default:
dbgPrintf("%04X: Unimplemented Instruction 0x%02X\n", m6502.PC -1, _memread_dis( m6502.PC -1 ));
return 2;
} // switch fetch
return 2;
}
void _disHexB( char ** s, const uint8_t b ) {
// if ( m6502.dbgLevel.trace ) {
if ( (*s >= disassembly.opcode) && (*s < disassembly.opcode + sizeof(disassembly.opcode)) ) {
snprintf(*s, 4, "%02X ", b);
*s += 3;
}
else {
fprintf(stderr, "_disHexB *s is WRONG! (%p vs %p)\n", *s, disassembly.opcode);
}
// }
}
void _disHexW( char ** s, const uint16_t w ) {
// if ( m6502.dbgLevel.trace ) {
snprintf(*s, 6, "%04X ", w);
*s += 5;
// }
}
void _disPuts( char ** s, const char * from ) {
// if ( m6502.dbgLevel.trace ) {
while ( (*(*s)++ = *from++) );
// }
}
void _disPrintf( char * s, const size_t n, const char * fmt, ... ) {
// if ( m6502.dbgLevel.trace ) {
va_list arg_ptr;
va_start(arg_ptr, fmt);
vsnprintf( s, n, fmt, arg_ptr );
va_end(arg_ptr);
// }
}
INLINE uint8_t memread8_low( uint16_t addr );
void _disNewInstruction(void) {
// if ( m6502.dbgLevel.trace ) {
memset( &disassembly, 0, sizeof(disassembly) );
disassembly.clk = m6502.clktime + m6502.clkfrm;
disassembly.addr = m6502.PC;
snprintf(disassembly.hexAddr, 5, "%04X ", m6502.PC);
disassembly.pOpcode = disassembly.opcode;
disassembly.opcode[0] = '\0';
disassembly.inst[0] = '\0';
disassembly.oper[0] = '\0';
disassembly.comment[0] = '\0';
// }
disassembly.op = memread8_low(m6502.PC);
}
#ifdef DISASS_TRACE
void printDisassembly( FILE * f ) {
if ( m6502.debugger.mask.trace && f ) {
// fprintf( f, "%s: %-14s%-6s%-14s%-16s A:%02X X:%02X Y:%02X S:%02X P:%02X (%c%c%c%c%c%c%c%c)\n",
// disassembly.addr,
// disassembly.opcode,
// disassembly.inst,
// disassembly.oper,
// disassembly.comment,
// m6502.A,
// m6502.X,
// m6502.Y,
// m6502.SP,
// m6502.SR,
// m6502.N ? 'N' : 'n',
// m6502.V ? 'V' : 'v',
// m6502.res ? 'R' : 'r',
// m6502.B ? 'B' : 'b',
// m6502.D ? 'D' : 'd',
// m6502.I ? 'I' : 'i',
// m6502.Z ? 'Z' : 'z',
// m6502.C ? 'C' : 'c'
// );
// fprintf( f, "%llu\t%llu %s: %-11s%-4s%s\t0x%02X\t0x%02X\t0x%02X\t0x%02X\t0x%02X\t;\t%s\n", // Virtual ][ style
// ++discnt,
// m6502.clktime + clkfrm,
// disassembly.addr,
// disassembly.opcode,
// disassembly.inst,
// disassembly.oper,
// m6502.A,
// m6502.X,
// m6502.Y,
// 0,
// //getFlags2(),
// m6502.SP,
// disassembly.comment
// );
// // Virtual ][ Style
// fprintf( f, "%llu\t%llu\t%s: %-11s%-4s%s\t0x%02X\t0x%02X\t0x%02X\t0x%02X\t0x%02X\n", // Virtual ][ style
// ++discnt,
// disassembly.clk,
// disassembly.addr,
// disassembly.opcode,
// disassembly.inst,
// disassembly.oper,
// m6502.A,
// m6502.X,
// m6502.Y,
// getFlags2().SR,
// m6502.SP
// );
static char line[256];
// Steve ][ Style
snprintf( line, sizeof(line), "%10llu %10llu %s: %-11s%-4s%s", // Steve ][ style
++discnt,
disassembly.clk,
disassembly.addr,
disassembly.opcode,
disassembly.inst,
disassembly.oper
);
fprintf( f, "%-55s; 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X ; %s\n", // Steve ][ style
line,
m6502.A,
m6502.X,
m6502.Y,
getFlags2().SR,
m6502.SP,
disassembly.comment
);
}
}
#endif // DISASS_TRACE
const char * disassemblyLine(_Bool highlight) {
static char line[256];
snprintf( line, sizeof(line), "%s %s: %-11s%-4s%s",
m6502_dbg_bp_exists(breakpoints, disassembly.addr) ? "*" : " ",
disassembly.hexAddr,
disassembly.opcode,
disassembly.inst,
disassembly.oper
);
if (highlight) {
for (int i = 0; i < sizeof(line); i++) {
line[i] &= 0x3F;
}
}
return line;
}

64
src/cpu/6502_dis.h
View File

@ -25,69 +25,7 @@
#define _6502_dis_h
#include "common.h"
#define DISASS_ADDR_LEN 5 // 4 digits + \0
#define DISASS_OPCODE_LEN (4 * 3 + 1) // max 4 bytes * (2 digits + 1 space) + \0
#define DISASS_INST_LEN (6 + 1) // 3 char (unknown instr? -- give it 6 chars) + \0
#define DISASS_OPER_LEN (14 + 2 + 1 + 1 + 1) // 4 digits + 2 brackets + 1 comma + 1 index + \0
#define DISASS_COMM_LEN 256 // 255 char + \0
typedef struct disassembly_s {
uint64_t clk; // clock time
uint8_t op; // opcode
uint16_t addr;
char hexAddr[DISASS_ADDR_LEN]; // 4 digits + \0
char opcode[DISASS_OPCODE_LEN]; // max 4 bytes * (2 digits + 1 space) + \0
char * pOpcode; // pointer for opcode string builder
char inst[DISASS_INST_LEN]; // 3 char (unknown instr? -- give it 6 chars) + \0
char oper[DISASS_OPER_LEN]; // 4 digits + 2 brackets + 1 comma + 1 index + \0
char comment[DISASS_COMM_LEN]; // to be able to add some comments
} disassembly_t;
extern disassembly_t disassembly;
//#define DISASS_TRACE
//#undef DISASS_TRACE
extern unsigned long long discnt;
//extern unsigned long long int clktime;
extern void _disHexB( char ** s, const uint8_t b );
extern void _disHexW( char ** s, const uint16_t w );
extern void _disPuts( char ** s, const char * from );
extern void _disPrintf( char * s, const size_t n, const char * fmt, ... );
extern void _disNewInstruction(void);
#if defined(DISASS_TRACE) || defined(DISASSEMBLER)
#define disHexB( s, b ) _disHexB( &(s), (b) )
#define disHexW( s, w ) _disHexW( &(s), (w) )
#define disPuts( s, from ) _disPuts( &(s), (from) )
#define disPrintf( s, fmt, args... ) _disPrintf( (s), sizeof(s), (fmt), ##args )
// TODO: We should add a new field for clk counter, so we can print that out _before_ execution, not after...
#define disNewInstruction() _disNewInstruction()
#ifdef DISASS_TRACE
extern void printDisassembly( FILE * f );
#endif
#else // DISASS_TRACE
#define disHexB( to, b )
#define disHexW( to, w )
#define disPuts( to, from )
#define disPrintf( s, fmt, args... )
#define disNewInstruction()
#define printDisassembly( f )
#endif // DISASS_TRACE
extern const char * disassemblyLine(_Bool higlight);
extern int m6502_Disass_1_Instr(void);
#endif /* _6502_dis_h */

196
src/cpu/6502_dis_utils.c Normal file
View File

@ -0,0 +1,196 @@
//
// 6502_dis_utils.c
// A2Mac
//
// Created by Tamas Rudnai on 3/13/22.
// Copyright © 2022 GameAlloy. All rights reserved.
//
#define DISASSEMBLER
#include <stdio.h>
#include <string.h>
#include <stdarg.h>
#include "6502_dis_utils.h"
#include "6502.h"
#include "6502_bp.h"
disassembly_t disassembly;
unsigned long long discnt = 0;
INLINE flags_t getFlags2(void) {
flags_t f = {
m6502.C != 0, // Carry Flag
m6502.Z != 0, // Zero Flag
m6502.I != 0, // Interrupt Flag
m6502.D != 0, // Decimal Flag
m6502.B != 0, // B Flag
m6502.res != 0, // reserved -- should be always 1
m6502.V != 0, // Overflow Flag ???
m6502.N != 0, // Negative Flag
};
return f;
}
void _disHexB( char ** s, const uint8_t b ) {
// if ( m6502.dbgLevel.trace ) {
if ( (*s >= disassembly.opcode) && (*s < disassembly.opcode + sizeof(disassembly.opcode)) ) {
snprintf(*s, 4, "%02X ", b);
*s += 3;
}
else {
fprintf(stderr, "_disHexB *s is WRONG! (%p vs %p)\n", *s, disassembly.opcode);
}
// }
}
void _disHexW( char ** s, const uint16_t w ) {
// if ( m6502.dbgLevel.trace ) {
snprintf(*s, 6, "%04X ", w);
*s += 5;
// }
}
void _disPuts( char ** s, const char * from ) {
// if ( m6502.dbgLevel.trace ) {
while ( (*(*s)++ = *from++) );
// }
}
void _disPrintf( char * s, const size_t n, const char * fmt, ... ) {
// if ( m6502.dbgLevel.trace ) {
va_list arg_ptr;
va_start(arg_ptr, fmt);
vsnprintf( s, n, fmt, arg_ptr );
va_end(arg_ptr);
// }
}
INLINE uint8_t memread8_low( uint16_t addr );
void _disNewInstruction(void) {
// if ( m6502.dbgLevel.trace ) {
memset( &disassembly, 0, sizeof(disassembly) );
disassembly.clk = m6502.clktime + m6502.clkfrm;
disassembly.addr = m6502.PC;
snprintf(disassembly.hexAddr, 5, "%04X ", m6502.PC);
disassembly.pOpcode = disassembly.opcode;
disassembly.opcode[0] = '\0';
disassembly.inst[0] = '\0';
disassembly.oper[0] = '\0';
disassembly.comment[0] = '\0';
// }
disassembly.op = memread8_low(m6502.PC);
}
#ifdef DISASS_TRACE
void printDisassembly( FILE * f ) {
if ( m6502.debugger.mask.trace && f ) {
// fprintf( f, "%s: %-14s%-6s%-14s%-16s A:%02X X:%02X Y:%02X S:%02X P:%02X (%c%c%c%c%c%c%c%c)\n",
// disassembly.addr,
// disassembly.opcode,
// disassembly.inst,
// disassembly.oper,
// disassembly.comment,
// m6502.A,
// m6502.X,
// m6502.Y,
// m6502.SP,
// m6502.SR,
// m6502.N ? 'N' : 'n',
// m6502.V ? 'V' : 'v',
// m6502.res ? 'R' : 'r',
// m6502.B ? 'B' : 'b',
// m6502.D ? 'D' : 'd',
// m6502.I ? 'I' : 'i',
// m6502.Z ? 'Z' : 'z',
// m6502.C ? 'C' : 'c'
// );
// fprintf( f, "%llu\t%llu %s: %-11s%-4s%s\t0x%02X\t0x%02X\t0x%02X\t0x%02X\t0x%02X\t;\t%s\n", // Virtual ][ style
// ++discnt,
// m6502.clktime + clkfrm,
// disassembly.addr,
// disassembly.opcode,
// disassembly.inst,
// disassembly.oper,
// m6502.A,
// m6502.X,
// m6502.Y,
// 0,
// //getFlags2(),
// m6502.SP,
// disassembly.comment
// );
// // Virtual ][ Style
// fprintf( f, "%llu\t%llu\t%s: %-11s%-4s%s\t0x%02X\t0x%02X\t0x%02X\t0x%02X\t0x%02X\n", // Virtual ][ style
// ++discnt,
// disassembly.clk,
// disassembly.addr,
// disassembly.opcode,
// disassembly.inst,
// disassembly.oper,
// m6502.A,
// m6502.X,
// m6502.Y,
// getFlags2().SR,
// m6502.SP
// );
static char line[256];
// Steve ][ Style
snprintf( line, sizeof(line), "%10llu %10llu %s: %-11s%-4s%s", // Steve ][ style
++discnt,
disassembly.clk,
disassembly.hexAddr,
disassembly.opcode,
disassembly.inst,
disassembly.oper
);
fprintf( f, "%-55s; 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X ; %s\n", // Steve ][ style
line,
m6502.A,
m6502.X,
m6502.Y,
getFlags2().SR,
m6502.SP,
disassembly.comment
);
}
}
#endif // DISASS_TRACE
const char * disassemblyLine(_Bool highlight) {
static char line[256];
snprintf( line, sizeof(line), "%s %s: %-11s%-4s%s",
m6502_dbg_bp_exists(breakpoints, disassembly.addr) ? "*" : " ",
disassembly.hexAddr,
disassembly.opcode,
disassembly.inst,
disassembly.oper
);
if (highlight) {
for (int i = 0; i < sizeof(line); i++) {
line[i] &= 0x3F;
}
}
return line;
}

93
src/cpu/6502_dis_utils.h Normal file
View File

@ -0,0 +1,93 @@
//
// 6502_dis_utils.h
// Steve ][
//
// Created by Tamas Rudnai on 9/21/19.
// Copyright © 2019, 2020 Tamas Rudnai. All rights reserved.
//
// This file is part of Steve ][ -- The Apple ][ Emulator.
//
// Steve ][ is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// Steve ][ is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with Steve ][. If not, see <https://www.gnu.org/licenses/>.
//
#ifndef _6502_dis_utils_h
#define _6502_dis_utils_h
#include "common.h"
#define DISASS_ADDR_LEN 5 // 4 digits + \0
#define DISASS_OPCODE_LEN (4 * 3 + 1) // max 4 bytes * (2 digits + 1 space) + \0
#define DISASS_INST_LEN (6 + 1) // 3 char (unknown instr? -- give it 6 chars) + \0
#define DISASS_OPER_LEN (14 + 2 + 1 + 1 + 1) // 4 digits + 2 brackets + 1 comma + 1 index + \0
#define DISASS_COMM_LEN 256 // 255 char + \0
typedef struct disassembly_s {
uint64_t clk; // clock time
uint8_t op; // opcode
uint16_t addr;
char hexAddr[DISASS_ADDR_LEN]; // 4 digits + \0
char opcode[DISASS_OPCODE_LEN]; // max 4 bytes * (2 digits + 1 space) + \0
char * pOpcode; // pointer for opcode string builder
char inst[DISASS_INST_LEN]; // 3 char (unknown instr? -- give it 6 chars) + \0
char oper[DISASS_OPER_LEN]; // 4 digits + 2 brackets + 1 comma + 1 index + \0
char comment[DISASS_COMM_LEN]; // to be able to add some comments
} disassembly_t;
extern disassembly_t disassembly;
//#define DISASS_TRACE
//#undef DISASS_TRACE
extern unsigned long long discnt;
//extern unsigned long long int clktime;
extern void _disHexB( char ** s, const uint8_t b );
extern void _disHexW( char ** s, const uint16_t w );
extern void _disPuts( char ** s, const char * from );
extern void _disPrintf( char * s, const size_t n, const char * fmt, ... );
extern void _disNewInstruction(void);
#if defined(DISASS_TRACE) || defined(DISASSEMBLER)
#define disHexB( s, b ) _disHexB( &(s), (b) )
#define disHexW( s, w ) _disHexW( &(s), (w) )
#define disPuts( s, from ) _disPuts( &(s), (from) )
#define disPrintf( s, fmt, args... ) _disPrintf( (s), sizeof(s), (fmt), ##args )
// TODO: We should add a new field for clk counter, so we can print that out _before_ execution, not after...
#define disNewInstruction() _disNewInstruction()
#ifdef DISASS_TRACE
extern void printDisassembly( FILE * f );
#endif
#else // DISASS_TRACE
#define disHexB( to, b )
#define disHexW( to, w )
#define disPuts( to, from )
#define disPrintf( s, fmt, args... )
#define disNewInstruction()
#define printDisassembly( f )
#endif // DISASS_TRACE
extern const char * disassemblyLine(_Bool higlight);
#endif /* _6502_dis_utils_h */

2
src/cpu/6502_vanilla.c
View File

@ -104,7 +104,7 @@ m6502_t m6502 = {
disassembly_t disassembly;
#include "6502_dis.h"
#include "6502_dis_utils.h"
#include "../dev/mem/mmio.h"

2
src/cpu/65C02.c
View File

@ -120,7 +120,7 @@ m6502_t m6502 = {
disassembly_t disassembly;
#include "6502_dis.h"
#include "6502_dis_utils.h"
#include "../dev/mem/mmio.h"

8
src/cpu/instructions/6502_instr_arithmetic.h
View File

@ -45,7 +45,7 @@
(indirect),Y ADC (oper),Y 71 2 5*
**/
#ifndef DISASSEMBLER
INLINE void _ADC( uint8_t src ) {
INSTR void _ADC( uint8_t src ) {
uint16_t tmp;
// V = C7 != C6
@ -81,7 +81,7 @@ INLINE void _ADC( uint8_t src ) {
}
#endif
INLINE void ADC( uint8_t src ) {
INSTR void ADC( uint8_t src ) {
dbgPrintf("ADC(%02X) ", src);
disPrintf(disassembly.inst, "ADC");
@ -108,7 +108,7 @@ INLINE void ADC( uint8_t src ) {
(indirect),Y SBC (oper),Y F1 2 5*
**/
#ifndef DISASSEMBLER
INLINE void _SBC( uint8_t src ) {
INSTR void _SBC( uint8_t src ) {
uint16_t tmp;
if( m6502.D ) {
@ -134,7 +134,7 @@ INLINE void _SBC( uint8_t src ) {
set_flags_NZ( m6502.A = tmp );
}
#endif
INLINE void SBC( uint8_t src ) {
INSTR void SBC( uint8_t src ) {
dbgPrintf("SBC(%02X) ", src);
disPrintf(disassembly.inst, "SBC");

10
src/cpu/instructions/6502_instr_call_ret_jump.h
View File

@ -36,7 +36,7 @@
absolute JMP oper 4C 3 3
indirect JMP (oper) 6C 3 5
**/
INLINE void JMP( uint16_t addr ) {
INSTR void JMP( uint16_t addr ) {
dbgPrintf("JMP %04X ", addr);
disPrintf(disassembly.inst, "JMP");
@ -55,6 +55,7 @@ INLINE void JMP( uint16_t addr ) {
}
#if !defined(DISASSEMBLER) && !defined(DEBUGGER)
// for patching game purposes -- it should not be inline!
void CALL( uint16_t addr ) {
dbgPrintf("CALL ");
@ -72,6 +73,7 @@ void JUMP( uint16_t addr ) {
disPrintf(disassembly.inst, "JUMP");
m6502.PC = addr;
}
#endif
/**
JSR Jump to New Location Saving Return Address
@ -84,7 +86,7 @@ void JUMP( uint16_t addr ) {
--------------------------------------------
absolute JSR oper 20 3 6
**/
INLINE void JSR( uint16_t addr ) {
INSTR void JSR( uint16_t addr ) {
dbgPrintf("JSR ");
disPrintf(disassembly.inst, "JSR");
@ -104,7 +106,7 @@ INLINE void JSR( uint16_t addr ) {
--------------------------------------------
implied RTS 60 1 6
**/
INLINE void RTS() {
INSTR void RTS() {
dbgPrintf("RTS ");
disPrintf(disassembly.inst, "RTS");
@ -130,7 +132,7 @@ INLINE void RTS() {
--------------------------------------------
implied RTI 40 1 6
**/
INLINE void RTI() {
INSTR void RTI() {
dbgPrintf("RTI ");
disPrintf(disassembly.inst, "RTI");

14
src/cpu/instructions/6502_instr_compare_test.h
View File

@ -39,7 +39,7 @@
absolute BIT oper 2C 3 4
**/
INLINE void BIT( uint8_t src ) {
INSTR void BIT( uint8_t src ) {
dbgPrintf("BIT(%02X) ", src);
disPrintf(disassembly.inst, "BIT");
@ -71,7 +71,7 @@ INLINE void BIT( uint8_t src ) {
1C 3 6 abs ......Z. TRB $3456
**/
INLINE void TRB( uint16_t addr ) {
INSTR void TRB( uint16_t addr ) {
dbgPrintf("TRB(%02X) ", src);
disPrintf(disassembly.inst, "TRB");
@ -101,7 +101,7 @@ INLINE void TRB( uint16_t addr ) {
0C 3 6 abs ......Z. TSB $3456
**/
INLINE void TSB( uint16_t addr ) {
INSTR void TSB( uint16_t addr ) {
dbgPrintf("TSB(%02X) ", src);
disPrintf(disassembly.inst, "TSB");
@ -129,11 +129,11 @@ INLINE void TSB( uint16_t addr ) {
(indirect),Y CMP (oper),Y D1 2 5*
**/
#ifndef DISASSEMBLER
INLINE void _CMP( uint8_t src ) {
INSTR void _CMP( uint8_t src ) {
set_flags_NZC( (int16_t)m6502.A - src );
}
#endif
INLINE void CMP( uint8_t src ) {
INSTR void CMP( uint8_t src ) {
dbgPrintf("CMP(%02X) ", src);
disPrintf(disassembly.inst, "CMP");
@ -154,7 +154,7 @@ INLINE void CMP( uint8_t src ) {
zeropage CPX oper E4 2 3
absolute CPX oper EC 3 4
**/
INLINE void CPX( uint8_t src ) {
INSTR void CPX( uint8_t src ) {
dbgPrintf("CPX(%02X) ", src);
disPrintf(disassembly.inst, "CPX");
@ -175,7 +175,7 @@ INLINE void CPX( uint8_t src ) {
zeropage CPY oper C4 2 3
absolute CPY oper CC 3 4
**/
INLINE void CPY( uint8_t src ) {
INSTR void CPY( uint8_t src ) {
dbgPrintf("CPY(%02X) ", src);
disPrintf(disassembly.inst, "CPY");

20
src/cpu/instructions/6502_instr_inc_dec.h
View File

@ -39,11 +39,11 @@
absolute,X INC oper,X FE 3 7
**/
#ifndef DISASSEMBLER
INLINE void _INC( uint16_t addr ) {
INSTR void _INC( uint16_t addr ) {
set_flags_NZ( ++(WRLOMEM[addr]) );
}
#endif
INLINE void INC( uint16_t addr ) {
INSTR void INC( uint16_t addr ) {
disPrintf(disassembly.inst, "INC");
#ifndef DISASSEMBLER
@ -61,7 +61,7 @@ INLINE void INC( uint16_t addr ) {
--------------------------------------------
implied INX E8 1 2
**/
INLINE void INX() {
INSTR void INX() {
dbgPrintf("INX %02X -> ", m6502.X);
disPrintf(disassembly.inst, "INX");
@ -81,7 +81,7 @@ INLINE void INX() {
--------------------------------------------
implied INY C8 1 2
**/
INLINE void INY() {
INSTR void INY() {
dbgPrintf("INY %02X -> ", m6502.Y);
disPrintf(disassembly.inst, "INY");
@ -101,7 +101,7 @@ INLINE void INY() {
--------------------------------------------
implied INA C8 1 2
**/
INLINE void INA() {
INSTR void INA() {
dbgPrintf("INA %02X -> ", m6502.A);
disPrintf(disassembly.inst, "INA");
@ -125,11 +125,11 @@ INLINE void INA() {
absolute,X DEC oper,X DE 3 7
**/
#ifndef DISASSEMBLER
INLINE void _DEC( uint16_t addr ) {
INSTR void _DEC( uint16_t addr ) {
set_flags_NZ( --(WRLOMEM[addr]) );
}
#endif
INLINE void DEC( uint16_t addr ) {
INSTR void DEC( uint16_t addr ) {
disPrintf(disassembly.inst, "DEC");
#ifndef DISASSEMBLER
@ -147,7 +147,7 @@ INLINE void DEC( uint16_t addr ) {
--------------------------------------------
implied DEC CA 1 2
**/
INLINE void DEX() {
INSTR void DEX() {
dbgPrintf("DEX %02X -> ", m6502.X);
disPrintf(disassembly.inst, "DEX");
@ -167,7 +167,7 @@ INLINE void DEX() {
--------------------------------------------
implied DEC 88 1 2
**/
INLINE void DEY() {
INSTR void DEY() {
dbgPrintf("DEY %02X -> ", m6502.Y);
disPrintf(disassembly.inst, "DEY");
@ -187,7 +187,7 @@ addressing assembler opc bytes cyles
--------------------------------------------
implied DEC 88 1 2
**/
INLINE void DEA() {
INSTR void DEA() {
dbgPrintf("DEA %02X -> ", m6502.A);
disPrintf(disassembly.inst, "DEA");

16
src/cpu/instructions/6502_instr_load_store.h
View File

@ -45,7 +45,7 @@
(indirect,X) LDA (oper,X) A1 2 6
(indirect),Y LDA (oper),Y B1 2 5*
**/
INLINE void LDA( uint8_t src ) {
INSTR void LDA( uint8_t src ) {
dbgPrintf("LDA(%02X) ", src);
disPrintf(disassembly.inst, "LDA");
#ifndef DISASSEMBLER
@ -67,7 +67,7 @@ INLINE void LDA( uint8_t src ) {
absolute LDX oper AE 3 4
absolute,Y LDX oper,Y BE 3 4*
**/
INLINE void LDX( uint8_t src ) {
INSTR void LDX( uint8_t src ) {
dbgPrintf("LDX(%02X) ", src);
disPrintf(disassembly.inst, "LDX");
#ifndef DISASSEMBLER
@ -89,7 +89,7 @@ INLINE void LDX( uint8_t src ) {
absolute LDY oper AC 3 4
absolute,X LDY oper,X BC 3 4*
**/
INLINE void LDY( uint8_t src ) {
INSTR void LDY( uint8_t src ) {
dbgPrintf("LDY(%02X) ", src);
disPrintf(disassembly.inst, "LDY");
#ifndef DISASSEMBLER
@ -111,7 +111,7 @@ char * charConv =
(not a real instruction, only a helper function)
**/
INLINE void STR( uint16_t addr, uint8_t src ) {
INSTR void STR( uint16_t addr, uint8_t src ) {
dbgPrintf("STR [%04X], %02X ", addr, src );
#ifndef DISASSEMBLER
memwrite(addr, src);
@ -134,7 +134,7 @@ INLINE void STR( uint16_t addr, uint8_t src ) {
(indirect,X) STA (oper,X) 81 2 6
(indirect),Y STA (oper),Y 91 2 6
**/
INLINE void STA( uint16_t addr ) {
INSTR void STA( uint16_t addr ) {
dbgPrintf("STA ");
disPrintf(disassembly.inst, "STA");
#ifndef DISASSEMBLER
@ -154,7 +154,7 @@ INLINE void STA( uint16_t addr ) {
zeropage,Y STX oper,Y 96 2 4
absolute STX oper 8E 3 4
**/
INLINE void STX( uint16_t addr ) {
INSTR void STX( uint16_t addr ) {
dbgPrintf("STX ");
disPrintf(disassembly.inst, "STX");
#ifndef DISASSEMBLER
@ -174,7 +174,7 @@ INLINE void STX( uint16_t addr ) {
zeropage,X STY oper,X 94 2 4
absolute STY oper 8C 3 4
**/
INLINE void STY( uint16_t addr ) {
INSTR void STY( uint16_t addr ) {
dbgPrintf("STY ");
disPrintf(disassembly.inst, "STY");
#ifndef DISASSEMBLER
@ -195,7 +195,7 @@ INLINE void STY( uint16_t addr ) {
9C 3 4 abs ........ STZ $3456
9E 3 5 abs,X ........ STZ $3456,X
**/
INLINE void STZ( uint16_t addr ) {
INSTR void STZ( uint16_t addr ) {
dbgPrintf("STZ ");
disPrintf(disassembly.inst, "STZ");
#ifndef DISASSEMBLER

10
src/cpu/instructions/6502_instr_logic.h
View File

@ -43,11 +43,11 @@
(indirect),Y ORA (oper),Y 11 2 5*
**/
#ifndef DISASSEMBLER
INLINE void _ORA( uint8_t src ) {
INSTR void _ORA( uint8_t src ) {
set_flags_NZ( m6502.A |= src );
}
#endif
INLINE void ORA( uint8_t src ) {
INSTR void ORA( uint8_t src ) {
dbgPrintf("ORA(%02X) ", src);
disPrintf(disassembly.inst, "ORA");
@ -74,11 +74,11 @@ INLINE void ORA( uint8_t src ) {
(indirect),Y AND (oper),Y 31 2 5*
**/
#ifndef DISASSEMBLER
INLINE void _AND( uint8_t src ) {
INSTR void _AND( uint8_t src ) {
set_flags_NZ( m6502.A &= src );
}
#endif
INLINE void AND( uint8_t src ) {
INSTR void AND( uint8_t src ) {
dbgPrintf("AND(%02X) ", src);
disPrintf(disassembly.inst, "AND");
@ -104,7 +104,7 @@ INLINE void AND( uint8_t src ) {
(indirect,X) EOR (oper,X) 41 2 6
(indirect),Y EOR (oper),Y 51 2 5*
**/
INLINE void EOR( uint8_t src ) {
INSTR void EOR( uint8_t src ) {
dbgPrintf("EOR(%02X) ", src);
disPrintf(disassembly.inst, "EOR");

6
src/cpu/instructions/6502_instr_misc.h
View File

@ -35,7 +35,7 @@
--------------------------------------------
implied BRK 00 1 7
**/
INLINE int BRK() {
INSTR int BRK() {
dbgPrintf("BRK ");
disPrintf(disassembly.inst, "BRK");
@ -54,7 +54,7 @@ INLINE int BRK() {
/**
HLT / JAM / KIL Halts (Hangs / Jams / Kills) the CPU - Well, it hangs it untill the next power cycle
**/
INLINE void HLT() {
INSTR void HLT() {
disPrintf(disassembly.inst, "HLT");
#ifndef DISASSEMBLER
@ -72,7 +72,7 @@ INLINE void HLT() {
--------------------------------------------
implied NOP EA 1 2
**/
INLINE void NOP() {
INSTR void NOP() {
dbgPrintf("NOP ");
disPrintf(disassembly.inst, "NOP");
}

22
src/cpu/instructions/6502_instr_set_clr.h
View File

@ -34,7 +34,7 @@
--------------------------------------------
implied CLC 18 1 2
**/
INLINE void CLC() {
INSTR void CLC() {
dbgPrintf("CLC ");
disPrintf(disassembly.inst, "CLC");
#ifndef DISASSEMBLER
@ -52,7 +52,7 @@ INLINE void CLC() {
--------------------------------------------
implied CLD D8 1 2
**/
INLINE void CLD() {
INSTR void CLD() {
dbgPrintf("CLD ");
disPrintf(disassembly.inst, "CLD");
#ifndef DISASSEMBLER
@ -70,7 +70,7 @@ INLINE void CLD() {
--------------------------------------------
implied CLI 58 1 2
**/
INLINE void CLI() {
INSTR void CLI() {
dbgPrintf("CLI ");
disPrintf(disassembly.inst, "CLI");
#ifndef DISASSEMBLER
@ -88,7 +88,7 @@ INLINE void CLI() {
--------------------------------------------
implied CLV B8 1 2
**/
INLINE void CLV() {
INSTR void CLV() {
dbgPrintf("CLV ");
disPrintf(disassembly.inst, "CLV");
#ifndef DISASSEMBLER
@ -106,7 +106,7 @@ INLINE void CLV() {
--------------------------------------------
implied SEC 38 1 2
**/
INLINE void SEC() {
INSTR void SEC() {
dbgPrintf("SEC ");
disPrintf(disassembly.inst, "SEC");
#ifndef DISASSEMBLER
@ -124,7 +124,7 @@ INLINE void SEC() {
--------------------------------------------
implied SED F8 1 2
**/
INLINE void SED() {
INSTR void SED() {
dbgPrintf("SED ");
disPrintf(disassembly.inst, "SED");
#ifndef DISASSEMBLER
@ -142,7 +142,7 @@ INLINE void SED() {
--------------------------------------------
implied SEI 78 1 2
**/
INLINE void SEI() {
INSTR void SEI() {
dbgPrintf("SEI ");
disPrintf(disassembly.inst, "SEI");
#ifndef DISASSEMBLER
@ -190,13 +190,13 @@ INLINE void SEI() {
F7 2 5 zp ........ SMB7 $12
**/
#ifndef DISASSEMBLER
#define RMB(n) INLINE void RMB##n( uint8_t zpg ) { \
#define RMB(n) INSTR void RMB##n( uint8_t zpg ) { \
dbgPrintf("RMB"#n" "); \
disPrintf(disassembly.inst, "RMB"#n); \
WRLOMEM[zpg] &= ~(1 << n); \
}
#else
#define RMB(n) INLINE void RMB##n( uint8_t zpg ) { \
#define RMB(n) INSTR void RMB##n( uint8_t zpg ) { \
dbgPrintf("RMB"#n" "); \
disPrintf(disassembly.inst, "RMB"#n); \
}
@ -213,13 +213,13 @@ INLINE void SEI() {
#ifndef DISASSEMBLER
#define SMB(n) INLINE void SMB##n( uint8_t zpg ) { \
#define SMB(n) INSTR void SMB##n( uint8_t zpg ) { \
dbgPrintf("SMB"#n" "); \
disPrintf(disassembly.inst, "SMB"#n); \
WRLOMEM[zpg] |= (1 << n); \
}
#else
#define SMB(n) INLINE void SMB##n( uint8_t zpg ) { \
#define SMB(n) INSTR void SMB##n( uint8_t zpg ) { \
dbgPrintf("SMB"#n" "); \
disPrintf(disassembly.inst, "SMB"#n); \
}

22
src/cpu/instructions/6502_instr_shift_rotate.h
View File

@ -40,12 +40,12 @@
absolute,X ASL oper,X 1E 3 7
**/
#ifndef DISASSEMBLER
INLINE void _ASL( uint16_t addr ) {
INSTR void _ASL( uint16_t addr ) {
m6502.C = memread(addr) & 0x80;
set_flags_NZ( WRLOMEM[addr] <<= 1 );
}
#endif
INLINE void ASL( uint16_t addr ) {
INSTR void ASL( uint16_t addr ) {
dbgPrintf("ASL ");
disPrintf(disassembly.inst, "ASL");
@ -53,7 +53,7 @@ INLINE void ASL( uint16_t addr ) {
_ASL(addr);
#endif
}
INLINE void ASLA() {
INSTR void ASLA() {
dbgPrintf("ASL ");
disPrintf(disassembly.inst, "ASL");
@ -77,7 +77,7 @@ INLINE void ASLA() {
absolute LSR oper 4E 3 6
absolute,X LSR oper,X 5E 3 7
**/
INLINE void LSR( uint16_t addr ) {
INSTR void LSR( uint16_t addr ) {
dbgPrintf("LSR ");
disPrintf(disassembly.inst, "LSR");
@ -86,7 +86,7 @@ INLINE void LSR( uint16_t addr ) {
set_flags_NZ( WRLOMEM[addr] >>= 1 );
#endif
}
INLINE void LSRA() {
INSTR void LSRA() {
dbgPrintf("LSR ");
disPrintf(disassembly.inst, "LSR");
@ -111,14 +111,14 @@ INLINE void LSRA() {
absolute,X ROL oper,X 3E 3 7
**/
#ifndef DISASSEMBLER
INLINE void _ROL( uint16_t addr ) {
INSTR void _ROL( uint16_t addr ) {
uint8_t C = m6502.C != 0;
m6502.C = WRLOMEM[addr] & 0x80;
WRLOMEM[addr] <<= 1;
set_flags_NZ( WRLOMEM[addr] |= C );
}
#endif
INLINE void ROL( uint16_t addr ) {
INSTR void ROL( uint16_t addr ) {
dbgPrintf("ROL ");
disPrintf(disassembly.inst, "ROL");
@ -126,7 +126,7 @@ INLINE void ROL( uint16_t addr ) {
_ROL(addr);
#endif
}
INLINE void ROLA() {
INSTR void ROLA() {
dbgPrintf("ROL ");
disPrintf(disassembly.inst, "ROL");
@ -153,14 +153,14 @@ INLINE void ROLA() {
absolute,X ROR oper,X 7E 3 7
**/
#ifndef DISASSEMBLER
INLINE void _ROR( uint16_t addr ) {
INSTR void _ROR( uint16_t addr ) {
uint8_t C = m6502.C != 0;
m6502.C = WRLOMEM[addr] & 1;
WRLOMEM[addr] >>= 1;
set_flags_NZ( WRLOMEM[addr] |= C << 7 );
}
#endif
INLINE void ROR( uint16_t addr ) {
INSTR void ROR( uint16_t addr ) {
dbgPrintf("ROR ");
disPrintf(disassembly.inst, "ROR");
@ -168,7 +168,7 @@ INLINE void ROR( uint16_t addr ) {
_ROR(addr);
#endif
}
INLINE void RORA() {
INSTR void RORA() {
dbgPrintf("ROR ");
disPrintf(disassembly.inst, "ROR");

24
src/cpu/instructions/6502_instr_stack.h
View File

@ -28,22 +28,22 @@ static const uint16_t stack_base_addr = 0x100;
#ifndef DISASSEMBLER
INLINE void PUSH( uint8_t src ) {
INSTR void PUSH( uint8_t src ) {
// DO NOT MAKE IT NICER! faster this way!
WRLOMEM[ stack_base_addr | m6502.SP-- ] = src;
}
INLINE uint8_t POP() {
INSTR uint8_t POP() {
return Apple2_64K_MEM[ stack_base_addr | ++m6502.SP ];
}
INLINE void PUSH_addr( uint16_t addr ) {
INSTR void PUSH_addr( uint16_t addr ) {
PUSH( (uint8_t)(addr >> 8) );
PUSH( (uint8_t)addr );
}
INLINE uint16_t POP_addr() {
INSTR uint16_t POP_addr() {
return POP() + ( POP() << 8 );
}
#endif
@ -58,7 +58,7 @@ INLINE uint16_t POP_addr() {
--------------------------------------------
implied PHA 48 1 3
**/
INLINE void PHA() {
INSTR void PHA() {
dbgPrintf("PHA %02X ", m6502.A);
disPrintf(disassembly.inst, "PHA");
@ -77,7 +77,7 @@ INLINE void PHA() {
--------------------------------------------
implied PHX 48 1 3
**/
INLINE void PHX() {
INSTR void PHX() {
dbgPrintf("PHX %02X ", m6502.X);
disPrintf(disassembly.inst, "PHX");
@ -96,7 +96,7 @@ INLINE void PHX() {
--------------------------------------------
implied PHY 48 1 3
**/
INLINE void PHY() {
INSTR void PHY() {
dbgPrintf("PHY %02X ", m6502.Y);
disPrintf(disassembly.inst, "PHY");
@ -115,7 +115,7 @@ INLINE void PHY() {
--------------------------------------------
implied PLA 68 1 4
**/
INLINE void PLA() {
INSTR void PLA() {
#ifndef DISASSEMBLER
m6502.A = POP();
#endif
@ -138,7 +138,7 @@ INLINE void PLA() {
--------------------------------------------
implied PLX 68 1 4
**/
INLINE void PLX() {
INSTR void PLX() {
#ifndef DISASSEMBLER
m6502.X = POP();
#endif
@ -161,7 +161,7 @@ INLINE void PLX() {
--------------------------------------------
implied PLY 68 1 4
**/
INLINE void PLY() {
INSTR void PLY() {
#ifndef DISASSEMBLER
m6502.Y = POP();
#endif
@ -184,7 +184,7 @@ INLINE void PLY() {
--------------------------------------------
implied PHP 08 1 3
**/
INLINE void PHP() {
INSTR void PHP() {
dbgPrintf("PHP %02X ", m6502.SR);
disPrintf(disassembly.inst, "PHP");
@ -203,7 +203,7 @@ INLINE void PHP() {
--------------------------------------------
implied PLP 28 1 4
**/
INLINE void PLP() {
INSTR void PLP() {
#ifndef DISASSEMBLER
setFlags(POP() | 0x30); // res and B flag should be set
#endif

12
src/cpu/instructions/6502_instr_transfer.h
View File

@ -35,7 +35,7 @@
--------------------------------------------
implied TAX AA 1 2
**/
INLINE void TAX() {
INSTR void TAX() {
dbgPrintf("TAX(%02X) ", m6502.A);
disPrintf(disassembly.inst, "TAX");
@ -54,7 +54,7 @@ INLINE void TAX() {
--------------------------------------------
implied TXA 8A 1 2
**/
INLINE void TXA() {
INSTR void TXA() {
dbgPrintf("TXA(%02X) ", m6502.X);
disPrintf(disassembly.inst, "TXA");
@ -74,7 +74,7 @@ INLINE void TXA() {
--------------------------------------------
implied TAY A8 1 2
**/
INLINE void TAY() {
INSTR void TAY() {
dbgPrintf("TAY ");
disPrintf(disassembly.inst, "TAY");
@ -93,7 +93,7 @@ INLINE void TAY() {
--------------------------------------------
implied TYA 98 1 2
**/
INLINE void TYA() {
INSTR void TYA() {
dbgPrintf("TYA(%02X) ", m6502.Y);
disPrintf(disassembly.inst, "TYA");
@ -112,7 +112,7 @@ INLINE void TYA() {
--------------------------------------------
implied TSX BA 1 2
**/
INLINE void TSX() {
INSTR void TSX() {
dbgPrintf("TSX(%02X) ", m6502.SP);
disPrintf(disassembly.inst, "TSX");
@ -131,7 +131,7 @@ INLINE void TSX() {
--------------------------------------------
implied TXS 9A 1 2
**/
INLINE void TXS() {
INSTR void TXS() {
dbgPrintf("TXS(%02X) ", m6502.X);
disPrintf(disassembly.inst, "TXS");

36
src/cpu/instructions/6502_instr_undoc.h
View File

@ -32,7 +32,7 @@ ANC - "AND" Memory with Accumulator
(M "AND" A) -> A
THEN msb(A) -> C
**/
INLINE void ANC ( uint8_t src ) {
INSTR void ANC ( uint8_t src ) {
disPrintf(disassembly.inst, "ANC");
#ifndef DISASSEMBLER
@ -52,7 +52,7 @@ INLINE void ANC ( uint8_t src ) {
THEN msb(A) -> C
THEN ROR A
**/
INLINE void ARC ( uint8_t src ) {
INSTR void ARC ( uint8_t src ) {
disPrintf(disassembly.inst, "ARC");
#ifndef DISASSEMBLER
@ -74,7 +74,7 @@ INLINE void ARC ( uint8_t src ) {
(M "AND" A) -> A
THEN LSR A
**/
INLINE void ASR ( uint8_t src ) {
INSTR void ASR ( uint8_t src ) {
disPrintf(disassembly.inst, "ASR");
#ifndef DISASSEMBLER
@ -95,7 +95,7 @@ INLINE void ASR ( uint8_t src ) {
(M - 1) -> M
THEN CMP M
**/
INLINE void DCP ( uint16_t addr ) {
INSTR void DCP ( uint16_t addr ) {
disPrintf(disassembly.inst, "DCP");
#ifndef DISASSEMBLER
_DEC(addr);
@ -107,7 +107,7 @@ INLINE void DCP ( uint16_t addr ) {
/**
LAS - Stores {adr} & S into A, X and S
**/
INLINE void LAS ( uint8_t src ) {
INSTR void LAS ( uint8_t src ) {
disPrintf(disassembly.inst, "LAS");
#ifndef DISASSEMBLER
set_flags_NZ( m6502.A = m6502.X = m6502.SP = m6502.SP & src );
@ -122,7 +122,7 @@ INLINE void LAS ( uint8_t src ) {
(M + 1) -> M
THEN (A - M - ~C) -> A
**/
INLINE void ISB ( uint16_t addr ) {
INSTR void ISB ( uint16_t addr ) {
disPrintf(disassembly.inst, "ISB");
#ifndef DISASSEMBLER
_INC(addr);
@ -136,7 +136,7 @@ INLINE void ISB ( uint16_t addr ) {
M -> X,A
**/
INLINE void LAX ( uint8_t src ) {
INSTR void LAX ( uint8_t src ) {
disPrintf(disassembly.inst, "LAX");
#ifndef DISASSEMBLER
set_flags_NZ(m6502.A = m6502.X = src);
@ -151,7 +151,7 @@ INLINE void LAX ( uint8_t src ) {
ROL M
AND M
**/
INLINE void RLA ( uint16_t addr ) {
INSTR void RLA ( uint16_t addr ) {
disPrintf(disassembly.inst, "RLA");
#ifndef DISASSEMBLER
@ -168,7 +168,7 @@ INLINE void RLA ( uint16_t addr ) {
ROR M
ADC M
**/
INLINE void RRA ( uint16_t addr ) {
INSTR void RRA ( uint16_t addr ) {
disPrintf(disassembly.inst, "RRA");
#ifndef DISASSEMBLER
_ROR(addr);
@ -185,7 +185,7 @@ INLINE void RRA ( uint16_t addr ) {
THEN (SP "AND" (MSB(adr)+1)) -> M
**/
INLINE void SAS ( uint16_t addr ) {
INSTR void SAS ( uint16_t addr ) {
disPrintf(disassembly.inst, "SAS");
#ifndef DISASSEMBLER
m6502.SP = m6502.A & m6502.X;
@ -215,7 +215,7 @@ INLINE void SAS ( uint16_t addr ) {
be ignored in the subtraction but set according to the result.
**/
INLINE void SBX ( uint8_t src ) {
INSTR void SBX ( uint8_t src ) {
disPrintf(disassembly.inst, "SBX");
#ifndef DISASSEMBLER
@ -237,7 +237,7 @@ INLINE void SBX ( uint8_t src ) {
(X "AND" A "AND" addr.H) -> M
**/
INLINE void SHA ( uint16_t addr ) {
INSTR void SHA ( uint16_t addr ) {
disPrintf(disassembly.inst, "SHA");
#ifndef DISASSEMBLER
set_flags_NZ( WRLOMEM[addr] = m6502.X & m6502.A & ((addr >> 8) + 1) );
@ -251,7 +251,7 @@ INLINE void SHA ( uint16_t addr ) {
((MSB(adr)+1) "AND" Y) -> M
**/
INLINE void SHY ( uint16_t addr ) {
INSTR void SHY ( uint16_t addr ) {
disPrintf(disassembly.inst, "SHY");
#ifndef DISASSEMBLER
set_flags_NZ( WRLOMEM[addr] = m6502.Y &((addr >> 8) + 1) );
@ -265,7 +265,7 @@ INLINE void SHY ( uint16_t addr ) {
((MSB(adr)+1) "AND" X) -> M
**/
INLINE void SHX ( uint16_t addr ) {
INSTR void SHX ( uint16_t addr ) {
disPrintf(disassembly.inst, "SHX");
#ifndef DISASSEMBLER
set_flags_NZ( WRLOMEM[addr] = m6502.X &((addr >> 8) + 1) );
@ -283,7 +283,7 @@ INLINE void SHX ( uint16_t addr ) {
-> A,M
**/
INLINE void SLO ( uint16_t addr ) {
INSTR void SLO ( uint16_t addr ) {
disPrintf(disassembly.inst, "SLO");
#ifndef DISASSEMBLER
@ -300,7 +300,7 @@ INLINE void SLO ( uint16_t addr ) {
(A "AND" X) -> M
**/
INLINE void SAX ( uint16_t addr ) {
INSTR void SAX ( uint16_t addr ) {
disPrintf(disassembly.inst, "SAX");
#ifndef DISASSEMBLER
set_flags_NZ( WRLOMEM[addr] = m6502.A & m6502.X );
@ -316,7 +316,7 @@ INLINE void SAX ( uint16_t addr ) {
ORA M
**/
INLINE void SRE ( uint16_t addr ) {
INSTR void SRE ( uint16_t addr ) {
disPrintf(disassembly.inst, "SRE");
#ifndef DISASSEMBLER
@ -335,7 +335,7 @@ XAA - "AND" Memory with Index X into Accumulator
(M "AND" X) -> A
**/
INLINE void XAA ( uint8_t src ) {
INSTR void XAA ( uint8_t src ) {
disPrintf(disassembly.inst, "XAA");
#ifndef DISASSEMBLER
set_flags_NZ( m6502.A = m6502.X & src );

2
src/cpu/jit/instructions/6502_instr_call_ret_jump.h
View File

@ -55,7 +55,7 @@ INSTR void JMP( uint16_t addr ) {
}
#ifndef DISASSEMBLER
#if !defined(DISASSEMBLER) && !defined(DEBUGGER)
// for patching game purposes -- it should not be inline!
void CALL( uint16_t addr ) {

2
src/cpu/jit/instructions/6502_instr_stack.h
View File

@ -43,7 +43,7 @@ INSTR void PUSH_addr( uint16_t addr ) {
PUSH( (uint8_t)addr );
}
INLINE uint16_t POP_addr(void) {
INSTR uint16_t POP_addr(void) {
return POP() + ( POP() << 8 );
}
#endif // DISASSEMBLER

2
src/dev/mem/mmio.c
View File

@ -1023,7 +1023,7 @@ INLINE uint8_t _memread_dbg( uint16_t addr ) {
if (LAST_IDX(mem_read_breakpoints)) {
if ( m6502_dbg_bp_exists(mem_read_breakpoints, addr) ) {
cpuState = cpuState_halted;
m6502.interrupt = BREAKPOINT;
m6502.interrupt = BREAKRDMEM;
}
}

2
src/dev/mem/mmio.h
View File

@ -33,7 +33,7 @@
#include "woz.h"
#include "speaker.h"
#include "paddle.h"
#include "6502_dis.h"
#include "6502_dis_utils.h"
typedef union address16_u {