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bugfix: Zeropage memory

This commit is contained in:
Tamas Rudnai 2024-01-09 13:41:23 -08:00
parent 1d7c47e630
commit 393fefd342
6 changed files with 156 additions and 23 deletions
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21
src/cpu/instructions/6502_instr_inc_dec.h
View File

@ -39,10 +39,21 @@
absolute,X INC oper,X FE 3 7
**/
#ifndef DISASSEMBLER
INSTR void _INC_zp( uint16_t addr ) {
set_flags_NZ( ++(WRZEROPG[addr]) );
}
INSTR void _INC( uint16_t addr ) {
set_flags_NZ( ++(WRLOMEM[addr]) );
}
#endif
INSTR void INC_zp( uint16_t addr ) {
disPrintf(disassembly.inst, "INC");
#ifndef DISASSEMBLER
_INC_zp(addr);
#endif
}
#endif
INSTR void INC( uint16_t addr ) {
disPrintf(disassembly.inst, "INC");
@ -125,10 +136,20 @@ INSTR void INA() {
absolute,X DEC oper,X DE 3 7
**/
#ifndef DISASSEMBLER
INSTR void _DEC_zp( uint16_t addr ) {
set_flags_NZ( --(WRZEROPG[addr]) );
}
INSTR void _DEC( uint16_t addr ) {
set_flags_NZ( --(WRLOMEM[addr]) );
}
#endif
INSTR void DEC_zp( uint16_t addr ) {
disPrintf(disassembly.inst, "DEC");
#ifndef DISASSEMBLER
_DEC_zp(addr);
#endif
}
INSTR void DEC( uint16_t addr ) {
disPrintf(disassembly.inst, "DEC");

28
src/cpu/instructions/6502_instr_load_store.h
View File

@ -141,6 +141,13 @@ INSTR void STA( uint16_t addr ) {
STR(addr, m6502.A);
#endif
}
INSTR void STA_zp( uint8_t addr ) {
dbgPrintf("STA ");
disPrintf(disassembly.inst, "STA");
#ifndef DISASSEMBLER
STR_zp(addr, m6502.A);
#endif
}
/**
STX Store Index X in Memory
@ -161,6 +168,13 @@ INSTR void STX( uint16_t addr ) {
STR(addr, m6502.X);
#endif
}
INSTR void STX_zp( uint8_t addr ) {
dbgPrintf("STX ");
disPrintf(disassembly.inst, "STX");
#ifndef DISASSEMBLER
STR_zp(addr, m6502.X);
#endif
}
/**
STY Sore Index Y in Memory
@ -181,6 +195,13 @@ INSTR void STY( uint16_t addr ) {
STR(addr, m6502.Y);
#endif
}
INSTR void STY_zp( uint18_t addr ) {
dbgPrintf("STY ");
disPrintf(disassembly.inst, "STY");
#ifndef DISASSEMBLER
STR_zp(addr, m6502.Y);
#endif
}
/**
STZ Store Zero (0) in Memory
@ -202,6 +223,13 @@ INSTR void STZ( uint16_t addr ) {
STR(addr, 0);
#endif
}
INSTR void STZ_zp( uint8_t addr ) {
dbgPrintf("STZ ");
disPrintf(disassembly.inst, "STZ");
#ifndef DISASSEMBLER
STR_zp(addr, 0);
#endif
}
#endif // __6502_INSTR_LOAD_STORE_H__

22
src/cpu/jit/instructions/6502_instr_inc_dec.h
View File

@ -39,6 +39,18 @@
absolute,X INC oper,X FE 3 7
**/
#ifndef DISASSEMBLER
INSTR void _INC_zp( uint16_t addr ) {
set_flags_NZ( ++(WRZEROPG[addr]) );
}
#endif
INSTR void INC_zp( uint16_t addr ) {
disPrintf(disassembly.inst, "INC");
#ifndef DISASSEMBLER
_INC_zp(addr);
#endif
}
#ifndef DISASSEMBLER
INSTR void _INC( uint16_t addr ) {
set_flags_NZ( ++(WRLOMEM[addr]) );
}
@ -125,10 +137,20 @@ INSTR void INA(void) {
absolute,X DEC oper,X DE 3 7
**/
#ifndef DISASSEMBLER
INSTR void _DEC_zp( uint16_t addr ) {
set_flags_NZ( --(WRZEROPG[addr]) );
}
INSTR void _DEC( uint16_t addr ) {
set_flags_NZ( --(WRLOMEM[addr]) );
}
#endif
INSTR void DEC_zp( uint16_t addr ) {
disPrintf(disassembly.inst, "DEC");
#ifndef DISASSEMBLER
_DEC_zp(addr);
#endif
}
INSTR void DEC( uint16_t addr ) {
disPrintf(disassembly.inst, "DEC");

34
src/cpu/jit/instructions/6502_instr_load_store.h
View File

@ -117,6 +117,12 @@ INSTR void STR( uint16_t addr, uint8_t src ) {
_memwrite(addr, src);
#endif
}
INSTR void STR_zp( uint8_t addr, uint8_t src ) {
dbgPrintf("STR [%04X], %02X ", addr, src );
#ifndef DISASSEMBLER
_memwrite8_zp(addr, src);
#endif
}
/**
STA Store Accumulator in Memory
@ -141,6 +147,13 @@ INSTR void STA( uint16_t addr ) {
STR(addr, m6502.A);
#endif
}
INSTR void STA_zp( uint8_t addr ) {
dbgPrintf("STA ");
disPrintf(disassembly.inst, "STA");
#ifndef DISASSEMBLER
STR_zp(addr, m6502.A);
#endif
}
/**
STX Store Index X in Memory
@ -161,6 +174,13 @@ INSTR void STX( uint16_t addr ) {
STR(addr, m6502.X);
#endif
}
INSTR void STX_zp( uint8_t addr ) {
dbgPrintf("STX ");
disPrintf(disassembly.inst, "STX");
#ifndef DISASSEMBLER
STR_zp(addr, m6502.X);
#endif
}
/**
STY Sore Index Y in Memory
@ -181,6 +201,13 @@ INSTR void STY( uint16_t addr ) {
STR(addr, m6502.Y);
#endif
}
INSTR void STY_zp( uint8_t addr ) {
dbgPrintf("STY ");
disPrintf(disassembly.inst, "STY");
#ifndef DISASSEMBLER
STR_zp(addr, m6502.Y);
#endif
}
/**
STZ Store Zero (0) in Memory
@ -202,6 +229,13 @@ INSTR void STZ( uint16_t addr ) {
STR(addr, 0);
#endif
}
INSTR void STZ_zp( uint8_t addr ) {
dbgPrintf("STZ ");
disPrintf(disassembly.inst, "STZ");
#ifndef DISASSEMBLER
STR_zp(addr, 0);
#endif
}
#endif // __6502_INSTR_LOAD_STORE_H__

70
src/dev/mem/mmio.c
View File

@ -77,7 +77,7 @@ MEMcfg_t MEMcfg = INIT_MEMCFG;
MEMcfg_t newMEMcfg = INIT_MEMCFG;
const uint8_t * const shadowZPSTCKMEM = Apple2_64K_MEM;
uint8_t * shadowZPSTCKMEM = Apple2_64K_MEM;
const uint8_t * currentZPSTCKMEM = Apple2_64K_RAM;
const uint8_t * const shadowLowMEM = Apple2_64K_MEM + 0x200;
const uint8_t * currentLowRDMEM = Apple2_64K_RAM + 0x200;
@ -1008,6 +1008,9 @@ INLINE uint8_t check_mem_wr_bp(uint16_t addr) {
/**
Naive implementation of RAM read from address
**/
INLINE uint8_t memread8_zp( uint16_t addr ) {
return shadowZPSTCKMEM[addr];
}
INLINE uint8_t memread8_low( uint16_t addr ) {
return Apple2_64K_MEM[addr];
}
@ -1018,11 +1021,17 @@ INLINE uint8_t memread8( uint16_t addr ) {
if (addr >= 0xC000) {
return memread8_high(addr);
}
return memread8_low(addr);
if (addr >= 0x200) {
return memread8_low(addr);
}
return memread8_zp(addr);
}
/**
Naive implementation of RAM read from address
**/
INLINE uint16_t memread16_zp( uint16_t addr ) {
return * (uint16_t*) ( shadowZPSTCKMEM + addr );
}
INLINE uint16_t memread16_low( uint16_t addr ) {
return * (uint16_t*) ( Apple2_64K_MEM + addr );
@ -1054,12 +1063,15 @@ INLINE uint8_t _memread( uint16_t addr ) {
if (addr < 0xC100) {
return ioRead(addr);
}
// return memread8_paged(addr);
return memread8_high(addr);
}
if (addr >= 0x200) {
return memread8_low(addr);
}
// return memread8_paged(addr);
return memread8_low(addr);
return memread8_zp(addr);
// return memread8(addr);
}
@ -1074,8 +1086,12 @@ INLINE uint8_t _memread_dis( uint16_t addr ) {
// return memread8_paged(addr);
return memread8_high(addr);
}
if (addr >= 0x200) {
return memread8_low(addr);
}
// return memread8_paged(addr);
return memread8_low(addr);
return memread8_zp(addr);
// return memread8(addr);
}
@ -1101,6 +1117,9 @@ INLINE uint8_t _memread_dis( uint16_t addr ) {
Naive implementation of RAM write to address
**/
INLINE void _memwrite8_zp( uint16_t addr, uint8_t data ) {
shadowZPSTCKMEM[addr] = data;
}
INLINE void _memwrite8_low( uint16_t addr, uint8_t data ) {
if ((addr >= 0x400) && (addr < 0x800)) {
if ((data == 0x00) || (data == 0xFF)) {
@ -1133,10 +1152,14 @@ INLINE void _memwrite( uint16_t addr, uint8_t data ) {
memwrite8_high(addr, data);
}
}
else {
else if (addr >= 0x200) {
// RAM
memwrite8_low(addr, data);
}
else {
// RAM
memwrite8_zp(addr, data);
}
}
/**
@ -1350,13 +1373,13 @@ INLINE uint8_t _addr_zp_dis(void) {
return _fetch_dis();
}
INLINE uint8_t _src_zp(void) {
return memread8_low(_addr_zp());
return memread8(_addr_zp());
}
INLINE uint8_t _src_zp_dbg(void) {
return _memread_dbg(_addr_zp_dbg());
}
INLINE uint8_t _src_zp_dis(void) {
return memread8_low(_addr_zp_dis());
return memread8(_addr_zp_dis());
}
//INLINE uint8_t * dest_zp() {
// return WRLOMEM + addr_zp();
@ -1514,13 +1537,13 @@ INLINE uint8_t _addr_zp_X_dis(void) {
return _fetch_dis() + m6502.X;
}
INLINE uint8_t _src_zp_X(void) {
return memread8_low(_addr_zp_X());
return memread8(_addr_zp_X());
}
INLINE uint8_t _src_zp_X_dbg(void) {
return _memread_dbg(_addr_zp_X());
}
INLINE uint8_t _src_zp_X_dis(void) {
return memread8_low(_addr_zp_X_dis());
return memread8(_addr_zp_X_dis());
}
//INLINE uint8_t * dest_zp_X() {
// return WRLOMEM + addr_zp_X();
@ -1545,13 +1568,13 @@ INLINE uint8_t _addr_zp_Y_dis(void) {
return _fetch_dis() + m6502.Y;
}
INLINE uint8_t _src_zp_Y(void) {
return memread8_low(_addr_zp_Y());
return memread8(_addr_zp_Y());
}
INLINE uint8_t _src_zp_Y_dbg(void) {
return _memread_dbg(_addr_zp_Y());
}
INLINE uint8_t _src_zp_Y_dis(void) {
return memread8_low(_addr_zp_Y_dis());
return memread8(_addr_zp_Y_dis());
}
//INLINE uint8_t * dest_zp_Y() {
// return WRLOMEM + addr_zp_Y();
@ -1563,7 +1586,7 @@ void auxMemorySelect( MEMcfg_t newMEMcfg ) {
uint8_t * newWriteMEM = currentLowWRMEM;
// TODO: Check if this is supposed to be the opposite
if ( newMEMcfg.is_80STORE ) {
// if ( newMEMcfg.is_80STORE ) {
if ( newMEMcfg.RD_AUX_MEM ) {
newReadMEM = Apple2_64K_AUX + 0x200;
}
@ -1577,11 +1600,11 @@ void auxMemorySelect( MEMcfg_t newMEMcfg ) {
else {
newWriteMEM = Apple2_64K_RAM;
}
}
else {
newReadMEM = Apple2_64K_RAM + 0x200;
newWriteMEM = Apple2_64K_RAM;
}
// }
// else {
// newReadMEM = Apple2_64K_RAM + 0x200;
// newWriteMEM = Apple2_64K_RAM;
// }
// save old content to shadow memory
@ -1727,10 +1750,10 @@ void CxMemorySelect( MEMcfg_t newMEMcfg ) {
void resetMemory(void) {
newMEMcfg = initMEMcfg;
WRZEROPG= Apple2_64K_MEM; // for Write $0000 - $0200 (shadow memory)
WRLOMEM = Apple2_64K_MEM; // for Write $0200 - $BFFF (shadow memory)
WRD0MEM = Apple2_Dummy_RAM; // for writing $D000 - $DFFF
WRHIMEM = Apple2_Dummy_RAM; // for writing $E000 - $FFFF
WRZEROPG = Apple2_64K_MEM; // for Write $0000 - $0200 (shadow memory)
WRLOMEM = Apple2_64K_MEM; // for Write $0200 - $BFFF (shadow memory)
WRD0MEM = Apple2_Dummy_RAM; // for writing $D000 - $DFFF
WRHIMEM = Apple2_Dummy_RAM; // for writing $E000 - $FFFF
auxMemorySelect(MEMcfg);
CxMemorySelect(MEMcfg);
@ -1798,7 +1821,8 @@ void setIO ( uint16_t ioaddr, uint8_t val ) {
}
uint8_t getMEM ( uint16_t addr ) {
return Apple2_64K_MEM[addr];
return memread8(addr);
// return Apple2_64K_MEM[addr];
}
uint16_t getMEM16 ( uint16_t addr ) {

4
src/dev/mem/mmio.h
View File

@ -414,6 +414,7 @@ INLINE uint16_t memread16( uint16_t addr );
INLINE uint8_t _memread( uint16_t addr );
INLINE uint8_t _memread_dbg( uint16_t addr );
INLINE uint8_t _memread_dis( uint16_t addr );
INLINE void _memwrite8_zp( uint16_t addr, uint8_t data );
INLINE void _memwrite8_low( uint16_t addr, uint8_t data );
INLINE void _memwrite8_bank( uint16_t addr, uint8_t data );
INLINE void _memwrite8_high( uint16_t addr, uint8_t data );
@ -497,6 +498,7 @@ INLINE uint8_t _src_zp_Y_dis(void);
#define fetch() _fetch_dis()
#define fetch16() _fetch16_dis()
#define memread(addr) _memread_dis(addr)
#define memwrite8_zp(addr,data) // do not write anything into the memory while disassembling
#define memwrite8_low(addr,data) // do not write anything into the memory while disassembling
#define memwrite8_bank(addr,data) // do not write anything into the memory while disassembling
#define memwrite8_high(addr,data) // do not write anything into the memory while disassembling
@ -531,6 +533,7 @@ INLINE uint8_t _src_zp_Y_dis(void);
#define fetch() _fetch()
#define fetch16() _fetch16()
#define memread(addr) _memread_dbg(addr)
#define memwrite8_zp(addr,data) _memwrite8_zp(addr,data)
#define memwrite8_low(addr,data) _memwrite8_low(addr,data)
#define memwrite8_bank(addr,data) _memwrite8_bank(addr,data)
#define memwrite8_high(addr,data) _memwrite8_high(addr,data)
@ -565,6 +568,7 @@ INLINE uint8_t _src_zp_Y_dis(void);
#define fetch() _fetch()
#define fetch16() _fetch16()
#define memread(addr) _memread(addr)
#define memwrite8_zp(addr,data) _memwrite8_zp(addr,data)
#define memwrite8_low(addr,data) _memwrite8_low(addr,data)
#define memwrite8_bank(addr,data) _memwrite8_bank(addr,data)
#define memwrite8_high(addr,data) _memwrite8_high(addr,data)