mirror of
https://github.com/trudnai/Steve2.git
synced 2024-12-21 14:30:09 +00:00
bugfix: Zeropage memory
This commit is contained in:
parent
1d7c47e630
commit
393fefd342
@ -39,10 +39,21 @@
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absolute,X INC oper,X FE 3 7
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absolute,X INC oper,X FE 3 7
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**/
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**/
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#ifndef DISASSEMBLER
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#ifndef DISASSEMBLER
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INSTR void _INC_zp( uint16_t addr ) {
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set_flags_NZ( ++(WRZEROPG[addr]) );
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}
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INSTR void _INC( uint16_t addr ) {
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INSTR void _INC( uint16_t addr ) {
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set_flags_NZ( ++(WRLOMEM[addr]) );
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set_flags_NZ( ++(WRLOMEM[addr]) );
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}
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}
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#endif
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#endif
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INSTR void INC_zp( uint16_t addr ) {
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disPrintf(disassembly.inst, "INC");
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#ifndef DISASSEMBLER
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_INC_zp(addr);
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#endif
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}
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#endif
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INSTR void INC( uint16_t addr ) {
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INSTR void INC( uint16_t addr ) {
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disPrintf(disassembly.inst, "INC");
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disPrintf(disassembly.inst, "INC");
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@ -125,10 +136,20 @@ INSTR void INA() {
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absolute,X DEC oper,X DE 3 7
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absolute,X DEC oper,X DE 3 7
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**/
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**/
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#ifndef DISASSEMBLER
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#ifndef DISASSEMBLER
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INSTR void _DEC_zp( uint16_t addr ) {
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set_flags_NZ( --(WRZEROPG[addr]) );
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}
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INSTR void _DEC( uint16_t addr ) {
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INSTR void _DEC( uint16_t addr ) {
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set_flags_NZ( --(WRLOMEM[addr]) );
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set_flags_NZ( --(WRLOMEM[addr]) );
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}
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}
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#endif
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#endif
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INSTR void DEC_zp( uint16_t addr ) {
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disPrintf(disassembly.inst, "DEC");
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#ifndef DISASSEMBLER
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_DEC_zp(addr);
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#endif
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}
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INSTR void DEC( uint16_t addr ) {
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INSTR void DEC( uint16_t addr ) {
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disPrintf(disassembly.inst, "DEC");
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disPrintf(disassembly.inst, "DEC");
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@ -141,6 +141,13 @@ INSTR void STA( uint16_t addr ) {
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STR(addr, m6502.A);
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STR(addr, m6502.A);
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#endif
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#endif
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}
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}
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INSTR void STA_zp( uint8_t addr ) {
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dbgPrintf("STA ");
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disPrintf(disassembly.inst, "STA");
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#ifndef DISASSEMBLER
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STR_zp(addr, m6502.A);
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#endif
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}
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/**
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/**
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STX Store Index X in Memory
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STX Store Index X in Memory
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@ -161,6 +168,13 @@ INSTR void STX( uint16_t addr ) {
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STR(addr, m6502.X);
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STR(addr, m6502.X);
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#endif
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#endif
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}
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}
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INSTR void STX_zp( uint8_t addr ) {
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dbgPrintf("STX ");
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disPrintf(disassembly.inst, "STX");
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#ifndef DISASSEMBLER
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STR_zp(addr, m6502.X);
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#endif
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}
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/**
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/**
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STY Sore Index Y in Memory
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STY Sore Index Y in Memory
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@ -181,6 +195,13 @@ INSTR void STY( uint16_t addr ) {
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STR(addr, m6502.Y);
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STR(addr, m6502.Y);
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#endif
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#endif
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}
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}
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INSTR void STY_zp( uint18_t addr ) {
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dbgPrintf("STY ");
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disPrintf(disassembly.inst, "STY");
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#ifndef DISASSEMBLER
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STR_zp(addr, m6502.Y);
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#endif
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}
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/**
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/**
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STZ Store Zero (0) in Memory
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STZ Store Zero (0) in Memory
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@ -202,6 +223,13 @@ INSTR void STZ( uint16_t addr ) {
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STR(addr, 0);
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STR(addr, 0);
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#endif
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#endif
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}
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}
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INSTR void STZ_zp( uint8_t addr ) {
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dbgPrintf("STZ ");
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disPrintf(disassembly.inst, "STZ");
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#ifndef DISASSEMBLER
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STR_zp(addr, 0);
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#endif
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}
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#endif // __6502_INSTR_LOAD_STORE_H__
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#endif // __6502_INSTR_LOAD_STORE_H__
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@ -39,6 +39,18 @@
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absolute,X INC oper,X FE 3 7
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absolute,X INC oper,X FE 3 7
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**/
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**/
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#ifndef DISASSEMBLER
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#ifndef DISASSEMBLER
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INSTR void _INC_zp( uint16_t addr ) {
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set_flags_NZ( ++(WRZEROPG[addr]) );
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}
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#endif
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INSTR void INC_zp( uint16_t addr ) {
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disPrintf(disassembly.inst, "INC");
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#ifndef DISASSEMBLER
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_INC_zp(addr);
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#endif
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}
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#ifndef DISASSEMBLER
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INSTR void _INC( uint16_t addr ) {
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INSTR void _INC( uint16_t addr ) {
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set_flags_NZ( ++(WRLOMEM[addr]) );
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set_flags_NZ( ++(WRLOMEM[addr]) );
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}
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}
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@ -125,10 +137,20 @@ INSTR void INA(void) {
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absolute,X DEC oper,X DE 3 7
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absolute,X DEC oper,X DE 3 7
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**/
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**/
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#ifndef DISASSEMBLER
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#ifndef DISASSEMBLER
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INSTR void _DEC_zp( uint16_t addr ) {
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set_flags_NZ( --(WRZEROPG[addr]) );
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}
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INSTR void _DEC( uint16_t addr ) {
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INSTR void _DEC( uint16_t addr ) {
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set_flags_NZ( --(WRLOMEM[addr]) );
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set_flags_NZ( --(WRLOMEM[addr]) );
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}
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}
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#endif
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#endif
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INSTR void DEC_zp( uint16_t addr ) {
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disPrintf(disassembly.inst, "DEC");
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#ifndef DISASSEMBLER
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_DEC_zp(addr);
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#endif
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}
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INSTR void DEC( uint16_t addr ) {
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INSTR void DEC( uint16_t addr ) {
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disPrintf(disassembly.inst, "DEC");
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disPrintf(disassembly.inst, "DEC");
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@ -117,6 +117,12 @@ INSTR void STR( uint16_t addr, uint8_t src ) {
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_memwrite(addr, src);
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_memwrite(addr, src);
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#endif
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#endif
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}
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}
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INSTR void STR_zp( uint8_t addr, uint8_t src ) {
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dbgPrintf("STR [%04X], %02X ", addr, src );
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#ifndef DISASSEMBLER
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_memwrite8_zp(addr, src);
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#endif
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}
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/**
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/**
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STA Store Accumulator in Memory
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STA Store Accumulator in Memory
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@ -141,6 +147,13 @@ INSTR void STA( uint16_t addr ) {
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STR(addr, m6502.A);
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STR(addr, m6502.A);
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#endif
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#endif
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}
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}
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INSTR void STA_zp( uint8_t addr ) {
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dbgPrintf("STA ");
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disPrintf(disassembly.inst, "STA");
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#ifndef DISASSEMBLER
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STR_zp(addr, m6502.A);
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#endif
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}
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/**
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/**
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STX Store Index X in Memory
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STX Store Index X in Memory
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@ -161,6 +174,13 @@ INSTR void STX( uint16_t addr ) {
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STR(addr, m6502.X);
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STR(addr, m6502.X);
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#endif
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#endif
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}
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}
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INSTR void STX_zp( uint8_t addr ) {
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dbgPrintf("STX ");
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disPrintf(disassembly.inst, "STX");
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#ifndef DISASSEMBLER
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STR_zp(addr, m6502.X);
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#endif
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}
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/**
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/**
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STY Sore Index Y in Memory
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STY Sore Index Y in Memory
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@ -181,6 +201,13 @@ INSTR void STY( uint16_t addr ) {
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STR(addr, m6502.Y);
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STR(addr, m6502.Y);
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#endif
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#endif
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}
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}
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INSTR void STY_zp( uint8_t addr ) {
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dbgPrintf("STY ");
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disPrintf(disassembly.inst, "STY");
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#ifndef DISASSEMBLER
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STR_zp(addr, m6502.Y);
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#endif
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}
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/**
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/**
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STZ Store Zero (0) in Memory
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STZ Store Zero (0) in Memory
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@ -202,6 +229,13 @@ INSTR void STZ( uint16_t addr ) {
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STR(addr, 0);
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STR(addr, 0);
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#endif
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#endif
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}
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}
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INSTR void STZ_zp( uint8_t addr ) {
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dbgPrintf("STZ ");
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disPrintf(disassembly.inst, "STZ");
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#ifndef DISASSEMBLER
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STR_zp(addr, 0);
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#endif
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}
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#endif // __6502_INSTR_LOAD_STORE_H__
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#endif // __6502_INSTR_LOAD_STORE_H__
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@ -77,7 +77,7 @@ MEMcfg_t MEMcfg = INIT_MEMCFG;
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MEMcfg_t newMEMcfg = INIT_MEMCFG;
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MEMcfg_t newMEMcfg = INIT_MEMCFG;
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const uint8_t * const shadowZPSTCKMEM = Apple2_64K_MEM;
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uint8_t * shadowZPSTCKMEM = Apple2_64K_MEM;
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const uint8_t * currentZPSTCKMEM = Apple2_64K_RAM;
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const uint8_t * currentZPSTCKMEM = Apple2_64K_RAM;
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const uint8_t * const shadowLowMEM = Apple2_64K_MEM + 0x200;
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const uint8_t * const shadowLowMEM = Apple2_64K_MEM + 0x200;
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const uint8_t * currentLowRDMEM = Apple2_64K_RAM + 0x200;
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const uint8_t * currentLowRDMEM = Apple2_64K_RAM + 0x200;
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@ -1008,6 +1008,9 @@ INLINE uint8_t check_mem_wr_bp(uint16_t addr) {
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/**
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/**
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Naive implementation of RAM read from address
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Naive implementation of RAM read from address
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**/
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**/
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INLINE uint8_t memread8_zp( uint16_t addr ) {
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return shadowZPSTCKMEM[addr];
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}
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INLINE uint8_t memread8_low( uint16_t addr ) {
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INLINE uint8_t memread8_low( uint16_t addr ) {
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return Apple2_64K_MEM[addr];
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return Apple2_64K_MEM[addr];
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}
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}
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@ -1018,11 +1021,17 @@ INLINE uint8_t memread8( uint16_t addr ) {
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if (addr >= 0xC000) {
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if (addr >= 0xC000) {
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return memread8_high(addr);
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return memread8_high(addr);
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}
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}
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return memread8_low(addr);
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if (addr >= 0x200) {
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return memread8_low(addr);
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}
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return memread8_zp(addr);
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}
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}
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/**
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/**
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Naive implementation of RAM read from address
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Naive implementation of RAM read from address
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**/
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**/
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INLINE uint16_t memread16_zp( uint16_t addr ) {
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return * (uint16_t*) ( shadowZPSTCKMEM + addr );
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}
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INLINE uint16_t memread16_low( uint16_t addr ) {
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INLINE uint16_t memread16_low( uint16_t addr ) {
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return * (uint16_t*) ( Apple2_64K_MEM + addr );
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return * (uint16_t*) ( Apple2_64K_MEM + addr );
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@ -1054,12 +1063,15 @@ INLINE uint8_t _memread( uint16_t addr ) {
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if (addr < 0xC100) {
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if (addr < 0xC100) {
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return ioRead(addr);
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return ioRead(addr);
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}
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}
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// return memread8_paged(addr);
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// return memread8_paged(addr);
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return memread8_high(addr);
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return memread8_high(addr);
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}
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}
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if (addr >= 0x200) {
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return memread8_low(addr);
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}
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// return memread8_paged(addr);
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// return memread8_paged(addr);
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return memread8_low(addr);
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return memread8_zp(addr);
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// return memread8(addr);
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// return memread8(addr);
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}
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}
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@ -1074,8 +1086,12 @@ INLINE uint8_t _memread_dis( uint16_t addr ) {
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// return memread8_paged(addr);
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// return memread8_paged(addr);
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return memread8_high(addr);
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return memread8_high(addr);
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}
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}
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if (addr >= 0x200) {
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return memread8_low(addr);
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}
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// return memread8_paged(addr);
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// return memread8_paged(addr);
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return memread8_low(addr);
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return memread8_zp(addr);
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// return memread8(addr);
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// return memread8(addr);
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}
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}
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@ -1101,6 +1117,9 @@ INLINE uint8_t _memread_dis( uint16_t addr ) {
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Naive implementation of RAM write to address
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Naive implementation of RAM write to address
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**/
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**/
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INLINE void _memwrite8_zp( uint16_t addr, uint8_t data ) {
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shadowZPSTCKMEM[addr] = data;
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}
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INLINE void _memwrite8_low( uint16_t addr, uint8_t data ) {
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INLINE void _memwrite8_low( uint16_t addr, uint8_t data ) {
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if ((addr >= 0x400) && (addr < 0x800)) {
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if ((addr >= 0x400) && (addr < 0x800)) {
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if ((data == 0x00) || (data == 0xFF)) {
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if ((data == 0x00) || (data == 0xFF)) {
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@ -1133,10 +1152,14 @@ INLINE void _memwrite( uint16_t addr, uint8_t data ) {
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memwrite8_high(addr, data);
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memwrite8_high(addr, data);
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}
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}
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}
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}
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else {
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else if (addr >= 0x200) {
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// RAM
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// RAM
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memwrite8_low(addr, data);
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memwrite8_low(addr, data);
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}
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}
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else {
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// RAM
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memwrite8_zp(addr, data);
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}
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}
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}
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/**
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/**
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@ -1350,13 +1373,13 @@ INLINE uint8_t _addr_zp_dis(void) {
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return _fetch_dis();
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return _fetch_dis();
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}
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}
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INLINE uint8_t _src_zp(void) {
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INLINE uint8_t _src_zp(void) {
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return memread8_low(_addr_zp());
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return memread8(_addr_zp());
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}
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}
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INLINE uint8_t _src_zp_dbg(void) {
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INLINE uint8_t _src_zp_dbg(void) {
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return _memread_dbg(_addr_zp_dbg());
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return _memread_dbg(_addr_zp_dbg());
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}
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}
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INLINE uint8_t _src_zp_dis(void) {
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INLINE uint8_t _src_zp_dis(void) {
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return memread8_low(_addr_zp_dis());
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return memread8(_addr_zp_dis());
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}
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}
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//INLINE uint8_t * dest_zp() {
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//INLINE uint8_t * dest_zp() {
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// return WRLOMEM + addr_zp();
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// return WRLOMEM + addr_zp();
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@ -1514,13 +1537,13 @@ INLINE uint8_t _addr_zp_X_dis(void) {
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return _fetch_dis() + m6502.X;
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return _fetch_dis() + m6502.X;
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}
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}
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INLINE uint8_t _src_zp_X(void) {
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INLINE uint8_t _src_zp_X(void) {
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return memread8_low(_addr_zp_X());
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return memread8(_addr_zp_X());
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}
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}
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INLINE uint8_t _src_zp_X_dbg(void) {
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INLINE uint8_t _src_zp_X_dbg(void) {
|
||||||
return _memread_dbg(_addr_zp_X());
|
return _memread_dbg(_addr_zp_X());
|
||||||
}
|
}
|
||||||
INLINE uint8_t _src_zp_X_dis(void) {
|
INLINE uint8_t _src_zp_X_dis(void) {
|
||||||
return memread8_low(_addr_zp_X_dis());
|
return memread8(_addr_zp_X_dis());
|
||||||
}
|
}
|
||||||
//INLINE uint8_t * dest_zp_X() {
|
//INLINE uint8_t * dest_zp_X() {
|
||||||
// return WRLOMEM + addr_zp_X();
|
// return WRLOMEM + addr_zp_X();
|
||||||
@ -1545,13 +1568,13 @@ INLINE uint8_t _addr_zp_Y_dis(void) {
|
|||||||
return _fetch_dis() + m6502.Y;
|
return _fetch_dis() + m6502.Y;
|
||||||
}
|
}
|
||||||
INLINE uint8_t _src_zp_Y(void) {
|
INLINE uint8_t _src_zp_Y(void) {
|
||||||
return memread8_low(_addr_zp_Y());
|
return memread8(_addr_zp_Y());
|
||||||
}
|
}
|
||||||
INLINE uint8_t _src_zp_Y_dbg(void) {
|
INLINE uint8_t _src_zp_Y_dbg(void) {
|
||||||
return _memread_dbg(_addr_zp_Y());
|
return _memread_dbg(_addr_zp_Y());
|
||||||
}
|
}
|
||||||
INLINE uint8_t _src_zp_Y_dis(void) {
|
INLINE uint8_t _src_zp_Y_dis(void) {
|
||||||
return memread8_low(_addr_zp_Y_dis());
|
return memread8(_addr_zp_Y_dis());
|
||||||
}
|
}
|
||||||
//INLINE uint8_t * dest_zp_Y() {
|
//INLINE uint8_t * dest_zp_Y() {
|
||||||
// return WRLOMEM + addr_zp_Y();
|
// return WRLOMEM + addr_zp_Y();
|
||||||
@ -1563,7 +1586,7 @@ void auxMemorySelect( MEMcfg_t newMEMcfg ) {
|
|||||||
uint8_t * newWriteMEM = currentLowWRMEM;
|
uint8_t * newWriteMEM = currentLowWRMEM;
|
||||||
|
|
||||||
// TODO: Check if this is supposed to be the opposite
|
// TODO: Check if this is supposed to be the opposite
|
||||||
if ( newMEMcfg.is_80STORE ) {
|
// if ( newMEMcfg.is_80STORE ) {
|
||||||
if ( newMEMcfg.RD_AUX_MEM ) {
|
if ( newMEMcfg.RD_AUX_MEM ) {
|
||||||
newReadMEM = Apple2_64K_AUX + 0x200;
|
newReadMEM = Apple2_64K_AUX + 0x200;
|
||||||
}
|
}
|
||||||
@ -1577,11 +1600,11 @@ void auxMemorySelect( MEMcfg_t newMEMcfg ) {
|
|||||||
else {
|
else {
|
||||||
newWriteMEM = Apple2_64K_RAM;
|
newWriteMEM = Apple2_64K_RAM;
|
||||||
}
|
}
|
||||||
}
|
// }
|
||||||
else {
|
// else {
|
||||||
newReadMEM = Apple2_64K_RAM + 0x200;
|
// newReadMEM = Apple2_64K_RAM + 0x200;
|
||||||
newWriteMEM = Apple2_64K_RAM;
|
// newWriteMEM = Apple2_64K_RAM;
|
||||||
}
|
// }
|
||||||
|
|
||||||
|
|
||||||
// save old content to shadow memory
|
// save old content to shadow memory
|
||||||
@ -1727,10 +1750,10 @@ void CxMemorySelect( MEMcfg_t newMEMcfg ) {
|
|||||||
void resetMemory(void) {
|
void resetMemory(void) {
|
||||||
newMEMcfg = initMEMcfg;
|
newMEMcfg = initMEMcfg;
|
||||||
|
|
||||||
WRZEROPG= Apple2_64K_MEM; // for Write $0000 - $0200 (shadow memory)
|
WRZEROPG = Apple2_64K_MEM; // for Write $0000 - $0200 (shadow memory)
|
||||||
WRLOMEM = Apple2_64K_MEM; // for Write $0200 - $BFFF (shadow memory)
|
WRLOMEM = Apple2_64K_MEM; // for Write $0200 - $BFFF (shadow memory)
|
||||||
WRD0MEM = Apple2_Dummy_RAM; // for writing $D000 - $DFFF
|
WRD0MEM = Apple2_Dummy_RAM; // for writing $D000 - $DFFF
|
||||||
WRHIMEM = Apple2_Dummy_RAM; // for writing $E000 - $FFFF
|
WRHIMEM = Apple2_Dummy_RAM; // for writing $E000 - $FFFF
|
||||||
|
|
||||||
auxMemorySelect(MEMcfg);
|
auxMemorySelect(MEMcfg);
|
||||||
CxMemorySelect(MEMcfg);
|
CxMemorySelect(MEMcfg);
|
||||||
@ -1798,7 +1821,8 @@ void setIO ( uint16_t ioaddr, uint8_t val ) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
uint8_t getMEM ( uint16_t addr ) {
|
uint8_t getMEM ( uint16_t addr ) {
|
||||||
return Apple2_64K_MEM[addr];
|
return memread8(addr);
|
||||||
|
// return Apple2_64K_MEM[addr];
|
||||||
}
|
}
|
||||||
|
|
||||||
uint16_t getMEM16 ( uint16_t addr ) {
|
uint16_t getMEM16 ( uint16_t addr ) {
|
||||||
|
@ -414,6 +414,7 @@ INLINE uint16_t memread16( uint16_t addr );
|
|||||||
INLINE uint8_t _memread( uint16_t addr );
|
INLINE uint8_t _memread( uint16_t addr );
|
||||||
INLINE uint8_t _memread_dbg( uint16_t addr );
|
INLINE uint8_t _memread_dbg( uint16_t addr );
|
||||||
INLINE uint8_t _memread_dis( uint16_t addr );
|
INLINE uint8_t _memread_dis( uint16_t addr );
|
||||||
|
INLINE void _memwrite8_zp( uint16_t addr, uint8_t data );
|
||||||
INLINE void _memwrite8_low( uint16_t addr, uint8_t data );
|
INLINE void _memwrite8_low( uint16_t addr, uint8_t data );
|
||||||
INLINE void _memwrite8_bank( uint16_t addr, uint8_t data );
|
INLINE void _memwrite8_bank( uint16_t addr, uint8_t data );
|
||||||
INLINE void _memwrite8_high( uint16_t addr, uint8_t data );
|
INLINE void _memwrite8_high( uint16_t addr, uint8_t data );
|
||||||
@ -497,6 +498,7 @@ INLINE uint8_t _src_zp_Y_dis(void);
|
|||||||
#define fetch() _fetch_dis()
|
#define fetch() _fetch_dis()
|
||||||
#define fetch16() _fetch16_dis()
|
#define fetch16() _fetch16_dis()
|
||||||
#define memread(addr) _memread_dis(addr)
|
#define memread(addr) _memread_dis(addr)
|
||||||
|
#define memwrite8_zp(addr,data) // do not write anything into the memory while disassembling
|
||||||
#define memwrite8_low(addr,data) // do not write anything into the memory while disassembling
|
#define memwrite8_low(addr,data) // do not write anything into the memory while disassembling
|
||||||
#define memwrite8_bank(addr,data) // do not write anything into the memory while disassembling
|
#define memwrite8_bank(addr,data) // do not write anything into the memory while disassembling
|
||||||
#define memwrite8_high(addr,data) // do not write anything into the memory while disassembling
|
#define memwrite8_high(addr,data) // do not write anything into the memory while disassembling
|
||||||
@ -531,6 +533,7 @@ INLINE uint8_t _src_zp_Y_dis(void);
|
|||||||
#define fetch() _fetch()
|
#define fetch() _fetch()
|
||||||
#define fetch16() _fetch16()
|
#define fetch16() _fetch16()
|
||||||
#define memread(addr) _memread_dbg(addr)
|
#define memread(addr) _memread_dbg(addr)
|
||||||
|
#define memwrite8_zp(addr,data) _memwrite8_zp(addr,data)
|
||||||
#define memwrite8_low(addr,data) _memwrite8_low(addr,data)
|
#define memwrite8_low(addr,data) _memwrite8_low(addr,data)
|
||||||
#define memwrite8_bank(addr,data) _memwrite8_bank(addr,data)
|
#define memwrite8_bank(addr,data) _memwrite8_bank(addr,data)
|
||||||
#define memwrite8_high(addr,data) _memwrite8_high(addr,data)
|
#define memwrite8_high(addr,data) _memwrite8_high(addr,data)
|
||||||
@ -565,6 +568,7 @@ INLINE uint8_t _src_zp_Y_dis(void);
|
|||||||
#define fetch() _fetch()
|
#define fetch() _fetch()
|
||||||
#define fetch16() _fetch16()
|
#define fetch16() _fetch16()
|
||||||
#define memread(addr) _memread(addr)
|
#define memread(addr) _memread(addr)
|
||||||
|
#define memwrite8_zp(addr,data) _memwrite8_zp(addr,data)
|
||||||
#define memwrite8_low(addr,data) _memwrite8_low(addr,data)
|
#define memwrite8_low(addr,data) _memwrite8_low(addr,data)
|
||||||
#define memwrite8_bank(addr,data) _memwrite8_bank(addr,data)
|
#define memwrite8_bank(addr,data) _memwrite8_bank(addr,data)
|
||||||
#define memwrite8_high(addr,data) _memwrite8_high(addr,data)
|
#define memwrite8_high(addr,data) _memwrite8_high(addr,data)
|
||||||
|
Loading…
Reference in New Issue
Block a user