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https://github.com/trudnai/Steve2.git
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Debugger disassembly operands
This commit is contained in:
tudnai
parent
783c5602bc
commit
4b74ab638c
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@ -1116,11 +1116,14 @@ INLINE uint16_t _fetch16_dbg() {
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abs .... absolute OPC $LLHH,X
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operand is address; effective address is address incremented by X with carry **
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**/
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INLINE uint16_t addr_abs() {
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INLINE uint16_t _addr_abs() {
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dbgPrintf("abs:%04X(%02X) ", *((uint16_t*)&RAM[m6502.PC]), RAM[*((uint16_t*)&RAM[m6502.PC])]);
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disPrintf(disassembly.oper, "$%04X", memread16(m6502.PC));
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return fetch16();
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}
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INLINE uint16_t _addr_abs_dbg() {
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_disPrintf(disassembly.oper, sizeof(disassembly.oper), "$%04X", memread16(m6502.PC));
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return _fetch16_dbg();
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}
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INLINE uint8_t src_abs() {
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return memread( addr_abs() );
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}
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@ -1129,30 +1132,41 @@ INLINE uint8_t src_abs() {
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//}
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INLINE int8_t rel_addr() {
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disPrintf(disassembly.oper, "$%04X", m6502.PC + 1 + (int8_t)memread8(m6502.PC));
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INLINE int8_t _rel_addr() {
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return fetch();
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}
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INLINE uint16_t abs_addr() {
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disPrintf(disassembly.oper, "$%04X", memread16(m6502.PC));
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INLINE int8_t _rel_addr_dbg() {
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_disPrintf(disassembly.oper, sizeof(disassembly.oper), "$%04X", m6502.PC + 1 + (int8_t)memread8(m6502.PC));
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return _fetch_dbg();
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}
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INLINE uint16_t _abs_addr() {
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return fetch16();
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}
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INLINE uint16_t ind_addr() {
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disPrintf(disassembly.oper, "($%04X)", memread16(m6502.PC));
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disPrintf(disassembly.comment, "ind_addr:%04X", memread16(memread16(m6502.PC)));
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INLINE uint16_t _abs_addr_dbg() {
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_disPrintf(disassembly.oper, sizeof(disassembly.oper), "$%04X", memread16(m6502.PC));
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return _fetch16_dbg();
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}
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INLINE uint16_t _ind_addr() {
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return memread16( fetch16() );
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}
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INLINE uint16_t _ind_addr_dbg() {
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_disPrintf(disassembly.oper, sizeof(disassembly.oper), "($%04X)", memread16(m6502.PC));
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_disPrintf(disassembly.comment, sizeof(disassembly.comment), "ind_addr:%04X", memread16(memread16(m6502.PC)));
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return memread16( _fetch16_dbg() );
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}
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/**
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abs,X .... absolute, X-indexed OPC $LLHH,X
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operand is address; effective address is address incremented by X with carry **
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**/
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INLINE uint16_t addr_abs_X() {
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dbgPrintf("abs,X:%04X(%02X) ", *((uint16_t*)&RAM[m6502.PC]) + m6502.X, RAM[*((uint16_t*)&RAM[m6502.PC]) + m6502.X]);
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disPrintf(disassembly.oper, "$%04X,X", memread16(m6502.PC));
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INLINE uint16_t _addr_abs_X() {
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return fetch16() + m6502.X;
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}
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INLINE uint16_t _addr_abs_X_dbg() {
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_disPrintf(disassembly.oper, sizeof(disassembly.oper), "$%04X,X", memread16(m6502.PC));
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return _fetch16_dbg() + m6502.X;
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}
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INLINE uint8_t src_abs_X() {
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return memread( addr_abs_X() );
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}
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@ -1165,11 +1179,13 @@ INLINE uint8_t src_abs_X() {
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abs,Y .... absolute, Y-indexed OPC $LLHH,Y
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operand is address; effective address is address incremented by Y with carry **
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**/
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INLINE uint16_t addr_abs_Y() {
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dbgPrintf("abs,Y:%04X(%02X) ", *((uint16_t*)&RAM[m6502.PC]) + m6502.Y, RAM[*((uint16_t*)&RAM[m6502.PC]) + m6502.Y]);
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disPrintf(disassembly.oper, "$%04X,Y", memread16(m6502.PC));
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INLINE uint16_t _addr_abs_Y() {
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return fetch16() + m6502.Y;
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}
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INLINE uint16_t _addr_abs_Y_dbg() {
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_disPrintf(disassembly.oper, sizeof(disassembly.oper), "$%04X,Y", memread16(m6502.PC));
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return _fetch16_dbg() + m6502.Y;
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}
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INLINE uint8_t src_abs_Y() {
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return memread(addr_abs_Y());
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}
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@ -1177,21 +1193,26 @@ INLINE uint8_t src_abs_Y() {
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// return WRLOMEM + addr_abs_Y();
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//}
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INLINE uint8_t imm() {
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disPrintf(disassembly.oper, "#$%02X", memread8(m6502.PC));
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INLINE uint8_t _imm() {
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return fetch();
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}
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INLINE uint8_t _imm_dbg() {
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_disPrintf(disassembly.oper, sizeof(disassembly.oper), "#$%02X", memread8(m6502.PC));
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return _fetch_dbg();
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}
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/**
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zpg .... zeropage OPC $LL
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operand is zeropage address (hi-byte is zero, address = $00LL)
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**/
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INLINE uint8_t addr_zp() {
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dbgPrintf("zp:%02X(%02X) ", RAM[m6502.PC], RAM[ RAM[m6502.PC]] );
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disPrintf(disassembly.oper, "$%02X", memread8(m6502.PC));
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INLINE uint8_t _addr_zp() {
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return fetch();
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}
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INLINE uint8_t _addr_zp_dbg() {
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_disPrintf(disassembly.oper, sizeof(disassembly.oper), "$%02X", memread8(m6502.PC));
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return _fetch_dbg();
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}
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INLINE uint8_t src_zp() {
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return memread8_low(addr_zp());
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}
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@ -1214,13 +1235,15 @@ INLINE uint8_t src_zp() {
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operand is zeropage address;
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effective address is word in (LL, LL + 1), inc. without carry: C.w($00LL)
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**/
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INLINE uint16_t addr_ind() {
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dbgPrintf("zpi:%02X:%04X(%02X) ", RAM[m6502.PC], *((uint16_t*)&RAM[m6502.PC]), RAM[*((uint16_t*)&RAM[m6502.PC])]);
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disPrintf(disassembly.oper, "($%02X,X)", memread8(m6502.PC) );
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disPrintf(disassembly.comment, "ind_addr:%04X", memread16( memread8(m6502.PC)) );
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INLINE uint16_t _addr_ind() {
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return memread16( fetch() );
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}
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INLINE uint16_t _addr_ind_dbg() {
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_disPrintf(disassembly.oper, sizeof(disassembly.oper), "($%02X,X)", memread8(m6502.PC) );
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_disPrintf(disassembly.comment, sizeof(disassembly.comment), "ind_addr:%04X", memread16( memread8(m6502.PC)) );
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return memread16( _fetch_dbg() );
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}
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INLINE uint8_t src_ind() {
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return memread( addr_ind() );
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}
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@ -1230,13 +1253,15 @@ INLINE uint8_t src_ind() {
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operand is zeropage address;
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effective address is word in (LL + X, LL + X + 1), inc. without carry: C.w($00LL + X)
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**/
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INLINE uint16_t addr_ind_X() {
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dbgPrintf("zpXi:%02X:%04X(%02X) ", RAM[m6502.PC], *((uint16_t*)&RAM[m6502.PC]) + m6502.X, RAM[*((uint16_t*)&RAM[m6502.PC]) + m6502.X]);
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disPrintf(disassembly.oper, "($%02X,X)", memread8(m6502.PC) );
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disPrintf(disassembly.comment, "ind_addr:%04X", memread16( memread8(m6502.PC) + m6502.X) );
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INLINE uint16_t _addr_ind_X() {
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return memread16( fetch() + m6502.X );
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}
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INLINE uint16_t _addr_ind_X_dbg() {
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_disPrintf(disassembly.oper, sizeof(disassembly.oper), "($%02X,X)", memread8(m6502.PC) );
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_disPrintf(disassembly.comment, sizeof(disassembly.comment), "ind_addr:%04X", memread16( memread8(m6502.PC) + m6502.X) );
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return memread16( _fetch_dbg() + m6502.X );
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}
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INLINE uint8_t src_X_ind() {
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return memread( addr_ind_X() );
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}
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@ -1249,14 +1274,15 @@ INLINE uint8_t src_X_ind() {
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operand is zeropage address;
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effective address is word in (LL, LL + 1) incremented by Y with carry: C.w($00LL) + Y
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**/
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INLINE uint16_t addr_ind_Y() {
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// uint8_t a = fetch();
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// dbgPrintf("addr_ind_Y: %04X + %02X = %04X ", addr_zpg_ind( a ), m6502.Y, addr_zpg_ind( a ) + m6502.Y);
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disPrintf(disassembly.oper, "($%02X),Y", memread8(m6502.PC) );
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disPrintf(disassembly.comment, "ind_addr:%04X", memread16( memread8(m6502.PC) ) + m6502.Y );
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INLINE uint16_t _addr_ind_Y() {
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return memread16( fetch() ) + m6502.Y;
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}
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INLINE uint16_t _addr_ind_Y_dbg() {
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_disPrintf(disassembly.oper, sizeof(disassembly.oper), "($%02X),Y", memread8(m6502.PC) );
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_disPrintf(disassembly.comment, sizeof(disassembly.comment), "ind_addr:%04X", memread16( memread8(m6502.PC) ) + m6502.Y );
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return memread16( _fetch_dbg() ) + m6502.Y;
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}
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INLINE uint8_t src_ind_Y() {
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return memread( addr_ind_Y() );
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}
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@ -1270,11 +1296,14 @@ INLINE uint8_t src_ind_Y() {
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operand is zeropage address;
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effective address is address incremented by X without carry **
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**/
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INLINE uint8_t addr_zp_X() {
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disPrintf(disassembly.oper, "$%02X,X", memread8(m6502.PC));
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INLINE uint8_t _addr_zp_X() {
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return fetch() + m6502.X;
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}
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INLINE uint8_t _addr_zp_X_dbg() {
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_disPrintf(disassembly.oper, sizeof(disassembly.oper), "$%02X,X", memread8(m6502.PC));
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return _fetch_dbg() + m6502.X;
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}
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INLINE uint8_t src_zp_X() {
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return memread8_low(addr_zp_X());
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}
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@ -1287,11 +1316,14 @@ INLINE uint8_t src_zp_X() {
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operand is zeropage address;
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effective address is address incremented by Y without carry **
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**/
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INLINE uint8_t addr_zp_Y() {
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disPrintf(disassembly.oper, "$%02X,Y", memread8(m6502.PC));
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INLINE uint8_t _addr_zp_Y() {
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return fetch() + m6502.Y;
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}
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INLINE uint8_t _addr_zp_Y_dbg() {
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_disPrintf(disassembly.oper, sizeof(disassembly.oper), "$%02X,Y", memread8(m6502.PC));
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return _fetch_dbg() + m6502.Y;
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}
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INLINE uint8_t src_zp_Y() {
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return memread8_low(addr_zp_Y());
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}
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@ -24,7 +24,6 @@
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#ifndef __APPLE2_MMIO_H__
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#define __APPLE2_MMIO_H__
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#pragma message("MMIO")
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#include <string.h>
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@ -418,27 +417,40 @@ INLINE uint8_t _fetch(void);
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INLINE uint8_t _fetch_dbg(void);
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INLINE uint16_t _fetch16(void);
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INLINE uint16_t _fetch16_dbg(void);
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INLINE uint16_t addr_abs(void);
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INLINE uint16_t _addr_abs(void);
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INLINE uint16_t _addr_abs_dbg(void);
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INLINE uint8_t src_abs(void);
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INLINE int8_t rel_addr(void);
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INLINE uint16_t abs_addr(void);
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INLINE uint16_t ind_addr(void);
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INLINE uint16_t addr_abs_X(void);
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INLINE int8_t _rel_addr(void);
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INLINE int8_t _rel_addr_dbg(void);
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INLINE uint16_t _abs_addr(void);
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INLINE uint16_t _abs_addr_dbg(void);
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INLINE uint16_t _ind_addr(void);
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INLINE uint16_t _ind_addr_dbg(void);
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INLINE uint16_t _addr_abs_X(void);
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INLINE uint16_t _addr_abs_X_dbg(void);
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INLINE uint8_t src_abs_X(void);
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INLINE uint16_t addr_abs_Y(void);
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INLINE uint16_t _addr_abs_Y(void);
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INLINE uint16_t _addr_abs_Y_dbg(void);
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INLINE uint8_t src_abs_Y(void);
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INLINE uint8_t imm(void);
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INLINE uint8_t addr_zp(void);
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INLINE uint8_t _imm(void);
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INLINE uint8_t _imm_dbg(void);
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INLINE uint8_t _addr_zp(void);
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INLINE uint8_t _addr_zp_dbg(void);
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INLINE uint8_t src_zp(void);
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INLINE uint16_t addr_ind(void);
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INLINE uint16_t _addr_ind(void);
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INLINE uint16_t _addr_ind_dbg(void);
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INLINE uint8_t src_ind(void);
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INLINE uint16_t addr_ind_X(void);
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INLINE uint16_t _addr_ind_X(void);
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INLINE uint16_t _addr_ind_X_dbg(void);
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INLINE uint8_t src_X_ind(void);
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INLINE uint16_t addr_ind_Y(void);
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INLINE uint16_t _addr_ind_Y(void);
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INLINE uint16_t _addr_ind_Y_dbg(void);
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INLINE uint8_t src_ind_Y(void);
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INLINE uint8_t addr_zp_X(void);
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INLINE uint8_t _addr_zp_X(void);
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INLINE uint8_t _addr_zp_X_dbg(void);
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INLINE uint8_t src_zp_X(void);
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INLINE uint8_t addr_zp_Y(void);
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INLINE uint8_t _addr_zp_Y(void);
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INLINE uint8_t _addr_zp_Y_dbg(void);
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INLINE uint8_t src_zp_Y(void);
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@ -446,11 +458,37 @@ INLINE uint8_t src_zp_Y(void);
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#define fetch() _fetch()
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#define fetch16() _fetch16()
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#define addr_abs() _addr_abs()
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#define rel_addr() _rel_addr()
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#define abs_addr() _abs_addr()
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#define ind_addr() _ind_addr()
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#define addr_abs_X() _addr_abs_X()
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#define addr_abs_Y() _addr_abs_Y()
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#define imm() _imm()
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#define addr_zp() _addr_zp()
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#define addr_ind() _addr_ind()
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#define addr_ind_X() _addr_ind_X()
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#define addr_ind_Y() _addr_ind_Y()
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#define addr_zp_X() _addr_zp_X()
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#define addr_zp_Y() _addr_zp_Y()
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#else // DEBUGGER
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#define fetch() _fetch_dbg()
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#define fetch16() _fetch16_dbg()
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#define addr_abs() _addr_abs_dbg()
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#define rel_addr() _rel_addr_dbg()
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#define abs_addr() _abs_addr_dbg()
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#define ind_addr() _ind_addr_dbg()
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#define addr_abs_X() _addr_abs_X_dbg()
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#define addr_abs_Y() _addr_abs_Y_dbg()
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#define imm() _imm_dbg()
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#define addr_zp() _addr_zp_dbg()
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#define addr_ind() _addr_ind_dbg()
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#define addr_ind_X() _addr_ind_X_dbg()
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#define addr_ind_Y() _addr_ind_Y_dbg()
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#define addr_zp_X() _addr_zp_X_dbg()
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#define addr_zp_Y() _addr_zp_Y_dbg()
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#endif // DEBUGGER
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