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Renamed DEBUGGER macro to DISASSEMBLER

This commit is contained in:
tudnai 2022-11-16 21:25:19 -08:00
parent d935c168d6
commit 52cdd84aad
31 changed files with 231 additions and 227 deletions
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2
src/cpu/6502.c
View File

@ -31,6 +31,8 @@
#define CLK_WAIT
#undef DEBUGGER
#undef DISASSEMBLER
#define FETCH_ADDR m6502.PC
#include <stdio.h>

2
src/cpu/6502.h
View File

@ -29,7 +29,7 @@
#include "woz.h"
#ifdef DEBUGGER
#ifdef DISASSEMBLER
#define INSTR INLINE UNUSED static
#else
#define INSTR INLINE UNUSED static

2
src/cpu/6502_debugger.c
View File

@ -31,6 +31,8 @@
#define CLK_WAIT
#define DEBUGGER
#define DISASSEMBLER
#define FETCH_ADDR disass_addr
#include <stdio.h>

8
src/cpu/instructions/6502_instr_arithmetic.h
View File

@ -44,7 +44,7 @@
(indirect,X) ADC (oper,X) 61 2 6
(indirect),Y ADC (oper),Y 71 2 5*
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INLINE void _ADC( uint8_t src ) {
uint16_t tmp;
@ -85,7 +85,7 @@ INLINE void ADC( uint8_t src ) {
dbgPrintf("ADC(%02X) ", src);
disPrintf(disassembly.inst, "ADC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ADC(src);
#endif
}
@ -107,7 +107,7 @@ INLINE void ADC( uint8_t src ) {
(indirect,X) SBC (oper,X) E1 2 6
(indirect),Y SBC (oper),Y F1 2 5*
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INLINE void _SBC( uint8_t src ) {
uint16_t tmp;
@ -138,7 +138,7 @@ INLINE void SBC( uint8_t src ) {
dbgPrintf("SBC(%02X) ", src);
disPrintf(disassembly.inst, "SBC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_SBC(src);
#endif
}

26
src/cpu/instructions/6502_instr_branch.h
View File

@ -25,7 +25,7 @@
#define __6502_INSTR_BRANCH_H__
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INSTR void _BRA( int8_t reladdr ) {
uint8_t pg = m6502.PC >> 8;
m6502.PC += reladdr;
@ -38,7 +38,7 @@ INSTR void _BRA( int8_t reladdr ) {
#endif
dbgPrintf("BRA %04X ", m6502.PC);
}
#endif // DEBUGGER
#endif // DISASSEMBLER
/**
@ -52,7 +52,7 @@ INSTR void BRA( int8_t reladdr ) {
dbgPrintf("BRA ");
disPrintf(disassembly.inst, "BRA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_BRA( reladdr );
#endif
}
@ -72,7 +72,7 @@ INSTR void BCC( int8_t reladdr ) {
dbgPrintf("BCC ");
disPrintf(disassembly.inst, "BCC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( ! m6502.C ) {
_BRA( reladdr );
}
@ -96,7 +96,7 @@ INSTR void BCS( int8_t reladdr ) {
dbgPrintf("BCS ");
disPrintf(disassembly.inst, "BCS");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( m6502.C ) {
_BRA( reladdr );
}
@ -120,7 +120,7 @@ INSTR void BNE( int8_t reladdr ) {
dbgPrintf("BNE ");
disPrintf(disassembly.inst, "BNE");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( ! m6502.Z ) {
_BRA( reladdr );
}
@ -144,7 +144,7 @@ INSTR void BEQ( int8_t reladdr ) {
dbgPrintf("BEQ ");
disPrintf(disassembly.inst, "BEQ");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( m6502.Z ) {
_BRA( reladdr );
}
@ -168,7 +168,7 @@ INSTR void BPL( int8_t reladdr ) {
dbgPrintf("BPL ");
disPrintf(disassembly.inst, "BPL");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( ! m6502.N ) {
_BRA( reladdr );
}
@ -192,7 +192,7 @@ INSTR void BMI( int8_t reladdr ) {
dbgPrintf("BMI ");
disPrintf(disassembly.inst, "BMI");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( m6502.N ) {
_BRA( reladdr );
}
@ -216,7 +216,7 @@ INSTR void BVC( int8_t reladdr ) {
dbgPrintf("BVC ");
disPrintf(disassembly.inst, "BVC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( ! m6502.V ) {
_BRA( reladdr );
}
@ -240,7 +240,7 @@ INSTR void BVS( int8_t reladdr ) {
dbgPrintf("BVS ");
disPrintf(disassembly.inst, "BVS");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( m6502.V ) {
_BRA( reladdr );
}
@ -291,7 +291,7 @@ INSTR void BVS( int8_t reladdr ) {
FF 3 5 zp,rel ........ BBS7 $12,LABEL
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
#define BBR(n) INSTR void BBR##n( uint8_t src, int8_t reladdr ) { \
dbgPrintf("BBR"#n" "); \
disPrintf(disassembly.inst, "BBR"#n); \
@ -316,7 +316,7 @@ disPrintf(disassembly.inst, "BBR"#n); \
BBR(7)
#ifndef DEBUGGER
#ifndef DISASSEMBLER
#define BBS(n) INSTR void BBS##n( uint8_t src, int8_t reladdr ) { \
dbgPrintf("BBS"#n" "); \
disPrintf(disassembly.inst, "BBS"#n); \

10
src/cpu/instructions/6502_instr_call_ret_jump.h
View File

@ -40,7 +40,7 @@ INLINE void JMP( uint16_t addr ) {
dbgPrintf("JMP %04X ", addr);
disPrintf(disassembly.inst, "JMP");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
// disPrintf(disassembly.comment, "to:%04X", addr)
#ifdef DEBUG
if ( addr == m6502.PC - 3 ) {
@ -60,7 +60,7 @@ void CALL( uint16_t addr ) {
dbgPrintf("CALL ");
disPrintf(disassembly.inst, "CALL");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
PUSH_addr(m6502.PC -1);
m6502.PC = addr;
#endif
@ -88,7 +88,7 @@ INLINE void JSR( uint16_t addr ) {
dbgPrintf("JSR ");
disPrintf(disassembly.inst, "JSR");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
PUSH_addr(m6502.PC -1);
m6502.PC = addr;
#endif
@ -108,7 +108,7 @@ INLINE void RTS() {
dbgPrintf("RTS ");
disPrintf(disassembly.inst, "RTS");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.PC = POP_addr() +1;
m6502.interrupt = RET;
@ -134,7 +134,7 @@ INLINE void RTI() {
dbgPrintf("RTI ");
disPrintf(disassembly.inst, "RTI");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
setFlags( POP() );
// m6502.I = 0;
m6502.PC = POP_addr();

14
src/cpu/instructions/6502_instr_compare_test.h
View File

@ -43,7 +43,7 @@ INLINE void BIT( uint8_t src ) {
dbgPrintf("BIT(%02X) ", src);
disPrintf(disassembly.inst, "BIT");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NV(src);
set_flags_Z(m6502.A & src);
#endif
@ -75,7 +75,7 @@ INLINE void TRB( uint16_t addr ) {
dbgPrintf("TRB(%02X) ", src);
disPrintf(disassembly.inst, "TRB");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_Z( WRLOMEM[addr] & m6502.A );
WRLOMEM[addr] &= ~m6502.A;
#endif
@ -105,7 +105,7 @@ INLINE void TSB( uint16_t addr ) {
dbgPrintf("TSB(%02X) ", src);
disPrintf(disassembly.inst, "TSB");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_Z( WRLOMEM[addr] & m6502.A );
WRLOMEM[addr] |= m6502.A;
#endif
@ -128,7 +128,7 @@ INLINE void TSB( uint16_t addr ) {
(indirect,X) CMP (oper,X) C1 2 6
(indirect),Y CMP (oper),Y D1 2 5*
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INLINE void _CMP( uint8_t src ) {
set_flags_NZC( (int16_t)m6502.A - src );
}
@ -137,7 +137,7 @@ INLINE void CMP( uint8_t src ) {
dbgPrintf("CMP(%02X) ", src);
disPrintf(disassembly.inst, "CMP");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_CMP(src);
#endif
}
@ -158,7 +158,7 @@ INLINE void CPX( uint8_t src ) {
dbgPrintf("CPX(%02X) ", src);
disPrintf(disassembly.inst, "CPX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZC( (int16_t)m6502.X - src );
#endif
}
@ -179,7 +179,7 @@ INLINE void CPY( uint8_t src ) {
dbgPrintf("CPY(%02X) ", src);
disPrintf(disassembly.inst, "CPY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZC( (int16_t)m6502.Y - src );
#endif
}

20
src/cpu/instructions/6502_instr_inc_dec.h
View File

@ -38,7 +38,7 @@
absolute INC oper EE 3 6
absolute,X INC oper,X FE 3 7
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INLINE void _INC( uint16_t addr ) {
set_flags_NZ( ++(WRLOMEM[addr]) );
}
@ -46,7 +46,7 @@ INLINE void _INC( uint16_t addr ) {
INLINE void INC( uint16_t addr ) {
disPrintf(disassembly.inst, "INC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_INC(addr);
#endif
}
@ -65,7 +65,7 @@ INLINE void INX() {
dbgPrintf("INX %02X -> ", m6502.X);
disPrintf(disassembly.inst, "INX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( ++m6502.X );
dbgPrintf("%02X ", m6502.X);
#endif
@ -85,7 +85,7 @@ INLINE void INY() {
dbgPrintf("INY %02X -> ", m6502.Y);
disPrintf(disassembly.inst, "INY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( ++m6502.Y );
dbgPrintf("%02X ", m6502.Y);
#endif
@ -105,7 +105,7 @@ INLINE void INA() {
dbgPrintf("INA %02X -> ", m6502.A);
disPrintf(disassembly.inst, "INA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( ++m6502.A );
dbgPrintf("%02X ", m6502.A);
#endif
@ -124,7 +124,7 @@ INLINE void INA() {
absolute DEC oper CE 3 3
absolute,X DEC oper,X DE 3 7
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INLINE void _DEC( uint16_t addr ) {
set_flags_NZ( --(WRLOMEM[addr]) );
}
@ -132,7 +132,7 @@ INLINE void _DEC( uint16_t addr ) {
INLINE void DEC( uint16_t addr ) {
disPrintf(disassembly.inst, "DEC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_DEC(addr);
#endif
}
@ -151,7 +151,7 @@ INLINE void DEX() {
dbgPrintf("DEX %02X -> ", m6502.X);
disPrintf(disassembly.inst, "DEX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( --m6502.X );
dbgPrintf("%02X ", m6502.X);
#endif
@ -171,7 +171,7 @@ INLINE void DEY() {
dbgPrintf("DEY %02X -> ", m6502.Y);
disPrintf(disassembly.inst, "DEY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( --m6502.Y );
dbgPrintf("%02X ", m6502.Y);
#endif
@ -191,7 +191,7 @@ INLINE void DEA() {
dbgPrintf("DEA %02X -> ", m6502.A);
disPrintf(disassembly.inst, "DEA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( --m6502.A );
dbgPrintf("%02X ", m6502.A);
#endif

16
src/cpu/instructions/6502_instr_load_store.h
View File

@ -48,7 +48,7 @@
INLINE void LDA( uint8_t src ) {
dbgPrintf("LDA(%02X) ", src);
disPrintf(disassembly.inst, "LDA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.A = src);
#endif
}
@ -70,7 +70,7 @@ INLINE void LDA( uint8_t src ) {
INLINE void LDX( uint8_t src ) {
dbgPrintf("LDX(%02X) ", src);
disPrintf(disassembly.inst, "LDX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.X = src);
#endif
}
@ -92,7 +92,7 @@ INLINE void LDX( uint8_t src ) {
INLINE void LDY( uint8_t src ) {
dbgPrintf("LDY(%02X) ", src);
disPrintf(disassembly.inst, "LDY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.Y = src);
#endif
}
@ -113,7 +113,7 @@ char * charConv =
**/
INLINE void STR( uint16_t addr, uint8_t src ) {
dbgPrintf("STR [%04X], %02X ", addr, src );
#ifndef DEBUGGER
#ifndef DISASSEMBLER
memwrite(addr, src);
#endif
}
@ -137,7 +137,7 @@ INLINE void STR( uint16_t addr, uint8_t src ) {
INLINE void STA( uint16_t addr ) {
dbgPrintf("STA ");
disPrintf(disassembly.inst, "STA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
STR(addr, m6502.A);
#endif
}
@ -157,7 +157,7 @@ INLINE void STA( uint16_t addr ) {
INLINE void STX( uint16_t addr ) {
dbgPrintf("STX ");
disPrintf(disassembly.inst, "STX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
STR(addr, m6502.X);
#endif
}
@ -177,7 +177,7 @@ INLINE void STX( uint16_t addr ) {
INLINE void STY( uint16_t addr ) {
dbgPrintf("STY ");
disPrintf(disassembly.inst, "STY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
STR(addr, m6502.Y);
#endif
}
@ -198,7 +198,7 @@ INLINE void STY( uint16_t addr ) {
INLINE void STZ( uint16_t addr ) {
dbgPrintf("STZ ");
disPrintf(disassembly.inst, "STZ");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
STR(addr, 0);
#endif
}

10
src/cpu/instructions/6502_instr_logic.h
View File

@ -42,7 +42,7 @@
(indirect,X) ORA (oper,X) 01 2 6
(indirect),Y ORA (oper),Y 11 2 5*
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INLINE void _ORA( uint8_t src ) {
set_flags_NZ( m6502.A |= src );
}
@ -51,7 +51,7 @@ INLINE void ORA( uint8_t src ) {
dbgPrintf("ORA(%02X) ", src);
disPrintf(disassembly.inst, "ORA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ORA(src);
#endif
}
@ -73,7 +73,7 @@ INLINE void ORA( uint8_t src ) {
(indirect,X) AND (oper,X) 21 2 6
(indirect),Y AND (oper),Y 31 2 5*
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INLINE void _AND( uint8_t src ) {
set_flags_NZ( m6502.A &= src );
}
@ -82,7 +82,7 @@ INLINE void AND( uint8_t src ) {
dbgPrintf("AND(%02X) ", src);
disPrintf(disassembly.inst, "AND");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_AND(src);
#endif
}
@ -108,7 +108,7 @@ INLINE void EOR( uint8_t src ) {
dbgPrintf("EOR(%02X) ", src);
disPrintf(disassembly.inst, "EOR");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( m6502.A ^= src );
#endif
}

4
src/cpu/instructions/6502_instr_misc.h
View File

@ -39,7 +39,7 @@ INLINE int BRK() {
dbgPrintf("BRK ");
disPrintf(disassembly.inst, "BRK");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
PUSH_addr(m6502.PC +1); // PC +2, however, fetch already incremented it by 1
// B flag should be set before pushing flags onto the stack
m6502.B = 1;
@ -57,7 +57,7 @@ INLINE int BRK() {
INLINE void HLT() {
disPrintf(disassembly.inst, "HLT");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.interrupt = HALT;
#endif
}

18
src/cpu/instructions/6502_instr_set_clr.h
View File

@ -37,7 +37,7 @@
INLINE void CLC() {
dbgPrintf("CLC ");
disPrintf(disassembly.inst, "CLC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.C = 0;
#endif
}
@ -55,7 +55,7 @@ INLINE void CLC() {
INLINE void CLD() {
dbgPrintf("CLD ");
disPrintf(disassembly.inst, "CLD");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.D = 0;
#endif
}
@ -73,7 +73,7 @@ INLINE void CLD() {
INLINE void CLI() {
dbgPrintf("CLI ");
disPrintf(disassembly.inst, "CLI");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.I = 0;
#endif
}
@ -91,7 +91,7 @@ INLINE void CLI() {
INLINE void CLV() {
dbgPrintf("CLV ");
disPrintf(disassembly.inst, "CLV");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.V = 0;
#endif
}
@ -109,7 +109,7 @@ INLINE void CLV() {
INLINE void SEC() {
dbgPrintf("SEC ");
disPrintf(disassembly.inst, "SEC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.C = 1;
#endif
}
@ -127,7 +127,7 @@ INLINE void SEC() {
INLINE void SED() {
dbgPrintf("SED ");
disPrintf(disassembly.inst, "SED");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.D = 1;
#endif
}
@ -145,7 +145,7 @@ INLINE void SED() {
INLINE void SEI() {
dbgPrintf("SEI ");
disPrintf(disassembly.inst, "SEI");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.I = 1;
#endif
}
@ -189,7 +189,7 @@ INLINE void SEI() {
E7 2 5 zp ........ SMB6 $12
F7 2 5 zp ........ SMB7 $12
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
#define RMB(n) INLINE void RMB##n( uint8_t zpg ) { \
dbgPrintf("RMB"#n" "); \
disPrintf(disassembly.inst, "RMB"#n); \
@ -212,7 +212,7 @@ INLINE void SEI() {
RMB(7)
#ifndef DEBUGGER
#ifndef DISASSEMBLER
#define SMB(n) INLINE void SMB##n( uint8_t zpg ) { \
dbgPrintf("SMB"#n" "); \
disPrintf(disassembly.inst, "SMB"#n); \

22
src/cpu/instructions/6502_instr_shift_rotate.h
View File

@ -39,7 +39,7 @@
absolute ASL oper 0E 3 6
absolute,X ASL oper,X 1E 3 7
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INLINE void _ASL( uint16_t addr ) {
m6502.C = memread(addr) & 0x80;
set_flags_NZ( WRLOMEM[addr] <<= 1 );
@ -49,7 +49,7 @@ INLINE void ASL( uint16_t addr ) {
dbgPrintf("ASL ");
disPrintf(disassembly.inst, "ASL");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ASL(addr);
#endif
}
@ -57,7 +57,7 @@ INLINE void ASLA() {
dbgPrintf("ASL ");
disPrintf(disassembly.inst, "ASL");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.C = m6502.A & 0x80;
set_flags_NZ( m6502.A <<= 1 );
#endif
@ -81,7 +81,7 @@ INLINE void LSR( uint16_t addr ) {
dbgPrintf("LSR ");
disPrintf(disassembly.inst, "LSR");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.C = WRLOMEM[addr] & 1;
set_flags_NZ( WRLOMEM[addr] >>= 1 );
#endif
@ -90,7 +90,7 @@ INLINE void LSRA() {
dbgPrintf("LSR ");
disPrintf(disassembly.inst, "LSR");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.C = m6502.A & 1;
set_flags_NZ( m6502.A >>= 1 );
#endif
@ -110,7 +110,7 @@ INLINE void LSRA() {
absolute ROL oper 2E 3 6
absolute,X ROL oper,X 3E 3 7
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INLINE void _ROL( uint16_t addr ) {
uint8_t C = m6502.C != 0;
m6502.C = WRLOMEM[addr] & 0x80;
@ -122,7 +122,7 @@ INLINE void ROL( uint16_t addr ) {
dbgPrintf("ROL ");
disPrintf(disassembly.inst, "ROL");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ROL(addr);
#endif
}
@ -130,7 +130,7 @@ INLINE void ROLA() {
dbgPrintf("ROL ");
disPrintf(disassembly.inst, "ROL");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
uint8_t C = m6502.C != 0;
m6502.C = m6502.A & 0x80;
m6502.A <<= 1;
@ -152,7 +152,7 @@ INLINE void ROLA() {
absolute ROR oper 6E 3 6
absolute,X ROR oper,X 7E 3 7
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INLINE void _ROR( uint16_t addr ) {
uint8_t C = m6502.C != 0;
m6502.C = WRLOMEM[addr] & 1;
@ -164,7 +164,7 @@ INLINE void ROR( uint16_t addr ) {
dbgPrintf("ROR ");
disPrintf(disassembly.inst, "ROR");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ROR(addr);
#endif
}
@ -172,7 +172,7 @@ INLINE void RORA() {
dbgPrintf("ROR ");
disPrintf(disassembly.inst, "ROR");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
uint8_t C = m6502.C != 0;
m6502.C = m6502.A & 1;
m6502.A >>= 1;

24
src/cpu/instructions/6502_instr_stack.h
View File

@ -27,7 +27,7 @@
static const uint16_t stack_base_addr = 0x100;
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INLINE void PUSH( uint8_t src ) {
// DO NOT MAKE IT NICER! faster this way!
WRLOMEM[ stack_base_addr | m6502.SP-- ] = src;
@ -62,7 +62,7 @@ INLINE void PHA() {
dbgPrintf("PHA %02X ", m6502.A);
disPrintf(disassembly.inst, "PHA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
PUSH( m6502.A );
#endif
}
@ -81,7 +81,7 @@ INLINE void PHX() {
dbgPrintf("PHX %02X ", m6502.X);
disPrintf(disassembly.inst, "PHX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
PUSH( m6502.X );
#endif
}
@ -100,7 +100,7 @@ INLINE void PHY() {
dbgPrintf("PHY %02X ", m6502.Y);
disPrintf(disassembly.inst, "PHY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
PUSH( m6502.Y );
#endif
}
@ -116,14 +116,14 @@ INLINE void PHY() {
implied PLA 68 1 4
**/
INLINE void PLA() {
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.A = POP();
#endif
dbgPrintf("PLA %02X ", m6502.A);
disPrintf(disassembly.inst, "PLA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( m6502.A );
#endif
}
@ -139,14 +139,14 @@ INLINE void PLA() {
implied PLX 68 1 4
**/
INLINE void PLX() {
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.X = POP();
#endif
dbgPrintf("PLX %02X ", m6502.X);
disPrintf(disassembly.inst, "PLX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( m6502.X );
#endif
}
@ -162,14 +162,14 @@ INLINE void PLX() {
implied PLY 68 1 4
**/
INLINE void PLY() {
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.Y = POP();
#endif
dbgPrintf("PLY %02X ", m6502.Y);
disPrintf(disassembly.inst, "PLY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( m6502.Y );
#endif
}
@ -188,7 +188,7 @@ INLINE void PHP() {
dbgPrintf("PHP %02X ", m6502.SR);
disPrintf(disassembly.inst, "PHP");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
PUSH( getFlags().SR ); // res and B flag should be set
#endif
}
@ -204,7 +204,7 @@ INLINE void PHP() {
implied PLP 28 1 4
**/
INLINE void PLP() {
#ifndef DEBUGGER
#ifndef DISASSEMBLER
setFlags(POP() | 0x30); // res and B flag should be set
#endif

12
src/cpu/instructions/6502_instr_transfer.h
View File

@ -39,7 +39,7 @@ INLINE void TAX() {
dbgPrintf("TAX(%02X) ", m6502.A);
disPrintf(disassembly.inst, "TAX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.X = m6502.A);
#endif
}
@ -58,7 +58,7 @@ INLINE void TXA() {
dbgPrintf("TXA(%02X) ", m6502.X);
disPrintf(disassembly.inst, "TXA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.A = m6502.X);
#endif
}
@ -78,7 +78,7 @@ INLINE void TAY() {
dbgPrintf("TAY ");
disPrintf(disassembly.inst, "TAY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.Y = m6502.A);
#endif
}
@ -97,7 +97,7 @@ INLINE void TYA() {
dbgPrintf("TYA(%02X) ", m6502.Y);
disPrintf(disassembly.inst, "TYA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.A = m6502.Y);
#endif
}
@ -116,7 +116,7 @@ INLINE void TSX() {
dbgPrintf("TSX(%02X) ", m6502.SP);
disPrintf(disassembly.inst, "TSX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.X = m6502.SP);
#endif
}
@ -135,7 +135,7 @@ INLINE void TXS() {
dbgPrintf("TXS(%02X) ", m6502.X);
disPrintf(disassembly.inst, "TXS");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.SP = m6502.X;
#endif
}

36
src/cpu/instructions/6502_instr_undoc.h
View File

@ -35,7 +35,7 @@ ANC - "AND" Memory with Accumulator
INLINE void ANC ( uint8_t src ) {
disPrintf(disassembly.inst, "ANC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( m6502.A &= src );
m6502.C = m6502.A >> 7;
#endif
@ -55,7 +55,7 @@ INLINE void ANC ( uint8_t src ) {
INLINE void ARC ( uint8_t src ) {
disPrintf(disassembly.inst, "ARC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_AND(src);
m6502.C = m6502.A >> 7;
@ -77,7 +77,7 @@ INLINE void ARC ( uint8_t src ) {
INLINE void ASR ( uint8_t src ) {
disPrintf(disassembly.inst, "ASR");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
// AND
m6502.A &= src;
@ -97,7 +97,7 @@ INLINE void ASR ( uint8_t src ) {
**/
INLINE void DCP ( uint16_t addr ) {
disPrintf(disassembly.inst, "DCP");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_DEC(addr);
_CMP(WRLOMEM[addr]);
#endif
@ -109,7 +109,7 @@ INLINE void DCP ( uint16_t addr ) {
**/
INLINE void LAS ( uint8_t src ) {
disPrintf(disassembly.inst, "LAS");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( m6502.A = m6502.X = m6502.SP = m6502.SP & src );
#endif
}
@ -124,7 +124,7 @@ INLINE void LAS ( uint8_t src ) {
**/
INLINE void ISB ( uint16_t addr ) {
disPrintf(disassembly.inst, "ISB");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_INC(addr);
_SBC(WRLOMEM[addr]);
#endif
@ -138,7 +138,7 @@ INLINE void ISB ( uint16_t addr ) {
**/
INLINE void LAX ( uint8_t src ) {
disPrintf(disassembly.inst, "LAX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.A = m6502.X = src);
#endif
}
@ -154,7 +154,7 @@ INLINE void LAX ( uint8_t src ) {
INLINE void RLA ( uint16_t addr ) {
disPrintf(disassembly.inst, "RLA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ROL(addr);
_AND(WRLOMEM[addr]);
#endif
@ -170,7 +170,7 @@ INLINE void RLA ( uint16_t addr ) {
**/
INLINE void RRA ( uint16_t addr ) {
disPrintf(disassembly.inst, "RRA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ROR(addr);
_ADC(WRLOMEM[addr]);
#endif
@ -187,7 +187,7 @@ INLINE void RRA ( uint16_t addr ) {
INLINE void SAS ( uint16_t addr ) {
disPrintf(disassembly.inst, "SAS");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.SP = m6502.A & m6502.X;
set_flags_NZ( WRLOMEM[addr] = m6502.SP & ((addr >> 8) + 1) );
#endif
@ -218,7 +218,7 @@ INLINE void SAS ( uint16_t addr ) {
INLINE void SBX ( uint8_t src ) {
disPrintf(disassembly.inst, "SBX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
uint16_t tmp;
// Decimal flag is ignored
@ -239,7 +239,7 @@ INLINE void SBX ( uint8_t src ) {
INLINE void SHA ( uint16_t addr ) {
disPrintf(disassembly.inst, "SHA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( WRLOMEM[addr] = m6502.X & m6502.A & ((addr >> 8) + 1) );
#endif
}
@ -253,7 +253,7 @@ INLINE void SHA ( uint16_t addr ) {
INLINE void SHY ( uint16_t addr ) {
disPrintf(disassembly.inst, "SHY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( WRLOMEM[addr] = m6502.Y &((addr >> 8) + 1) );
#endif
}
@ -267,7 +267,7 @@ INLINE void SHY ( uint16_t addr ) {
INLINE void SHX ( uint16_t addr ) {
disPrintf(disassembly.inst, "SHX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( WRLOMEM[addr] = m6502.X &((addr >> 8) + 1) );
#endif
}
@ -286,7 +286,7 @@ INLINE void SHX ( uint16_t addr ) {
INLINE void SLO ( uint16_t addr ) {
disPrintf(disassembly.inst, "SLO");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ASL(addr);
_ORA( WRLOMEM[addr] );
set_flags_NZ( WRLOMEM[addr] = m6502.A ); // A -> M
@ -302,7 +302,7 @@ INLINE void SLO ( uint16_t addr ) {
INLINE void SAX ( uint16_t addr ) {
disPrintf(disassembly.inst, "SAX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( WRLOMEM[addr] = m6502.A & m6502.X );
#endif
}
@ -319,7 +319,7 @@ INLINE void SAX ( uint16_t addr ) {
INLINE void SRE ( uint16_t addr ) {
disPrintf(disassembly.inst, "SRE");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
// LSR
m6502.C = WRLOMEM[addr] & 1;
set_flags_NZ( WRLOMEM[addr] >>= 1 );
@ -337,7 +337,7 @@ XAA - "AND" Memory with Index X into Accumulator
**/
INLINE void XAA ( uint8_t src ) {
disPrintf(disassembly.inst, "XAA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( m6502.A = m6502.X & src );
#endif
}

8
src/cpu/jit/instructions/6502_instr_arithmetic.h
View File

@ -44,7 +44,7 @@
(indirect,X) ADC (oper,X) 61 2 6
(indirect),Y ADC (oper),Y 71 2 5*
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INSTR void _ADC( uint8_t src ) {
uint16_t tmp;
@ -85,7 +85,7 @@ INSTR void ADC( uint8_t src ) {
dbgPrintf("ADC(%02X) ", src);
disPrintf(disassembly.inst, "ADC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ADC(src);
#endif
}
@ -107,7 +107,7 @@ INSTR void ADC( uint8_t src ) {
(indirect,X) SBC (oper,X) E1 2 6
(indirect),Y SBC (oper),Y F1 2 5*
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INSTR void _SBC( uint8_t src ) {
uint16_t tmp;
@ -138,7 +138,7 @@ INSTR void SBC( uint8_t src ) {
dbgPrintf("SBC(%02X) ", src);
disPrintf(disassembly.inst, "SBC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_SBC(src);
#endif
}

26
src/cpu/jit/instructions/6502_instr_branch.h
View File

@ -25,7 +25,7 @@
#define __6502_INSTR_BRANCH_H__
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INSTR void _BRA( int8_t reladdr ) {
uint8_t pg = m6502.PC >> 8;
m6502.PC += reladdr;
@ -37,7 +37,7 @@ INSTR void _BRA( int8_t reladdr ) {
#endif
dbgPrintf("BRA %04X ", m6502.PC);
}
#endif // DEBUGGER
#endif // DISASSEMBLER
/**
@ -51,7 +51,7 @@ INSTR void BRA( int8_t reladdr ) {
dbgPrintf("BRA ");
disPrintf(disassembly.inst, "BRA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_BRA( reladdr );
#endif
}
@ -71,7 +71,7 @@ INSTR void BCC( int8_t reladdr ) {
dbgPrintf("BCC ");
disPrintf(disassembly.inst, "BCC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( ! m6502.C ) {
_BRA( reladdr );
}
@ -95,7 +95,7 @@ INSTR void BCS( int8_t reladdr ) {
dbgPrintf("BCS ");
disPrintf(disassembly.inst, "BCS");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( m6502.C ) {
_BRA( reladdr );
}
@ -119,7 +119,7 @@ INSTR void BNE( int8_t reladdr ) {
dbgPrintf("BNE ");
disPrintf(disassembly.inst, "BNE");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( ! m6502.Z ) {
_BRA( reladdr );
}
@ -143,7 +143,7 @@ INSTR void BEQ( int8_t reladdr ) {
dbgPrintf("BEQ ");
disPrintf(disassembly.inst, "BEQ");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( m6502.Z ) {
_BRA( reladdr );
}
@ -167,7 +167,7 @@ INSTR void BPL( int8_t reladdr ) {
dbgPrintf("BPL ");
disPrintf(disassembly.inst, "BPL");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( ! m6502.N ) {
_BRA( reladdr );
}
@ -191,7 +191,7 @@ INSTR void BMI( int8_t reladdr ) {
dbgPrintf("BMI ");
disPrintf(disassembly.inst, "BMI");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( m6502.N ) {
_BRA( reladdr );
}
@ -215,7 +215,7 @@ INSTR void BVC( int8_t reladdr ) {
dbgPrintf("BVC ");
disPrintf(disassembly.inst, "BVC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( ! m6502.V ) {
_BRA( reladdr );
}
@ -239,7 +239,7 @@ INSTR void BVS( int8_t reladdr ) {
dbgPrintf("BVS ");
disPrintf(disassembly.inst, "BVS");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
if ( m6502.V ) {
_BRA( reladdr );
}
@ -290,7 +290,7 @@ INSTR void BVS( int8_t reladdr ) {
FF 3 5 zp,rel ........ BBS7 $12,LABEL
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
#define BBR(n) INSTR void BBR##n( uint8_t src, int8_t reladdr ) { \
dbgPrintf("BBR"#n" "); \
disPrintf(disassembly.inst, "BBR"#n); \
@ -315,7 +315,7 @@ disPrintf(disassembly.inst, "BBR"#n); \
BBR(7)
#ifndef DEBUGGER
#ifndef DISASSEMBLER
#define BBS(n) INSTR void BBS##n( uint8_t src, int8_t reladdr ) { \
dbgPrintf("BBS"#n" "); \
disPrintf(disassembly.inst, "BBS"#n); \

10
src/cpu/jit/instructions/6502_instr_call_ret_jump.h
View File

@ -40,7 +40,7 @@ INSTR void JMP( uint16_t addr ) {
dbgPrintf("JMP %04X ", addr);
disPrintf(disassembly.inst, "JMP");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
// disPrintf(disassembly.comment, "to:%04X", addr)
#ifdef DEBUG
if ( addr == m6502.PC - 3 ) {
@ -55,7 +55,7 @@ INSTR void JMP( uint16_t addr ) {
}
#ifndef DEBUGGER
#ifndef DISASSEMBLER
// for patching game purposes -- it should not be inline!
void CALL( uint16_t addr ) {
@ -92,7 +92,7 @@ INSTR void JSR( uint16_t addr ) {
dbgPrintf("JSR ");
disPrintf(disassembly.inst, "JSR");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
PUSH_addr(m6502.PC -1);
m6502.PC = addr;
#endif
@ -112,7 +112,7 @@ INSTR void RTS(void) {
dbgPrintf("RTS ");
disPrintf(disassembly.inst, "RTS");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.PC = POP_addr() +1;
m6502.interrupt = RET;
@ -138,7 +138,7 @@ INSTR void RTI(void) {
dbgPrintf("RTI ");
disPrintf(disassembly.inst, "RTI");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
setFlags( POP() );
// m6502.I = 0;
m6502.PC = POP_addr();

14
src/cpu/jit/instructions/6502_instr_compare_test.h
View File

@ -43,7 +43,7 @@ INSTR void BIT( uint8_t src ) {
dbgPrintf("BIT(%02X) ", src);
disPrintf(disassembly.inst, "BIT");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NV(src);
set_flags_Z(m6502.A & src);
#endif
@ -75,7 +75,7 @@ INSTR void TRB( uint16_t addr ) {
dbgPrintf("TRB(%02X) ", src);
disPrintf(disassembly.inst, "TRB");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_Z( WRLOMEM[addr] & m6502.A );
WRLOMEM[addr] &= ~m6502.A;
#endif
@ -105,7 +105,7 @@ INSTR void TSB( uint16_t addr ) {
dbgPrintf("TSB(%02X) ", src);
disPrintf(disassembly.inst, "TSB");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_Z( WRLOMEM[addr] & m6502.A );
WRLOMEM[addr] |= m6502.A;
#endif
@ -128,7 +128,7 @@ INSTR void TSB( uint16_t addr ) {
(indirect,X) CMP (oper,X) C1 2 6
(indirect),Y CMP (oper),Y D1 2 5*
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INSTR void _CMP( uint8_t src ) {
set_flags_NZC( (int16_t)m6502.A - src );
}
@ -137,7 +137,7 @@ INSTR void CMP( uint8_t src ) {
dbgPrintf("CMP(%02X) ", src);
disPrintf(disassembly.inst, "CMP");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_CMP(src);
#endif
}
@ -158,7 +158,7 @@ INSTR void CPX( uint8_t src ) {
dbgPrintf("CPX(%02X) ", src);
disPrintf(disassembly.inst, "CPX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZC( (int16_t)m6502.X - src );
#endif
}
@ -179,7 +179,7 @@ INSTR void CPY( uint8_t src ) {
dbgPrintf("CPY(%02X) ", src);
disPrintf(disassembly.inst, "CPY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZC( (int16_t)m6502.Y - src );
#endif
}

20
src/cpu/jit/instructions/6502_instr_inc_dec.h
View File

@ -38,7 +38,7 @@
absolute INC oper EE 3 6
absolute,X INC oper,X FE 3 7
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INSTR void _INC( uint16_t addr ) {
set_flags_NZ( ++(WRLOMEM[addr]) );
}
@ -46,7 +46,7 @@ INSTR void _INC( uint16_t addr ) {
INSTR void INC( uint16_t addr ) {
disPrintf(disassembly.inst, "INC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_INC(addr);
#endif
}
@ -65,7 +65,7 @@ INSTR void INX(void) {
dbgPrintf("INX %02X -> ", m6502.X);
disPrintf(disassembly.inst, "INX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( ++m6502.X );
dbgPrintf("%02X ", m6502.X);
#endif
@ -85,7 +85,7 @@ INSTR void INY(void) {
dbgPrintf("INY %02X -> ", m6502.Y);
disPrintf(disassembly.inst, "INY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( ++m6502.Y );
dbgPrintf("%02X ", m6502.Y);
#endif
@ -105,7 +105,7 @@ INSTR void INA(void) {
dbgPrintf("INA %02X -> ", m6502.A);
disPrintf(disassembly.inst, "INA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( ++m6502.A );
dbgPrintf("%02X ", m6502.A);
#endif
@ -124,7 +124,7 @@ INSTR void INA(void) {
absolute DEC oper CE 3 3
absolute,X DEC oper,X DE 3 7
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INSTR void _DEC( uint16_t addr ) {
set_flags_NZ( --(WRLOMEM[addr]) );
}
@ -132,7 +132,7 @@ INSTR void _DEC( uint16_t addr ) {
INSTR void DEC( uint16_t addr ) {
disPrintf(disassembly.inst, "DEC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_DEC(addr);
#endif
}
@ -151,7 +151,7 @@ INSTR void DEX(void) {
dbgPrintf("DEX %02X -> ", m6502.X);
disPrintf(disassembly.inst, "DEX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( --m6502.X );
dbgPrintf("%02X ", m6502.X);
#endif
@ -171,7 +171,7 @@ INSTR void DEY(void) {
dbgPrintf("DEY %02X -> ", m6502.Y);
disPrintf(disassembly.inst, "DEY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( --m6502.Y );
dbgPrintf("%02X ", m6502.Y);
#endif
@ -191,7 +191,7 @@ INSTR void DEA(void) {
dbgPrintf("DEA %02X -> ", m6502.A);
disPrintf(disassembly.inst, "DEA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( --m6502.A );
dbgPrintf("%02X ", m6502.A);
#endif

16
src/cpu/jit/instructions/6502_instr_load_store.h
View File

@ -48,7 +48,7 @@
INSTR void LDA( uint8_t src ) {
dbgPrintf("LDA(%02X) ", src);
disPrintf(disassembly.inst, "LDA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.A = src);
#endif
}
@ -70,7 +70,7 @@ INSTR void LDA( uint8_t src ) {
INSTR void LDX( uint8_t src ) {
dbgPrintf("LDX(%02X) ", src);
disPrintf(disassembly.inst, "LDX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.X = src);
#endif
}
@ -92,7 +92,7 @@ INSTR void LDX( uint8_t src ) {
INSTR void LDY( uint8_t src ) {
dbgPrintf("LDY(%02X) ", src);
disPrintf(disassembly.inst, "LDY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.Y = src);
#endif
}
@ -113,7 +113,7 @@ static char * charConv =
**/
INSTR void STR( uint16_t addr, uint8_t src ) {
dbgPrintf("STR [%04X], %02X ", addr, src );
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_memwrite(addr, src);
#endif
}
@ -137,7 +137,7 @@ INSTR void STR( uint16_t addr, uint8_t src ) {
INSTR void STA( uint16_t addr ) {
dbgPrintf("STA ");
disPrintf(disassembly.inst, "STA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
STR(addr, m6502.A);
#endif
}
@ -157,7 +157,7 @@ INSTR void STA( uint16_t addr ) {
INSTR void STX( uint16_t addr ) {
dbgPrintf("STX ");
disPrintf(disassembly.inst, "STX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
STR(addr, m6502.X);
#endif
}
@ -177,7 +177,7 @@ INSTR void STX( uint16_t addr ) {
INSTR void STY( uint16_t addr ) {
dbgPrintf("STY ");
disPrintf(disassembly.inst, "STY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
STR(addr, m6502.Y);
#endif
}
@ -198,7 +198,7 @@ INSTR void STY( uint16_t addr ) {
INSTR void STZ( uint16_t addr ) {
dbgPrintf("STZ ");
disPrintf(disassembly.inst, "STZ");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
STR(addr, 0);
#endif
}

10
src/cpu/jit/instructions/6502_instr_logic.h
View File

@ -42,7 +42,7 @@
(indirect,X) ORA (oper,X) 01 2 6
(indirect),Y ORA (oper),Y 11 2 5*
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INSTR void _ORA( uint8_t src ) {
set_flags_NZ( m6502.A |= src );
}
@ -51,7 +51,7 @@ INSTR void ORA( uint8_t src ) {
dbgPrintf("ORA(%02X) ", src);
disPrintf(disassembly.inst, "ORA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ORA(src);
#endif
}
@ -73,7 +73,7 @@ INSTR void ORA( uint8_t src ) {
(indirect,X) AND (oper,X) 21 2 6
(indirect),Y AND (oper),Y 31 2 5*
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INSTR void _AND( uint8_t src ) {
set_flags_NZ( m6502.A &= src );
}
@ -82,7 +82,7 @@ INSTR void AND( uint8_t src ) {
dbgPrintf("AND(%02X) ", src);
disPrintf(disassembly.inst, "AND");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_AND(src);
#endif
}
@ -108,7 +108,7 @@ INSTR void EOR( uint8_t src ) {
dbgPrintf("EOR(%02X) ", src);
disPrintf(disassembly.inst, "EOR");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( m6502.A ^= src );
#endif
}

4
src/cpu/jit/instructions/6502_instr_misc.h
View File

@ -39,7 +39,7 @@ INSTR int BRK(void) {
dbgPrintf("BRK ");
disPrintf(disassembly.inst, "BRK");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
PUSH_addr(m6502.PC +1); // PC +2, however, fetch already incremented it by 1
// B flag should be set before pushing flags onto the stack
m6502.B = 1;
@ -57,7 +57,7 @@ INSTR int BRK(void) {
INSTR void HLT(void) {
disPrintf(disassembly.inst, "HLT");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.interrupt = HALT;
#endif
}

18
src/cpu/jit/instructions/6502_instr_set_clr.h
View File

@ -37,7 +37,7 @@
INSTR void CLC(void) {
dbgPrintf("CLC ");
disPrintf(disassembly.inst, "CLC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.C = 0;
#endif
}
@ -55,7 +55,7 @@ INSTR void CLC(void) {
INSTR void CLD(void) {
dbgPrintf("CLD ");
disPrintf(disassembly.inst, "CLD");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.D = 0;
#endif
}
@ -73,7 +73,7 @@ INSTR void CLD(void) {
INSTR void CLI(void) {
dbgPrintf("CLI ");
disPrintf(disassembly.inst, "CLI");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.I = 0;
#endif
}
@ -91,7 +91,7 @@ INSTR void CLI(void) {
INSTR void CLV(void) {
dbgPrintf("CLV ");
disPrintf(disassembly.inst, "CLV");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.V = 0;
#endif
}
@ -109,7 +109,7 @@ INSTR void CLV(void) {
INSTR void SEC(void) {
dbgPrintf("SEC ");
disPrintf(disassembly.inst, "SEC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.C = 1;
#endif
}
@ -127,7 +127,7 @@ INSTR void SEC(void) {
INSTR void SED(void) {
dbgPrintf("SED ");
disPrintf(disassembly.inst, "SED");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.D = 1;
#endif
}
@ -145,7 +145,7 @@ INSTR void SED(void) {
INSTR void SEI(void) {
dbgPrintf("SEI ");
disPrintf(disassembly.inst, "SEI");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.I = 1;
#endif
}
@ -189,7 +189,7 @@ INSTR void SEI(void) {
E7 2 5 zp ........ SMB6 $12
F7 2 5 zp ........ SMB7 $12
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
#define RMB(n) INSTR void RMB##n( uint8_t zpg ) { \
dbgPrintf("RMB"#n" "); \
disPrintf(disassembly.inst, "RMB"#n); \
@ -212,7 +212,7 @@ INSTR void SEI(void) {
RMB(7)
#ifndef DEBUGGER
#ifndef DISASSEMBLER
#define SMB(n) INSTR void SMB##n( uint8_t zpg ) { \
dbgPrintf("SMB"#n" "); \
disPrintf(disassembly.inst, "SMB"#n); \

22
src/cpu/jit/instructions/6502_instr_shift_rotate.h
View File

@ -39,7 +39,7 @@
absolute ASL oper 0E 3 6
absolute,X ASL oper,X 1E 3 7
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INSTR void _ASL( uint16_t addr ) {
m6502.C = _memread(addr) & 0x80;
set_flags_NZ( WRLOMEM[addr] <<= 1 );
@ -49,7 +49,7 @@ INSTR void ASL( uint16_t addr ) {
dbgPrintf("ASL ");
disPrintf(disassembly.inst, "ASL");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ASL(addr);
#endif
}
@ -57,7 +57,7 @@ INSTR void ASLA(void) {
dbgPrintf("ASL ");
disPrintf(disassembly.inst, "ASL");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.C = m6502.A & 0x80;
set_flags_NZ( m6502.A <<= 1 );
#endif
@ -81,7 +81,7 @@ INSTR void LSR( uint16_t addr ) {
dbgPrintf("LSR ");
disPrintf(disassembly.inst, "LSR");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.C = WRLOMEM[addr] & 1;
set_flags_NZ( WRLOMEM[addr] >>= 1 );
#endif
@ -90,7 +90,7 @@ INSTR void LSRA(void) {
dbgPrintf("LSR ");
disPrintf(disassembly.inst, "LSR");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.C = m6502.A & 1;
set_flags_NZ( m6502.A >>= 1 );
#endif
@ -110,7 +110,7 @@ INSTR void LSRA(void) {
absolute ROL oper 2E 3 6
absolute,X ROL oper,X 3E 3 7
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INSTR void _ROL( uint16_t addr ) {
uint8_t C = m6502.C != 0;
m6502.C = WRLOMEM[addr] & 0x80;
@ -122,7 +122,7 @@ INSTR void ROL( uint16_t addr ) {
dbgPrintf("ROL ");
disPrintf(disassembly.inst, "ROL");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ROL(addr);
#endif
}
@ -130,7 +130,7 @@ INSTR void ROLA(void) {
dbgPrintf("ROL ");
disPrintf(disassembly.inst, "ROL");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
uint8_t C = m6502.C != 0;
m6502.C = m6502.A & 0x80;
m6502.A <<= 1;
@ -152,7 +152,7 @@ INSTR void ROLA(void) {
absolute ROR oper 6E 3 6
absolute,X ROR oper,X 7E 3 7
**/
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INSTR void _ROR( uint16_t addr ) {
uint8_t C = m6502.C != 0;
m6502.C = WRLOMEM[addr] & 1;
@ -164,7 +164,7 @@ INSTR void ROR( uint16_t addr ) {
dbgPrintf("ROR ");
disPrintf(disassembly.inst, "ROR");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ROR(addr);
#endif
}
@ -172,7 +172,7 @@ INSTR void RORA(void) {
dbgPrintf("ROR ");
disPrintf(disassembly.inst, "ROR");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
uint8_t C = m6502.C != 0;
m6502.C = m6502.A & 1;
m6502.A >>= 1;

26
src/cpu/jit/instructions/6502_instr_stack.h
View File

@ -27,7 +27,7 @@
static const uint16_t stack_base_addr = 0x100;
#ifndef DEBUGGER
#ifndef DISASSEMBLER
INSTR void PUSH( uint8_t src ) {
// DO NOT MAKE IT NICER! faster this way!
WRLOMEM[ stack_base_addr | m6502.SP-- ] = src;
@ -46,7 +46,7 @@ INSTR void PUSH_addr( uint16_t addr ) {
INLINE uint16_t POP_addr(void) {
return POP() + ( POP() << 8 );
}
#endif // DEBUGGER
#endif // DISASSEMBLER
/**
PHA Push Accumulator on Stack
@ -62,7 +62,7 @@ INSTR void PHA(void) {
dbgPrintf("PHA %02X ", m6502.A);
disPrintf(disassembly.inst, "PHA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
PUSH( m6502.A );
#endif
}
@ -81,7 +81,7 @@ INSTR void PHX(void) {
dbgPrintf("PHX %02X ", m6502.X);
disPrintf(disassembly.inst, "PHX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
PUSH( m6502.X );
#endif
}
@ -100,7 +100,7 @@ INSTR void PHY(void) {
dbgPrintf("PHY %02X ", m6502.Y);
disPrintf(disassembly.inst, "PHY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
PUSH( m6502.Y );
#endif
}
@ -116,14 +116,14 @@ INSTR void PHY(void) {
implied PLA 68 1 4
**/
INSTR void PLA(void) {
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.A = POP();
#endif
dbgPrintf("PLA %02X ", m6502.A);
disPrintf(disassembly.inst, "PLA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( m6502.A );
#endif
}
@ -139,14 +139,14 @@ INSTR void PLA(void) {
implied PLX 68 1 4
**/
INSTR void PLX(void) {
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.X = POP();
#endif
dbgPrintf("PLX %02X ", m6502.X);
disPrintf(disassembly.inst, "PLX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( m6502.X );
#endif
}
@ -162,14 +162,14 @@ INSTR void PLX(void) {
implied PLY 68 1 4
**/
INSTR void PLY(void) {
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.Y = POP();
#endif
dbgPrintf("PLY %02X ", m6502.Y);
disPrintf(disassembly.inst, "PLY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( m6502.Y );
#endif
}
@ -188,7 +188,7 @@ INSTR void PHP(void) {
dbgPrintf("PHP %02X ", m6502.SR);
disPrintf(disassembly.inst, "PHP");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
PUSH( getFlags().SR ); // res and B flag should be set
#endif
}
@ -204,7 +204,7 @@ INSTR void PHP(void) {
implied PLP 28 1 4
**/
INSTR void PLP(void) {
#ifndef DEBUGGER
#ifndef DISASSEMBLER
setFlags(POP() | 0x30); // res and B flag should be set
#endif

12
src/cpu/jit/instructions/6502_instr_transfer.h
View File

@ -39,7 +39,7 @@ INSTR void TAX(void) {
dbgPrintf("TAX(%02X) ", m6502.A);
disPrintf(disassembly.inst, "TAX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.X = m6502.A);
#endif
}
@ -58,7 +58,7 @@ INSTR void TXA(void) {
dbgPrintf("TXA(%02X) ", m6502.X);
disPrintf(disassembly.inst, "TXA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.A = m6502.X);
#endif
}
@ -78,7 +78,7 @@ INSTR void TAY(void) {
dbgPrintf("TAY ");
disPrintf(disassembly.inst, "TAY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.Y = m6502.A);
#endif
}
@ -97,7 +97,7 @@ INSTR void TYA(void) {
dbgPrintf("TYA(%02X) ", m6502.Y);
disPrintf(disassembly.inst, "TYA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.A = m6502.Y);
#endif
}
@ -116,7 +116,7 @@ INSTR void TSX(void) {
dbgPrintf("TSX(%02X) ", m6502.SP);
disPrintf(disassembly.inst, "TSX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.X = m6502.SP);
#endif
}
@ -135,7 +135,7 @@ INSTR void TXS(void) {
dbgPrintf("TXS(%02X) ", m6502.X);
disPrintf(disassembly.inst, "TXS");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.SP = m6502.X;
#endif
}

36
src/cpu/jit/instructions/6502_instr_undoc.h
View File

@ -35,7 +35,7 @@ ANC - "AND" Memory with Accumulator
INSTR void ANC ( uint8_t src ) {
disPrintf(disassembly.inst, "ANC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( m6502.A &= src );
m6502.C = m6502.A >> 7;
#endif
@ -55,7 +55,7 @@ INSTR void ANC ( uint8_t src ) {
INSTR void ARC ( uint8_t src ) {
disPrintf(disassembly.inst, "ARC");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_AND(src);
m6502.C = m6502.A >> 7;
@ -77,7 +77,7 @@ INSTR void ARC ( uint8_t src ) {
INSTR void ASR ( uint8_t src ) {
disPrintf(disassembly.inst, "ASR");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
// AND
m6502.A &= src;
@ -97,7 +97,7 @@ INSTR void ASR ( uint8_t src ) {
**/
INSTR void DCP ( uint16_t addr ) {
disPrintf(disassembly.inst, "DCP");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_DEC(addr);
_CMP(WRLOMEM[addr]);
#endif
@ -109,7 +109,7 @@ INSTR void DCP ( uint16_t addr ) {
**/
INSTR void LAS ( uint8_t src ) {
disPrintf(disassembly.inst, "LAS");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( m6502.A = m6502.X = m6502.SP = m6502.SP & src );
#endif
}
@ -124,7 +124,7 @@ INSTR void LAS ( uint8_t src ) {
**/
INSTR void ISB ( uint16_t addr ) {
disPrintf(disassembly.inst, "ISB");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_INC(addr);
_SBC(WRLOMEM[addr]);
#endif
@ -138,7 +138,7 @@ INSTR void ISB ( uint16_t addr ) {
**/
INSTR void LAX ( uint8_t src ) {
disPrintf(disassembly.inst, "LAX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ(m6502.A = m6502.X = src);
#endif
}
@ -154,7 +154,7 @@ INSTR void LAX ( uint8_t src ) {
INSTR void RLA ( uint16_t addr ) {
disPrintf(disassembly.inst, "RLA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ROL(addr);
_AND(WRLOMEM[addr]);
#endif
@ -170,7 +170,7 @@ INSTR void RLA ( uint16_t addr ) {
**/
INSTR void RRA ( uint16_t addr ) {
disPrintf(disassembly.inst, "RRA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ROR(addr);
_ADC(WRLOMEM[addr]);
#endif
@ -187,7 +187,7 @@ INSTR void RRA ( uint16_t addr ) {
INSTR void SAS ( uint16_t addr ) {
disPrintf(disassembly.inst, "SAS");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
m6502.SP = m6502.A & m6502.X;
set_flags_NZ( WRLOMEM[addr] = m6502.SP & ((addr >> 8) + 1) );
#endif
@ -218,7 +218,7 @@ INSTR void SAS ( uint16_t addr ) {
INSTR void SBX ( uint8_t src ) {
disPrintf(disassembly.inst, "SBX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
uint16_t tmp;
// Decimal flag is ignored
@ -239,7 +239,7 @@ INSTR void SBX ( uint8_t src ) {
INSTR void SHA ( uint16_t addr ) {
disPrintf(disassembly.inst, "SHA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( WRLOMEM[addr] = m6502.X & m6502.A & ((addr >> 8) + 1) );
#endif
}
@ -253,7 +253,7 @@ INSTR void SHA ( uint16_t addr ) {
INSTR void SHY ( uint16_t addr ) {
disPrintf(disassembly.inst, "SHY");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( WRLOMEM[addr] = m6502.Y &((addr >> 8) + 1) );
#endif
}
@ -267,7 +267,7 @@ INSTR void SHY ( uint16_t addr ) {
INSTR void SHX ( uint16_t addr ) {
disPrintf(disassembly.inst, "SHX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( WRLOMEM[addr] = m6502.X &((addr >> 8) + 1) );
#endif
}
@ -286,7 +286,7 @@ INSTR void SHX ( uint16_t addr ) {
INSTR void SLO ( uint16_t addr ) {
disPrintf(disassembly.inst, "SLO");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
_ASL(addr);
_ORA( WRLOMEM[addr] );
set_flags_NZ( WRLOMEM[addr] = m6502.A ); // A -> M
@ -302,7 +302,7 @@ INSTR void SLO ( uint16_t addr ) {
INSTR void SAX ( uint16_t addr ) {
disPrintf(disassembly.inst, "SAX");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( WRLOMEM[addr] = m6502.A & m6502.X );
#endif
}
@ -319,7 +319,7 @@ INSTR void SAX ( uint16_t addr ) {
INSTR void SRE ( uint16_t addr ) {
disPrintf(disassembly.inst, "SRE");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
// LSR
m6502.C = WRLOMEM[addr] & 1;
set_flags_NZ( WRLOMEM[addr] >>= 1 );
@ -337,7 +337,7 @@ XAA - "AND" Memory with Index X into Accumulator
**/
INSTR void XAA ( uint8_t src ) {
disPrintf(disassembly.inst, "XAA");
#ifndef DEBUGGER
#ifndef DISASSEMBLER
set_flags_NZ( m6502.A = m6502.X & src );
#endif
}

8
src/dev/mem/mmio.h
View File

@ -89,7 +89,7 @@ extern void setIO ( uint16_t ioaddr, uint8_t val );
extern void save_RAM(void);
#ifndef DEBUGGER
#ifndef DISASSEMBLER
extern uint8_t getMEM ( uint16_t ioaddr );
extern uint16_t getMEM16 ( uint16_t ioaddr );
extern uint32_t getMEM32 ( uint16_t ioaddr );
@ -466,7 +466,7 @@ INLINE uint8_t _src_zp_Y(void);
INLINE uint8_t _src_zp_Y_dis(void);
#ifndef DEBUGGER
#ifndef DISASSEMBLER
#define fetch() _fetch()
#define fetch16() _fetch16()
@ -498,7 +498,7 @@ INLINE uint8_t _src_zp_Y_dis(void);
#define addr_zp_Y() _addr_zp_Y()
#define src_zp_Y() _src_zp_Y()
#else // DEBUGGER
#else // DISASSEMBLER
#define fetch() _fetch_dis()
#define fetch16() _fetch16_dis()
@ -530,7 +530,7 @@ INLINE uint8_t _src_zp_Y_dis(void);
#define addr_zp_Y() _addr_zp_Y_dis()
#define src_zp_Y() _src_zp_Y_dis()
#endif // DEBUGGER
#endif // DISASSEMBLER
#endif // __APPLE2_MMIO_H__

2
src/util/disassembler.h
View File

@ -59,7 +59,7 @@ extern void _disPuts( char ** s, const char * from );
extern void _disPrintf( char * s, const size_t n, const char * fmt, ... );
extern void _disNewInstruction(void);
#if defined(DISASS_TRACE) || defined(DEBUGGER)
#if defined(DISASS_TRACE) || defined(DISASSEMBLER)
#define disHexB( s, b ) _disHexB( &(s), (b) )
#define disHexW( s, w ) _disHexW( &(s), (w) )