Fixed Reset issues on //e

Performance enhancements
This commit is contained in:
tudnai 2020-04-30 07:26:46 -07:00
parent f56a2cb8c6
commit 5443d91fc7
6 changed files with 98 additions and 56 deletions

View File

@ -102,7 +102,6 @@ class ViewController: NSViewController {
var workItem : DispatchWorkItem? = nil;
@IBAction func Power(_ sender: Any) {
#if SPEEDTEST
if ( workItem != nil ) {
workItem!.cancel();
@ -119,7 +118,15 @@ class ViewController: NSViewController {
DispatchQueue.global().async(execute: workItem!);
}
#else
upd.suspend()
halted = true
usleep(100000);
m6502_ColdReset( Bundle.main.resourcePath, ViewController.romFileName )
halted = false
upd.resume()
#endif
}
@ -372,6 +379,8 @@ class ViewController: NSViewController {
var frameCounter : UInt = 0
var clkCounter : Double = 0
var halted = true;
func Update() {
clk_6502_per_frm_max = 0
@ -509,7 +518,9 @@ class ViewController: NSViewController {
#if SPEEDTEST
#else
m6502_Run()
if ( !halted ) {
m6502_Run()
}
#endif
@ -527,7 +538,7 @@ class ViewController: NSViewController {
let upd = RepeatingTimer(timeInterval: 1/Double(fps))
override func viewDidLoad() {
super.viewDidLoad()
@ -616,7 +627,7 @@ class ViewController: NSViewController {
@IBAction func speedSelected(_ sender: NSButton) {
if ( sender.title == "MAX" ) {
setCPUClockSpeed(freq: 9999)
setCPUClockSpeed(freq: 1000)
}
else if let freq = Double( sender.title ) {
setCPUClockSpeed(freq: freq)

View File

@ -373,7 +373,6 @@ class ViewController: UIViewController {
let upd = RepeatingTimer(timeInterval: 1/Double(fps))
override var prefersStatusBarHidden: Bool {
return true

View File

@ -39,7 +39,7 @@ const unsigned long long startup_MHz_6502 = 25 * M;
unsigned long long MHz_6502 = default_MHz_6502;
unsigned long long clk_6502_per_frm = startup_MHz_6502 / fps;
unsigned long long clk_6502_per_frm_set = default_MHz_6502 / fps;
unsigned long long clk_6502_per_frm_max = default_MHz_6502 / fps;
unsigned long long clk_6502_per_frm_max = 0;
unsigned long long tick_per_sec = G;
@ -887,14 +887,14 @@ void rom_loadFile( const char * bundlePath, const char * filename ) {
else if ( flen == 16 * KB ) {
read_rom( bundlePath, filename, Apple2_16K_ROM, 0);
memcpy(Apple2_12K_ROM + 0x0000, Apple2_16K_ROM + 0x1000, sizeof(Apple2_12K_ROM));
memcpy(Apple2_64K_RAM + 0xC000, Apple2_16K_ROM, 0x1000);
// memcpy(Apple2_64K_RAM + 0xC000, Apple2_16K_ROM, 0x1000);
SWITCH_CX_ROM( RAM_PG_RD_TBL, 0xC0, Apple2_16K_ROM, 0x00);
// SWITCH_CX_ROM( RAM_PG_RD_TBL, 0xC0, Apple2_16K_ROM, 0x00);
}
else if ( flen == 12 * KB ) {
read_rom( bundlePath, filename, Apple2_12K_ROM, 0);
memcpy(Apple2_64K_RAM + 0xD000, Apple2_12K_ROM, sizeof(Apple2_12K_ROM));
// memcpy(Apple2_64K_RAM + 0xD000, Apple2_12K_ROM, sizeof(Apple2_12K_ROM));
}
// read_rom( bundlePath, "Apple2Plus.rom", Apple2_12K_ROM, 0);
@ -915,6 +915,12 @@ void m6502_ColdReset( const char * bundlePath, const char * romFileName ) {
inst_cnt = 0;
mhz = (double)MHz_6502 / M;
unsigned long long saved_frm_set = clk_6502_per_frm_set;
clk_6502_per_frm_max = clk_6502_per_frm_set = 0;
// wait 100ms to be sure simulation has been halted
usleep(100000);
printf("Bundlepath: %s", bundlePath);
// epoch = rdtsc();
@ -1071,6 +1077,8 @@ void m6502_ColdReset( const char * bundlePath, const char * romFileName ) {
// memcpy( RAM + 0x1000, counter_fast, sizeof(counter));
// m6502.PC = 0x1000;
clk_6502_per_frm_set = saved_frm_set;
}

View File

@ -17,7 +17,7 @@ disk_t disk = {
0, // clk_since_last_read
};
const int diskAccelerator_frames = 2;
const int diskAccelerator_frames = 5;
int diskAccelerator_count = 10;
int diskAccelerator_speed = 25; // less than actual CPU speed means no acceleration
//const unsigned long long clk_6502_per_frm_diskAccelerator = 25 * M / fps; // disk acceleration bumps up CPU clock to 25 MHz

View File

@ -82,7 +82,26 @@ uint8_t * const RAM = Apple2_64K_RAM; // Pointer to the main memory
/* (tbl)[ (tpg) + 0x00 ] = DEF_RAM_PAGE(mem, (mpg) + 0x00); */ \
(tbl)[ (tpg) + 0x01 ] = DEF_RAM_PAGE(mem, (mpg) + 0x01); \
(tbl)[ (tpg) + 0x02 ] = DEF_RAM_PAGE(mem, (mpg) + 0x02); \
/* (tbl)[ (tpg) + 0x03 ] = DEF_RAM_PAGE(mem, (mpg) + 0x03); */ \
(tbl)[ (tpg) + 0x03 ] = DEF_RAM_PAGE(mem, (mpg) + 0x03); \
(tbl)[ (tpg) + 0x04 ] = DEF_RAM_PAGE(mem, (mpg) + 0x04); \
(tbl)[ (tpg) + 0x05 ] = DEF_RAM_PAGE(mem, (mpg) + 0x05); \
(tbl)[ (tpg) + 0x06 ] = DEF_RAM_PAGE(mem, (mpg) + 0x06); \
(tbl)[ (tpg) + 0x07 ] = DEF_RAM_PAGE(mem, (mpg) + 0x07); \
(tbl)[ (tpg) + 0x08 ] = DEF_RAM_PAGE(mem, (mpg) + 0x08); \
(tbl)[ (tpg) + 0x09 ] = DEF_RAM_PAGE(mem, (mpg) + 0x09); \
(tbl)[ (tpg) + 0x0A ] = DEF_RAM_PAGE(mem, (mpg) + 0x0A); \
(tbl)[ (tpg) + 0x0B ] = DEF_RAM_PAGE(mem, (mpg) + 0x0B); \
(tbl)[ (tpg) + 0x0C ] = DEF_RAM_PAGE(mem, (mpg) + 0x0C); \
(tbl)[ (tpg) + 0x0D ] = DEF_RAM_PAGE(mem, (mpg) + 0x0D); \
(tbl)[ (tpg) + 0x0E ] = DEF_RAM_PAGE(mem, (mpg) + 0x0E); \
(tbl)[ (tpg) + 0x0F ] = DEF_RAM_PAGE(mem, (mpg) + 0x0F);
#define SWITCH_RAM_PAGE16( tbl,tpg, mem,mpg ) \
(tbl)[ (tpg) + 0x00 ] = DEF_RAM_PAGE(mem, (mpg) + 0x00); \
(tbl)[ (tpg) + 0x01 ] = DEF_RAM_PAGE(mem, (mpg) + 0x01); \
(tbl)[ (tpg) + 0x02 ] = DEF_RAM_PAGE(mem, (mpg) + 0x02); \
(tbl)[ (tpg) + 0x03 ] = DEF_RAM_PAGE(mem, (mpg) + 0x03); \
(tbl)[ (tpg) + 0x04 ] = DEF_RAM_PAGE(mem, (mpg) + 0x04); \
(tbl)[ (tpg) + 0x05 ] = DEF_RAM_PAGE(mem, (mpg) + 0x05); \
(tbl)[ (tpg) + 0x06 ] = DEF_RAM_PAGE(mem, (mpg) + 0x06); \
@ -107,25 +126,22 @@ uint8_t * const RAM = Apple2_64K_RAM; // Pointer to the main memory
(tbl)[ 0x08 ] = DEF_RAM_PAGE(mem, 0x08); \
(tbl)[ 0x09 ] = DEF_RAM_PAGE(mem, 0x09); \
(tbl)[ 0x0A ] = DEF_RAM_PAGE(mem, 0x0A); \
(tbl)[ 0x0B ] = DEF_RAM_PAGE(mem, 0x0B);
#define SWITCH_RAM_PAGE16( tbl,tpg, mem,mpg ) \
(tbl)[ (tpg) + 0x00 ] = DEF_RAM_PAGE(mem, (mpg) + 0x00); \
(tbl)[ (tpg) + 0x01 ] = DEF_RAM_PAGE(mem, (mpg) + 0x01); \
(tbl)[ (tpg) + 0x02 ] = DEF_RAM_PAGE(mem, (mpg) + 0x02); \
(tbl)[ (tpg) + 0x03 ] = DEF_RAM_PAGE(mem, (mpg) + 0x03); \
(tbl)[ (tpg) + 0x04 ] = DEF_RAM_PAGE(mem, (mpg) + 0x04); \
(tbl)[ (tpg) + 0x05 ] = DEF_RAM_PAGE(mem, (mpg) + 0x05); \
(tbl)[ (tpg) + 0x06 ] = DEF_RAM_PAGE(mem, (mpg) + 0x06); \
(tbl)[ (tpg) + 0x07 ] = DEF_RAM_PAGE(mem, (mpg) + 0x07); \
(tbl)[ (tpg) + 0x08 ] = DEF_RAM_PAGE(mem, (mpg) + 0x08); \
(tbl)[ (tpg) + 0x09 ] = DEF_RAM_PAGE(mem, (mpg) + 0x09); \
(tbl)[ (tpg) + 0x0A ] = DEF_RAM_PAGE(mem, (mpg) + 0x0A); \
(tbl)[ (tpg) + 0x0B ] = DEF_RAM_PAGE(mem, (mpg) + 0x0B); \
(tbl)[ (tpg) + 0x0C ] = DEF_RAM_PAGE(mem, (mpg) + 0x0C); \
(tbl)[ (tpg) + 0x0D ] = DEF_RAM_PAGE(mem, (mpg) + 0x0D); \
(tbl)[ (tpg) + 0x0E ] = DEF_RAM_PAGE(mem, (mpg) + 0x0E); \
(tbl)[ (tpg) + 0x0F ] = DEF_RAM_PAGE(mem, (mpg) + 0x0F);
(tbl)[ 0x0B ] = DEF_RAM_PAGE(mem, 0x0B); \
(tbl)[ 0x0B ] = DEF_RAM_PAGE(mem, 0x0C); \
(tbl)[ 0x0B ] = DEF_RAM_PAGE(mem, 0x0D); \
(tbl)[ 0x0B ] = DEF_RAM_PAGE(mem, 0x0E); \
(tbl)[ 0x0B ] = DEF_RAM_PAGE(mem, 0x0F); \
SWITCH_RAM_PAGE16( tbl, 0x10, mem, 0x10 ); \
SWITCH_RAM_PAGE16( tbl, 0x20, mem, 0x20 ); \
SWITCH_RAM_PAGE16( tbl, 0x30, mem, 0x30 ); \
SWITCH_RAM_PAGE16( tbl, 0x40, mem, 0x40 ); \
SWITCH_RAM_PAGE16( tbl, 0x50, mem, 0x50 ); \
SWITCH_RAM_PAGE16( tbl, 0x60, mem, 0x60 ); \
SWITCH_RAM_PAGE16( tbl, 0x70, mem, 0x70 ); \
SWITCH_RAM_PAGE16( tbl, 0x80, mem, 0x80 ); \
SWITCH_RAM_PAGE16( tbl, 0x90, mem, 0x90 ); \
SWITCH_RAM_PAGE16( tbl, 0xA0, mem, 0xA0 ); \
SWITCH_RAM_PAGE16( tbl, 0xB0, mem, 0xB0 );
#define DEF_RAM_DUMMY16 \
@ -243,7 +259,7 @@ enum slot {
};
MEMcfg_t MEMcfg = { 1, 0, 0, 0, 0, 0, 0, 0, 0 };
MEMcfg_t MEMcfg = { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
// https://www.kreativekorp.com/miscpages/a2info/iomemory.shtml
// Comp: O = Apple II+ E = Apple IIe C = Apple IIc G = Apple IIgs
@ -359,20 +375,20 @@ void resetMemory() {
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xF0, Apple2_12K_ROM, 0x20) // F0
// 48K main memory
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x00, Apple2_64K_RAM, 0x00)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x10, Apple2_64K_RAM, 0x10)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x20, Apple2_64K_RAM, 0x20)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x30, Apple2_64K_RAM, 0x30)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x40, Apple2_64K_RAM, 0x40)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x50, Apple2_64K_RAM, 0x50)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x60, Apple2_64K_RAM, 0x60)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x70, Apple2_64K_RAM, 0x70)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x80, Apple2_64K_RAM, 0x80)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x90, Apple2_64K_RAM, 0x90)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xA0, Apple2_64K_RAM, 0xA0)
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xB0, Apple2_64K_RAM, 0xB0)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x00, Apple2_64K_RAM, 0x00)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x10, Apple2_64K_RAM, 0x10)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x20, Apple2_64K_RAM, 0x20)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x30, Apple2_64K_RAM, 0x30)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x40, Apple2_64K_RAM, 0x40)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x50, Apple2_64K_RAM, 0x50)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x60, Apple2_64K_RAM, 0x60)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x70, Apple2_64K_RAM, 0x70)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x80, Apple2_64K_RAM, 0x80)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x90, Apple2_64K_RAM, 0x90)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xA0, Apple2_64K_RAM, 0xA0)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xB0, Apple2_64K_RAM, 0xB0)
// I/O Addresses
SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xC0, Apple2_64K_RAM, 0xC0)
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xC0, Apple2_64K_RAM, 0xC0)
// NO Writing to the ROM
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xD0, Apple2_Dummy_RAM, 0 );
SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xE0, Apple2_Dummy_RAM, 0 );
@ -387,15 +403,21 @@ void resetMemory() {
MEMcfg.is_80STORE = 0;
MEMcfg.RD_AUX_MEM = 0;
MEMcfg.WR_AUX_MEM = 0;
MEMcfg.int_Cx_ROM = 0;
MEMcfg.ALT_ZP = 0;
MEMcfg.RD_AUX_MEM = 0;
MEMcfg.WR_AUX_MEM = 0;
MEMcfg.txt_page_2 = 0;
// Aux Video Memory
memset( AUX, 0, sizeof(Apple2_64K_AUX) );
memset( Apple2_64K_AUX, 0, sizeof(Apple2_64K_AUX) );
// 64K Main Memory Area
memset( RAM, 0, sizeof(Apple2_64K_RAM) );
memset( Apple2_64K_RAM, 0, sizeof(Apple2_64K_RAM) );
// 16K Memory Expansion
memset( RAM, 0, sizeof(Apple2_16K_RAM) );
memset( Apple2_16K_RAM, 0, sizeof(Apple2_16K_RAM) );
// I/O area should be 0 -- just in case we decide to init RAM with a different pattern...
memset( RAM + 0xC000, 0, 0x1000 );
memset( Apple2_64K_RAM + 0xC000, 0, 0x1000 );
}
@ -716,14 +738,6 @@ INLINE void ioWrite( uint16_t addr, uint8_t val ) {
RAM[io_KBD] &= 0x7F;
break;
case io_SETSLOTCXROM:
// printf("io_SETSLOTCXROM\n");
MEMcfg.int_Cx_ROM = 0;
// SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xC0, Apple2_64K_RAM, 0xC0);
SWITCH_CX_ROM( RAM_PG_RD_TBL, 0xC0, Apple2_64K_RAM, 0xC0);
// RAM_PG_RD_TBL[ 0xC0 ] = DEF_RAM_PAGE(Apple2_64K_RAM, 0xC0);
break;
case io_RDMAINRAM:
// printf("io_RDMAINRAM\n");
MEMcfg.RD_AUX_MEM = 0;
@ -760,6 +774,12 @@ INLINE void ioWrite( uint16_t addr, uint8_t val ) {
SWITCH_STACK_ZP(RAM_PG_WR_TBL, Apple2_64K_AUX);
break;
case io_SETSLOTCXROM:
// printf("io_SETSLOTCXROM\n");
MEMcfg.int_Cx_ROM = 0;
SWITCH_CX_ROM( RAM_PG_RD_TBL, 0xC0, Apple2_64K_RAM, 0xC0);
break;
case io_SETINTCXROM:
// printf("io_SETINTCXROM\n");
MEMcfg.int_Cx_ROM = 1;

View File

@ -63,4 +63,8 @@ class RepeatingTimer {
state = .suspended
timer.suspend()
}
func kill() {
timer.cancel()
}
}