mirror of
https://github.com/trudnai/Steve2.git
synced 2025-04-09 19:37:52 +00:00
Fixed Reset issues on //e
Performance enhancements
This commit is contained in:
tudnai
parent
f56a2cb8c6
commit
5443d91fc7
@ -102,7 +102,6 @@ class ViewController: NSViewController {
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var workItem : DispatchWorkItem? = nil;
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@IBAction func Power(_ sender: Any) {
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#if SPEEDTEST
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if ( workItem != nil ) {
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workItem!.cancel();
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@ -119,7 +118,15 @@ class ViewController: NSViewController {
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DispatchQueue.global().async(execute: workItem!);
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}
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#else
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upd.suspend()
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halted = true
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usleep(100000);
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m6502_ColdReset( Bundle.main.resourcePath, ViewController.romFileName )
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halted = false
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upd.resume()
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#endif
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}
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@ -372,6 +379,8 @@ class ViewController: NSViewController {
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var frameCounter : UInt = 0
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var clkCounter : Double = 0
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var halted = true;
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func Update() {
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clk_6502_per_frm_max = 0
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@ -509,7 +518,9 @@ class ViewController: NSViewController {
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#if SPEEDTEST
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#else
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m6502_Run()
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if ( !halted ) {
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m6502_Run()
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}
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#endif
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@ -527,7 +538,7 @@ class ViewController: NSViewController {
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let upd = RepeatingTimer(timeInterval: 1/Double(fps))
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override func viewDidLoad() {
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super.viewDidLoad()
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@ -616,7 +627,7 @@ class ViewController: NSViewController {
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@IBAction func speedSelected(_ sender: NSButton) {
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if ( sender.title == "MAX" ) {
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setCPUClockSpeed(freq: 9999)
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setCPUClockSpeed(freq: 1000)
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}
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else if let freq = Double( sender.title ) {
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setCPUClockSpeed(freq: freq)
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@ -373,7 +373,6 @@ class ViewController: UIViewController {
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let upd = RepeatingTimer(timeInterval: 1/Double(fps))
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override var prefersStatusBarHidden: Bool {
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return true
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@ -39,7 +39,7 @@ const unsigned long long startup_MHz_6502 = 25 * M;
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unsigned long long MHz_6502 = default_MHz_6502;
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unsigned long long clk_6502_per_frm = startup_MHz_6502 / fps;
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unsigned long long clk_6502_per_frm_set = default_MHz_6502 / fps;
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unsigned long long clk_6502_per_frm_max = default_MHz_6502 / fps;
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unsigned long long clk_6502_per_frm_max = 0;
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unsigned long long tick_per_sec = G;
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@ -887,14 +887,14 @@ void rom_loadFile( const char * bundlePath, const char * filename ) {
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else if ( flen == 16 * KB ) {
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read_rom( bundlePath, filename, Apple2_16K_ROM, 0);
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memcpy(Apple2_12K_ROM + 0x0000, Apple2_16K_ROM + 0x1000, sizeof(Apple2_12K_ROM));
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memcpy(Apple2_64K_RAM + 0xC000, Apple2_16K_ROM, 0x1000);
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// memcpy(Apple2_64K_RAM + 0xC000, Apple2_16K_ROM, 0x1000);
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SWITCH_CX_ROM( RAM_PG_RD_TBL, 0xC0, Apple2_16K_ROM, 0x00);
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// SWITCH_CX_ROM( RAM_PG_RD_TBL, 0xC0, Apple2_16K_ROM, 0x00);
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}
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else if ( flen == 12 * KB ) {
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read_rom( bundlePath, filename, Apple2_12K_ROM, 0);
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memcpy(Apple2_64K_RAM + 0xD000, Apple2_12K_ROM, sizeof(Apple2_12K_ROM));
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// memcpy(Apple2_64K_RAM + 0xD000, Apple2_12K_ROM, sizeof(Apple2_12K_ROM));
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}
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// read_rom( bundlePath, "Apple2Plus.rom", Apple2_12K_ROM, 0);
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@ -915,6 +915,12 @@ void m6502_ColdReset( const char * bundlePath, const char * romFileName ) {
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inst_cnt = 0;
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mhz = (double)MHz_6502 / M;
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unsigned long long saved_frm_set = clk_6502_per_frm_set;
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clk_6502_per_frm_max = clk_6502_per_frm_set = 0;
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// wait 100ms to be sure simulation has been halted
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usleep(100000);
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printf("Bundlepath: %s", bundlePath);
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// epoch = rdtsc();
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@ -1071,6 +1077,8 @@ void m6502_ColdReset( const char * bundlePath, const char * romFileName ) {
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// memcpy( RAM + 0x1000, counter_fast, sizeof(counter));
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// m6502.PC = 0x1000;
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clk_6502_per_frm_set = saved_frm_set;
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}
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@ -17,7 +17,7 @@ disk_t disk = {
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0, // clk_since_last_read
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};
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const int diskAccelerator_frames = 2;
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const int diskAccelerator_frames = 5;
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int diskAccelerator_count = 10;
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int diskAccelerator_speed = 25; // less than actual CPU speed means no acceleration
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//const unsigned long long clk_6502_per_frm_diskAccelerator = 25 * M / fps; // disk acceleration bumps up CPU clock to 25 MHz
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@ -82,7 +82,26 @@ uint8_t * const RAM = Apple2_64K_RAM; // Pointer to the main memory
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/* (tbl)[ (tpg) + 0x00 ] = DEF_RAM_PAGE(mem, (mpg) + 0x00); */ \
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(tbl)[ (tpg) + 0x01 ] = DEF_RAM_PAGE(mem, (mpg) + 0x01); \
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(tbl)[ (tpg) + 0x02 ] = DEF_RAM_PAGE(mem, (mpg) + 0x02); \
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/* (tbl)[ (tpg) + 0x03 ] = DEF_RAM_PAGE(mem, (mpg) + 0x03); */ \
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(tbl)[ (tpg) + 0x03 ] = DEF_RAM_PAGE(mem, (mpg) + 0x03); \
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(tbl)[ (tpg) + 0x04 ] = DEF_RAM_PAGE(mem, (mpg) + 0x04); \
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(tbl)[ (tpg) + 0x05 ] = DEF_RAM_PAGE(mem, (mpg) + 0x05); \
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(tbl)[ (tpg) + 0x06 ] = DEF_RAM_PAGE(mem, (mpg) + 0x06); \
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(tbl)[ (tpg) + 0x07 ] = DEF_RAM_PAGE(mem, (mpg) + 0x07); \
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(tbl)[ (tpg) + 0x08 ] = DEF_RAM_PAGE(mem, (mpg) + 0x08); \
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(tbl)[ (tpg) + 0x09 ] = DEF_RAM_PAGE(mem, (mpg) + 0x09); \
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(tbl)[ (tpg) + 0x0A ] = DEF_RAM_PAGE(mem, (mpg) + 0x0A); \
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(tbl)[ (tpg) + 0x0B ] = DEF_RAM_PAGE(mem, (mpg) + 0x0B); \
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(tbl)[ (tpg) + 0x0C ] = DEF_RAM_PAGE(mem, (mpg) + 0x0C); \
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(tbl)[ (tpg) + 0x0D ] = DEF_RAM_PAGE(mem, (mpg) + 0x0D); \
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(tbl)[ (tpg) + 0x0E ] = DEF_RAM_PAGE(mem, (mpg) + 0x0E); \
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(tbl)[ (tpg) + 0x0F ] = DEF_RAM_PAGE(mem, (mpg) + 0x0F);
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#define SWITCH_RAM_PAGE16( tbl,tpg, mem,mpg ) \
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(tbl)[ (tpg) + 0x00 ] = DEF_RAM_PAGE(mem, (mpg) + 0x00); \
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(tbl)[ (tpg) + 0x01 ] = DEF_RAM_PAGE(mem, (mpg) + 0x01); \
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(tbl)[ (tpg) + 0x02 ] = DEF_RAM_PAGE(mem, (mpg) + 0x02); \
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(tbl)[ (tpg) + 0x03 ] = DEF_RAM_PAGE(mem, (mpg) + 0x03); \
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(tbl)[ (tpg) + 0x04 ] = DEF_RAM_PAGE(mem, (mpg) + 0x04); \
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(tbl)[ (tpg) + 0x05 ] = DEF_RAM_PAGE(mem, (mpg) + 0x05); \
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(tbl)[ (tpg) + 0x06 ] = DEF_RAM_PAGE(mem, (mpg) + 0x06); \
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@ -107,25 +126,22 @@ uint8_t * const RAM = Apple2_64K_RAM; // Pointer to the main memory
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(tbl)[ 0x08 ] = DEF_RAM_PAGE(mem, 0x08); \
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(tbl)[ 0x09 ] = DEF_RAM_PAGE(mem, 0x09); \
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(tbl)[ 0x0A ] = DEF_RAM_PAGE(mem, 0x0A); \
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(tbl)[ 0x0B ] = DEF_RAM_PAGE(mem, 0x0B);
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#define SWITCH_RAM_PAGE16( tbl,tpg, mem,mpg ) \
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(tbl)[ (tpg) + 0x00 ] = DEF_RAM_PAGE(mem, (mpg) + 0x00); \
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(tbl)[ (tpg) + 0x01 ] = DEF_RAM_PAGE(mem, (mpg) + 0x01); \
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(tbl)[ (tpg) + 0x02 ] = DEF_RAM_PAGE(mem, (mpg) + 0x02); \
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(tbl)[ (tpg) + 0x03 ] = DEF_RAM_PAGE(mem, (mpg) + 0x03); \
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(tbl)[ (tpg) + 0x04 ] = DEF_RAM_PAGE(mem, (mpg) + 0x04); \
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(tbl)[ (tpg) + 0x05 ] = DEF_RAM_PAGE(mem, (mpg) + 0x05); \
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(tbl)[ (tpg) + 0x06 ] = DEF_RAM_PAGE(mem, (mpg) + 0x06); \
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(tbl)[ (tpg) + 0x07 ] = DEF_RAM_PAGE(mem, (mpg) + 0x07); \
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(tbl)[ (tpg) + 0x08 ] = DEF_RAM_PAGE(mem, (mpg) + 0x08); \
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(tbl)[ (tpg) + 0x09 ] = DEF_RAM_PAGE(mem, (mpg) + 0x09); \
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(tbl)[ (tpg) + 0x0A ] = DEF_RAM_PAGE(mem, (mpg) + 0x0A); \
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(tbl)[ (tpg) + 0x0B ] = DEF_RAM_PAGE(mem, (mpg) + 0x0B); \
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(tbl)[ (tpg) + 0x0C ] = DEF_RAM_PAGE(mem, (mpg) + 0x0C); \
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(tbl)[ (tpg) + 0x0D ] = DEF_RAM_PAGE(mem, (mpg) + 0x0D); \
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(tbl)[ (tpg) + 0x0E ] = DEF_RAM_PAGE(mem, (mpg) + 0x0E); \
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(tbl)[ (tpg) + 0x0F ] = DEF_RAM_PAGE(mem, (mpg) + 0x0F);
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(tbl)[ 0x0B ] = DEF_RAM_PAGE(mem, 0x0B); \
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(tbl)[ 0x0B ] = DEF_RAM_PAGE(mem, 0x0C); \
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(tbl)[ 0x0B ] = DEF_RAM_PAGE(mem, 0x0D); \
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(tbl)[ 0x0B ] = DEF_RAM_PAGE(mem, 0x0E); \
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(tbl)[ 0x0B ] = DEF_RAM_PAGE(mem, 0x0F); \
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SWITCH_RAM_PAGE16( tbl, 0x10, mem, 0x10 ); \
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SWITCH_RAM_PAGE16( tbl, 0x20, mem, 0x20 ); \
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SWITCH_RAM_PAGE16( tbl, 0x30, mem, 0x30 ); \
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SWITCH_RAM_PAGE16( tbl, 0x40, mem, 0x40 ); \
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SWITCH_RAM_PAGE16( tbl, 0x50, mem, 0x50 ); \
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SWITCH_RAM_PAGE16( tbl, 0x60, mem, 0x60 ); \
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SWITCH_RAM_PAGE16( tbl, 0x70, mem, 0x70 ); \
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SWITCH_RAM_PAGE16( tbl, 0x80, mem, 0x80 ); \
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SWITCH_RAM_PAGE16( tbl, 0x90, mem, 0x90 ); \
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SWITCH_RAM_PAGE16( tbl, 0xA0, mem, 0xA0 ); \
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SWITCH_RAM_PAGE16( tbl, 0xB0, mem, 0xB0 );
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#define DEF_RAM_DUMMY16 \
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@ -243,7 +259,7 @@ enum slot {
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};
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MEMcfg_t MEMcfg = { 1, 0, 0, 0, 0, 0, 0, 0, 0 };
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MEMcfg_t MEMcfg = { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
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// https://www.kreativekorp.com/miscpages/a2info/iomemory.shtml
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// Comp: O = Apple II+ E = Apple IIe C = Apple IIc G = Apple IIgs
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@ -359,20 +375,20 @@ void resetMemory() {
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xF0, Apple2_12K_ROM, 0x20) // F0
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// 48K main memory
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x00, Apple2_64K_RAM, 0x00)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x10, Apple2_64K_RAM, 0x10)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x20, Apple2_64K_RAM, 0x20)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x30, Apple2_64K_RAM, 0x30)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x40, Apple2_64K_RAM, 0x40)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x50, Apple2_64K_RAM, 0x50)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x60, Apple2_64K_RAM, 0x60)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x70, Apple2_64K_RAM, 0x70)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x80, Apple2_64K_RAM, 0x80)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x90, Apple2_64K_RAM, 0x90)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xA0, Apple2_64K_RAM, 0xA0)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xB0, Apple2_64K_RAM, 0xB0)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x00, Apple2_64K_RAM, 0x00)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x10, Apple2_64K_RAM, 0x10)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x20, Apple2_64K_RAM, 0x20)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x30, Apple2_64K_RAM, 0x30)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x40, Apple2_64K_RAM, 0x40)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x50, Apple2_64K_RAM, 0x50)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x60, Apple2_64K_RAM, 0x60)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x70, Apple2_64K_RAM, 0x70)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x80, Apple2_64K_RAM, 0x80)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x90, Apple2_64K_RAM, 0x90)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xA0, Apple2_64K_RAM, 0xA0)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xB0, Apple2_64K_RAM, 0xB0)
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// I/O Addresses
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xC0, Apple2_64K_RAM, 0xC0)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xC0, Apple2_64K_RAM, 0xC0)
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// NO Writing to the ROM
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xD0, Apple2_Dummy_RAM, 0 );
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xE0, Apple2_Dummy_RAM, 0 );
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@ -387,15 +403,21 @@ void resetMemory() {
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MEMcfg.is_80STORE = 0;
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MEMcfg.RD_AUX_MEM = 0;
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MEMcfg.WR_AUX_MEM = 0;
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MEMcfg.int_Cx_ROM = 0;
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MEMcfg.ALT_ZP = 0;
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MEMcfg.RD_AUX_MEM = 0;
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MEMcfg.WR_AUX_MEM = 0;
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MEMcfg.txt_page_2 = 0;
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// Aux Video Memory
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memset( AUX, 0, sizeof(Apple2_64K_AUX) );
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memset( Apple2_64K_AUX, 0, sizeof(Apple2_64K_AUX) );
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// 64K Main Memory Area
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memset( RAM, 0, sizeof(Apple2_64K_RAM) );
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memset( Apple2_64K_RAM, 0, sizeof(Apple2_64K_RAM) );
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// 16K Memory Expansion
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memset( RAM, 0, sizeof(Apple2_16K_RAM) );
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memset( Apple2_16K_RAM, 0, sizeof(Apple2_16K_RAM) );
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// I/O area should be 0 -- just in case we decide to init RAM with a different pattern...
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memset( RAM + 0xC000, 0, 0x1000 );
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memset( Apple2_64K_RAM + 0xC000, 0, 0x1000 );
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}
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@ -716,14 +738,6 @@ INLINE void ioWrite( uint16_t addr, uint8_t val ) {
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RAM[io_KBD] &= 0x7F;
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break;
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case io_SETSLOTCXROM:
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// printf("io_SETSLOTCXROM\n");
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MEMcfg.int_Cx_ROM = 0;
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// SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xC0, Apple2_64K_RAM, 0xC0);
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SWITCH_CX_ROM( RAM_PG_RD_TBL, 0xC0, Apple2_64K_RAM, 0xC0);
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// RAM_PG_RD_TBL[ 0xC0 ] = DEF_RAM_PAGE(Apple2_64K_RAM, 0xC0);
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break;
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case io_RDMAINRAM:
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// printf("io_RDMAINRAM\n");
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MEMcfg.RD_AUX_MEM = 0;
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@ -760,6 +774,12 @@ INLINE void ioWrite( uint16_t addr, uint8_t val ) {
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SWITCH_STACK_ZP(RAM_PG_WR_TBL, Apple2_64K_AUX);
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break;
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case io_SETSLOTCXROM:
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// printf("io_SETSLOTCXROM\n");
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MEMcfg.int_Cx_ROM = 0;
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SWITCH_CX_ROM( RAM_PG_RD_TBL, 0xC0, Apple2_64K_RAM, 0xC0);
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break;
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case io_SETINTCXROM:
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// printf("io_SETINTCXROM\n");
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MEMcfg.int_Cx_ROM = 1;
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@ -63,4 +63,8 @@ class RepeatingTimer {
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state = .suspended
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timer.suspend()
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}
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func kill() {
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timer.cancel()
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}
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}
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