From 5ad28e911e4a184981aaa281a9c4e22d1b63bf7b Mon Sep 17 00:00:00 2001
From: Tamas Rudnai <tamas.rudnai@gmail.com>
Date: Tue, 10 Sep 2019 00:00:00 -0700
Subject: [PATCH] Instruction BugFixes

---
 A2Mac.xcodeproj/project.pbxproj               |  4 +++
 A2Mac/6502.c                                  | 28 +++++++--------
 A2Mac/6502.h                                  |  2 +-
 A2Mac/Apple2_mmio.h                           | 29 ++++++++++++++++
 A2Mac/ViewController.swift                    | 14 +++++---
 A2Mac/common.h                                | 10 +++++-
 A2Mac/fail1.txt                               |  0
 A2Mac/instructions/6502_instr_arithmetic.h    |  4 ++-
 A2Mac/instructions/6502_instr_branch.h        | 34 +++++++++----------
 A2Mac/instructions/6502_instr_call_ret_jump.h |  2 +-
 A2Mac/instructions/6502_instr_compare_test.h  | 21 ++++++------
 A2Mac/instructions/6502_instr_inc_dec.h       | 32 ++++++++---------
 A2Mac/instructions/6502_instr_load_store.h    |  6 +++-
 A2Mac/instructions/6502_instr_logic.h         |  6 ++--
 A2Mac/instructions/6502_instr_shift_rotate.h  |  6 ++--
 A2Mac/instructions/6502_instr_stack.h         |  5 +--
 A2Mac/instructions/6502_instr_transfer.h      | 12 +++----
 17 files changed, 135 insertions(+), 80 deletions(-)
 create mode 100644 A2Mac/fail1.txt

diff --git a/A2Mac.xcodeproj/project.pbxproj b/A2Mac.xcodeproj/project.pbxproj
index d53df09..ab70999 100644
--- a/A2Mac.xcodeproj/project.pbxproj
+++ b/A2Mac.xcodeproj/project.pbxproj
@@ -15,6 +15,7 @@
 		32BFFB6222EACC660003B53F /* Main.storyboard in Resources */ = {isa = PBXBuildFile; fileRef = 32BFFB6022EACC660003B53F /* Main.storyboard */; };
 		32BFFB6E22EACC660003B53F /* A2MacTests.swift in Sources */ = {isa = PBXBuildFile; fileRef = 32BFFB6D22EACC660003B53F /* A2MacTests.swift */; };
 		32BFFB7922EACC660003B53F /* A2MacUITests.swift in Sources */ = {isa = PBXBuildFile; fileRef = 32BFFB7822EACC660003B53F /* A2MacUITests.swift */; };
+		32EDB7A223272CA80073AF2D /* fail1.txt in Resources */ = {isa = PBXBuildFile; fileRef = 32EDB7A123272CA80073AF2D /* fail1.txt */; };
 /* End PBXBuildFile section */
 
 /* Begin PBXContainerItemProxy section */
@@ -68,6 +69,7 @@
 		32BFFB7422EACC660003B53F /* A2MacUITests.xctest */ = {isa = PBXFileReference; explicitFileType = wrapper.cfbundle; includeInIndex = 0; path = A2MacUITests.xctest; sourceTree = BUILT_PRODUCTS_DIR; };
 		32BFFB7822EACC660003B53F /* A2MacUITests.swift */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.swift; path = A2MacUITests.swift; sourceTree = "<group>"; };
 		32BFFB7A22EACC660003B53F /* Info.plist */ = {isa = PBXFileReference; lastKnownFileType = text.plist.xml; path = Info.plist; sourceTree = "<group>"; };
+		32EDB7A123272CA80073AF2D /* fail1.txt */ = {isa = PBXFileReference; lastKnownFileType = text; path = fail1.txt; sourceTree = "<group>"; };
 /* End PBXFileReference section */
 
 /* Begin PBXFrameworksBuildPhase section */
@@ -147,6 +149,7 @@
 				32439F8622ECD8AD0077AAE0 /* common.h */,
 				32BFFB5A22EACC630003B53F /* AppDelegate.swift */,
 				32BFFB5C22EACC630003B53F /* ViewController.swift */,
+				32EDB7A123272CA80073AF2D /* fail1.txt */,
 				32BFFB5E22EACC660003B53F /* Assets.xcassets */,
 				32BFFB6022EACC660003B53F /* Main.storyboard */,
 				32BFFB6322EACC660003B53F /* Info.plist */,
@@ -279,6 +282,7 @@
 			isa = PBXResourcesBuildPhase;
 			buildActionMask = 2147483647;
 			files = (
+				32EDB7A223272CA80073AF2D /* fail1.txt in Resources */,
 				32BFFB5F22EACC660003B53F /* Assets.xcassets in Resources */,
 				32439F8822ECD8AD0077AAE0 /* apple.rom in Resources */,
 				32BFFB6222EACC660003B53F /* Main.storyboard in Resources */,
diff --git a/A2Mac/6502.c b/A2Mac/6502.c
index 0d2a633..f81a5c3 100644
--- a/A2Mac/6502.c
+++ b/A2Mac/6502.c
@@ -73,15 +73,15 @@ static inline int m6502_step() {
 //        case 0x1A: // NOP* (undocumented)
 //        case 0x1B: // SLO* (undocumented)
 //        case 0x1C: // NOP* (undocumented)
-        case 0x1D: ORA( memread( fetch16() + m6502.X ) ); return 4;    // ORA abs,X
-        case 0x1E: ASL( & RAM[ fetch16() + m6502.X ] ); return 7;      // ASL abs,X
+        case 0x1D: ORA( src_abs_X() ); return 4;                       // ORA abs,X
+        case 0x1E: ASL( dest_abs_X() ); return 7;                      // ASL abs,X
 //        case 0x1F: // SLO* (undocumented)
-        case 0x20: JSR( fetch16() ); return 6;                         // JSR abs
-        case 0x21: AND( memread( addr_X_ind() ) ); return 6;           // AND X,ind
+        case 0x20: JSR( abs_addr() ); return 6;                        // JSR abs
+        case 0x21: AND( src_X_ind() ); return 6;                       // AND X,ind
 //        case 0x22:
 //        case 0x23:
-        case 0x24: BIT( memread_zp( fetch() ) ); return 3;             // BIT zpg
-        case 0x25: AND( memread_zp( fetch() ) ); return 3;             // AND zpg
+        case 0x24: BIT( src_zp() ); return 3;                          // BIT zpg
+        case 0x25: AND( src_zp() ); return 3;                          // AND zpg
         case 0x26: ROL( & RAM[ fetch() ] ); return 5;                  // ROL zpg
 //        case 0x27:
         case 0x28: PLP(); return 4;                                    // PLP
@@ -89,7 +89,7 @@ static inline int m6502_step() {
         case 0x2A: ROL( & m6502.A ); return 2;                         // ROL A
 //        case 0x2B:
         case 0x2C: BIT( memread( fetch16() ) ); return 4;              // BIT abs
-        case 0x2D: AND( fetch16() ); return 4;                         // AND abs
+        case 0x2D: AND( memread( fetch16() ) ); return 4;              // AND abs
         case 0x2E: ROL( & RAM[ fetch16() ] ); return 6;                // ROL abs
 //        case 0x2F:
         case 0x30: BMI( (int8_t)fetch() ); return 2;                   // BMI rel
@@ -121,7 +121,7 @@ static inline int m6502_step() {
         case 0x4A: LSR( & m6502.A ); return 2;                         // LSR A
 //        case 0x4B:
         case 0x4C: JMP( fetch16() ); return 3;                         // JMP abs
-        case 0x4D: EOR( fetch16() ); return 4;                         // EOR abs
+        case 0x4D: EOR( memread( fetch16() ) ); return 4;              // EOR abs
         case 0x4E: LSR( & RAM[ fetch16() ] ); return 6;                // LSR abs
 //        case 0x4F:
         case 0x50: BVC( (int8_t)fetch() ); return 2;                   // BVC rel
@@ -234,7 +234,7 @@ static inline int m6502_step() {
 //        case 0xBB:
         case 0xBC: LDY( memread( addr_abs_X() ) ); return 4;           // LDY abs,X
         case 0xBD: LDA( memread( addr_abs_X() ) ); return 4;           // LDA abs,X
-        case 0xBE: LDX( memread( addr_abs_X() ) ); return 4;           // LDX abs,Y
+        case 0xBE: LDX( memread( addr_abs_Y() ) ); return 4;           // LDX abs,Y
 //        case 0xBF:
         case 0xC0: CPY( fetch() ); break;                              // CPY imm
         case 0xC1: CMP( memread( addr_X_ind() ) ) ; break;             // LDA X,ind
@@ -249,7 +249,7 @@ static inline int m6502_step() {
         case 0xCA: DEX(); return 2;                                    // DEX
 //        case 0xCB:
         case 0xCC: CPY( memread( fetch16() ) ); return 4;              // CPY abs
-        case 0xCD: CMP( fetch16() ); return 4;                         // CMP abs
+        case 0xCD: CMP( memread( fetch16() ) ); return 4;              // CMP abs
         case 0xCE: DEC( & RAM[ fetch16() ] ); return 4;                // DEC abs
 //        case 0xCF:
         case 0xD0: BNE( (int8_t)fetch() ); return 2;                   // BNE rel
@@ -269,7 +269,7 @@ static inline int m6502_step() {
         case 0xDE: DEC( & RAM[ addr_abs_X() ] ); return 7;             // DEC abs,X
 //        case 0xDF:
         case 0xE0: CPX( fetch() ); return 2;                           // CPX imm
-        case 0xE1: SBC( memread( addr_X_ind() ) ) ; return 6;          // SBC (ind,X)
+        case 0xE1: SBC( memread( addr_X_ind() ) ) ; return 6;          // SBC (X,ind)
 //        case 0xE2:
 //        case 0xE3:
         case 0xE4: CPX( memread_zp( fetch() ) ); return 3;             // CPX zpg
@@ -330,9 +330,9 @@ static inline void m6502_run() {
 //    unsigned long long s = rdtsc();
     unsigned long long e = (unsigned long long)-1LL;
 
-//    for ( unsigned long long int i = 0; i < iterations ; i++ ) {
+    for ( unsigned long long int i = 0; i < iterations ; i++ ) {
 //    for ( ; m6502.pc ; ) {
-    for ( ; ; ) {
+//    for ( ; ; ) {
         if ( m6502.interrupt_flag ) {
             switch (m6502.interrupt) {
                 case NMI:
@@ -395,7 +395,7 @@ void init() {
     
     // reset vector
     m6502.pc = memread16( 0xFFFC );
-    m6502.sp = 0x01FF;
+    m6502.sp = 0xFF;
     
     
     uint8_t counter[] = {
diff --git a/A2Mac/6502.h b/A2Mac/6502.h
index bd8939a..89ad9f8 100644
--- a/A2Mac/6502.h
+++ b/A2Mac/6502.h
@@ -48,7 +48,7 @@ typedef struct m6502_s {
         } flags;            // Status Register
     };
     uint16_t pc;            // Program Counter
-    uint16_t sp;            // Stack Pointer
+    uint8_t sp;             // Stack Pointer ( stack addr = 0x01 + sp )
     unsigned clk;           // Clock Counter
     
     union {
diff --git a/A2Mac/Apple2_mmio.h b/A2Mac/Apple2_mmio.h
index e087f55..f0d9cc3 100644
--- a/A2Mac/Apple2_mmio.h
+++ b/A2Mac/Apple2_mmio.h
@@ -217,6 +217,12 @@ static inline uint16_t addr_zp_ind( uint8_t addr ) {
 static inline uint16_t addr_X_ind() {
     return addr_zp_ind( fetch() + m6502.X );
 }
+static inline uint8_t src_X_ind() {
+    return memread( addr_X_ind() );
+}
+static inline uint8_t * dest_X_ind() {
+    return & RAM[ addr_X_ind() ];
+}
 
 /**
  ind,Y        ....    indirect, Y-indexed         OPC ($LL),Y
@@ -236,6 +242,17 @@ static inline uint16_t addr_ind_Y() {
 static inline uint16_t addr_abs_X() {
     return fetch16() + m6502.X;
 }
+static inline uint8_t src_abs_X() {
+    return memread( addr_abs_X() );
+}
+static inline uint8_t * dest_abs_X() {
+    return & RAM[ addr_abs_X() ];
+}
+
+
+static inline uint16_t abs_addr() {
+    return fetch16();
+}
 
 /**
  abs,Y        ....    absolute, Y-indexed         OPC $LLHH,Y
@@ -244,6 +261,12 @@ static inline uint16_t addr_abs_X() {
 static inline uint16_t addr_abs_Y() {
     return fetch16() + m6502.Y;
 }
+static inline uint8_t src_abs_Y() {
+    return memread(addr_abs_Y());
+}
+static inline uint8_t * dest_abs_Y() {
+    return & RAM[ addr_abs_Y() ];
+}
 
 /**
  zpg        ....    zeropage         OPC $LL
@@ -252,6 +275,12 @@ static inline uint16_t addr_abs_Y() {
 static inline uint16_t addr_zp() {
     return fetch();
 }
+static inline uint8_t src_zp() {
+    return memread_zp(addr_zp());
+}
+static inline uint8_t * dest_zp() {
+    return & RAM[ addr_zp() ];
+}
 
 /**
  zpg,X        ....    zeropage, X-indexed         OPC $LL,X
diff --git a/A2Mac/ViewController.swift b/A2Mac/ViewController.swift
index 38f3142..61dbb3b 100644
--- a/A2Mac/ViewController.swift
+++ b/A2Mac/ViewController.swift
@@ -11,10 +11,16 @@ import Cocoa
 class ViewController: NSViewController {
 
     @IBOutlet weak var display: NSTextFieldCell!
-    
+
+//    static let charConvStr : String =
+//        "@🄰🄱🄲🄳🄴🄵🄶🄷🄸🄹🄺🄻🄼🄽🄾🄿🅀🅁🅂🅃🅄🅅🅆🅇🅈🅉[\\]^_ !\"#$%&'()*+,-./0123456789:;<=>?" +
+//        "@🅰🅱🅲🅳🅴🅵🅶🅷🅸🅹🅺🅻🅼🅽🅾🅿🆀🆁🆂🆃🆄🆅🆆🆇🆈🆉[\\]^_⬛︎!\"#$%&'()*+,-./0123456789:;<=>?" + // FL
+//        "@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\\]^_ !\"#$%&'()*+,-./0123456789:;<=>?" +
+//        "@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\\]^_`abcdefghijklmnopqrstuvwxyz{|}~?"
+
     static let charConvStr : String =
         "@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\\]^_ !\"#$%&'()*+,-./0123456789:;<=>?" +
-        "@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\\]^_ !\"#$%&'()*+,-./0123456789:;<=>?" +
+        "@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\\]^_░!\"#$%&'()*+,-./0123456789:;<=>?" + // FL
         "@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\\]^_ !\"#$%&'()*+,-./0123456789:;<=>?" +
         "@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\\]^_`abcdefghijklmnopqrstuvwxyz{|}~?"
     
@@ -57,9 +63,9 @@ class ViewController: NSViewController {
         print( "\ncharacter = " + (event.characters ?? ""))
         
         if let chars = event.characters {
-            let char = chars[chars.startIndex]
+            let char = chars.uppercased()[chars.startIndex]
             if let code = char.asciiValue {
-                var A2code = code + 0x60
+                var A2code = code | 0x80
                 
                 if ( code == 13 ) {
                     A2code = 141
diff --git a/A2Mac/common.h b/A2Mac/common.h
index cf55131..ad887cb 100644
--- a/A2Mac/common.h
+++ b/A2Mac/common.h
@@ -43,14 +43,22 @@ union {
 
 static inline void set_flags_N( uint8_t test ) {
     m6502.flags.N = BITTEST(test, 7);
+    dbgPrintf("%c", m6502.flags.N ? 'N' : 'n');
 }
 
 static inline void set_flags_V( uint8_t test ) {
     m6502.flags.V = BITTEST(test, 6);
+    dbgPrintf("%c", m6502.flags.V ? 'V' : 'v');
 }
 
 static inline void set_flags_Z( uint8_t test ) {
     m6502.flags.Z = test == 0;
+    dbgPrintf("%c", m6502.flags.Z ? 'Z' : 'z');
+}
+
+static inline void set_flags_C( int test ) {
+    m6502.flags.C = test >= 0;
+    dbgPrintf("%c", m6502.flags.C ? 'C' : 'c');
 }
 
 static inline void set_flags_NZ( uint8_t test ) {
@@ -65,7 +73,7 @@ static inline void set_flags_NVZ( uint8_t test ) {
 
 static inline void set_flags_NZC( int test ) {
     set_flags_NZ(test);
-    m6502.flags.C = test >= 0;
+    set_flags_C(test);
 }
 
 static inline void set_flags_NZCV( int test ) {
diff --git a/A2Mac/fail1.txt b/A2Mac/fail1.txt
new file mode 100644
index 0000000..e69de29
diff --git a/A2Mac/instructions/6502_instr_arithmetic.h b/A2Mac/instructions/6502_instr_arithmetic.h
index 6e63cb3..5a9af8b 100644
--- a/A2Mac/instructions/6502_instr_arithmetic.h
+++ b/A2Mac/instructions/6502_instr_arithmetic.h
@@ -30,9 +30,10 @@
  (indirect),Y  ADC (oper),Y  71    2     5*
 **/
 static inline void ADC( uint8_t imm ) {
-    dbgPrintf("ADC ");
+    dbgPrintf("ADC(%02X) A:%02X + %02X ", imm, m6502.A, imm);
     m6502.A += imm + m6502.flags.C;
     set_flags_NZCV( m6502.A );
+    dbgPrintf("-> A:%02X ", m6502.A);
 }
 
 /**
@@ -53,6 +54,7 @@ static inline void ADC( uint8_t imm ) {
  (indirect),Y  SBC (oper),Y  F1    2     5*
 **/
 static inline void SBC( uint8_t imm ) {
+    dbgPrintf("SBC(%02X) ", imm);
     ADC( ~imm );
 }
 
diff --git a/A2Mac/instructions/6502_instr_branch.h b/A2Mac/instructions/6502_instr_branch.h
index c1cf483..8574553 100644
--- a/A2Mac/instructions/6502_instr_branch.h
+++ b/A2Mac/instructions/6502_instr_branch.h
@@ -9,7 +9,7 @@
 #ifndef __6502_INSTR_BRANCH_H__
 #define __6502_INSTR_BRANCH_H__
 
-static inline void BR( int8_t reladdr ) {
+static inline void BRA( int8_t reladdr ) {
     m6502.pc += reladdr;
 }
 
@@ -17,7 +17,7 @@ static inline void BR( int8_t reladdr ) {
  BCC  Branch on Carry Clear
  
  branch on C = 0                  N Z C I D V
- - - - - - -
+                                  - - - - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -26,14 +26,14 @@ static inline void BR( int8_t reladdr ) {
 static inline void BCC( int8_t reladdr ) {
     dbgPrintf("BCC ");
     if ( m6502.flags.C == 0 )
-        BR( reladdr );
+        BRA( reladdr );
 }
 
 /**
  BCS  Branch on Carry Set
  
  branch on C = 1                  N Z C I D V
- - - - - - -
+                                  - - - - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -42,14 +42,14 @@ static inline void BCC( int8_t reladdr ) {
 static inline void BCS( int8_t reladdr ) {
     dbgPrintf("BCS ");
     if ( m6502.flags.C == 1 )
-        BR( reladdr );
+        BRA( reladdr );
 }
 
 /**
  BNE  Branch on Result not Zero
  
  branch on Z = 0                  N Z C I D V
- - - - - - -
+                                  - - - - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -58,14 +58,14 @@ static inline void BCS( int8_t reladdr ) {
 static inline void BNE( int8_t reladdr ) {
     dbgPrintf("BNE ");
     if ( m6502.flags.Z == 0 )
-        BR( reladdr );
+        BRA( reladdr );
 }
 
 /**
  BEQ  Branch on Result Zero
  
  branch on Z = 1                  N Z C I D V
- - - - - - -
+                                  - - - - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -74,14 +74,14 @@ static inline void BNE( int8_t reladdr ) {
 static inline void BEQ( int8_t reladdr ) {
     dbgPrintf("BEQ ");
     if ( m6502.flags.Z == 1 )
-        BR( reladdr );
+        BRA( reladdr );
 }
 
 /**
  BPL  Branch on Result Plus
  
  branch on N = 0                  N Z C I D V
- - - - - - -
+                                  - - - - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -90,14 +90,14 @@ static inline void BEQ( int8_t reladdr ) {
 static inline void BPL( int8_t reladdr ) {
     dbgPrintf("BPL ");
     if ( m6502.flags.N == 0 )
-        BR( reladdr );
+        BRA( reladdr );
 }
 
 /**
  BMI  Branch on Result Minus
  
  branch on N = 1                  N Z C I D V
- - - - - - -
+                                  - - - - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -106,14 +106,14 @@ static inline void BPL( int8_t reladdr ) {
 static inline void BMI( int8_t reladdr ) {
     dbgPrintf("BMI ");
     if ( m6502.flags.N == 1 )
-        BR( reladdr );
+        BRA( reladdr );
 }
 
 /**
  BVC  Branch on Overflow Clear
  
  branch on V = 0                  N Z C I D V
- - - - - - -
+                                  - - - - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -122,14 +122,14 @@ static inline void BMI( int8_t reladdr ) {
 static inline void BVC( int8_t reladdr ) {
     dbgPrintf("BVC ");
     if ( m6502.flags.V == 0 )
-        BR( reladdr );
+        BRA( reladdr );
 }
 
 /**
  BVS  Branch on Overflow Set
  
  branch on V = 1                  N Z C I D V
- - - - - - -
+                                  - - - - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -138,7 +138,7 @@ static inline void BVC( int8_t reladdr ) {
 static inline void BVS( int8_t reladdr ) {
     dbgPrintf("BVS ");
     if ( m6502.flags.V == 1 )
-        BR( reladdr );
+        BRA( reladdr );
 }
 
 #endif // __6502_INSTR_BRANCH_H__
diff --git a/A2Mac/instructions/6502_instr_call_ret_jump.h b/A2Mac/instructions/6502_instr_call_ret_jump.h
index 35a3e54..84b52b6 100644
--- a/A2Mac/instructions/6502_instr_call_ret_jump.h
+++ b/A2Mac/instructions/6502_instr_call_ret_jump.h
@@ -47,7 +47,7 @@ static inline void JSR( uint16_t addr ) {
  RTS  Return from Subroutine
  
  pull PC, PC+1 -> PC              N Z C I D V
- - - - - - -
+                                  - - - - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
diff --git a/A2Mac/instructions/6502_instr_compare_test.h b/A2Mac/instructions/6502_instr_compare_test.h
index 30a3dfc..a7e38f9 100644
--- a/A2Mac/instructions/6502_instr_compare_test.h
+++ b/A2Mac/instructions/6502_instr_compare_test.h
@@ -16,7 +16,7 @@
  the zeroflag is set to the result of operand AND accumulator.
  
  A AND M, M7 -> N, M6 -> V        N Z C I D V
- M7 + - - - M6
+                                 M7 + - - - M6
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -25,17 +25,18 @@
  
  **/
 static inline void BIT( uint8_t imm ) {
-    dbgPrintf("BIT ");
-    m6502.flags.N = BITTEST(imm, 7);
-    m6502.flags.V = BITTEST(imm, 6);
-    m6502.flags.Z = ( m6502.A & imm ) == 0;
+    dbgPrintf("BIT(%02X) ", imm);
+    uint8_t m = m6502.A & imm;
+    m6502.flags.N = BITTEST(m, 7);
+    m6502.flags.V = BITTEST(m, 6);
+    m6502.flags.Z = m == 0;
 }
 
 /**
  CMP  Compare Memory with Accumulator
  
  A - M                            N Z C I D V
- + + + - - -
+                                  + + + - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -49,7 +50,7 @@ static inline void BIT( uint8_t imm ) {
  (indirect),Y  CMP (oper),Y  D1    2     5*
  **/
 static inline void CMP( uint8_t imm ) {
-    dbgPrintf("CMP ");
+    dbgPrintf("CMP(%02X) ", imm);
     set_flags_NZC( (int)m6502.A - imm );
 }
 
@@ -57,7 +58,7 @@ static inline void CMP( uint8_t imm ) {
  CPX  Compare Memory and Index X
  
  X - M                            N Z C I D V
- + + + - - -
+                                  + + + - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -66,7 +67,7 @@ static inline void CMP( uint8_t imm ) {
  absolute      CPX oper      EC    3     4
  **/
 static inline void CPX( uint8_t imm ) {
-    dbgPrintf("CPX ");
+    dbgPrintf("CPX(%02X) ", imm);
     set_flags_NZC( (int)m6502.X - imm );
 }
 
@@ -83,7 +84,7 @@ static inline void CPX( uint8_t imm ) {
  absolute      CPY oper      CC    3     4
  **/
 static inline void CPY( uint8_t imm ) {
-    dbgPrintf("CPY ");
+    dbgPrintf("CPY(%02X) ", imm);
     set_flags_NZC( (int)m6502.Y - imm );
 }
 
diff --git a/A2Mac/instructions/6502_instr_inc_dec.h b/A2Mac/instructions/6502_instr_inc_dec.h
index edca60d..ca98382 100644
--- a/A2Mac/instructions/6502_instr_inc_dec.h
+++ b/A2Mac/instructions/6502_instr_inc_dec.h
@@ -24,9 +24,9 @@
  absolute,X    INC oper,X    FE    3     7
 **/
 static inline void INC( uint8_t * dst ) {
-    dbgPrintf("INC ");
-    (*dst)++;
-    set_flags_NZ(*dst);
+    dbgPrintf("INC %02X -> ", *dst);
+    set_flags_NZ( ++(*dst) );
+    dbgPrintf("%02X ", *dst);
 }
 
 /**
@@ -40,9 +40,9 @@ static inline void INC( uint8_t * dst ) {
  implied       INX           E8    1     2
 **/
 static inline void INX() {
-    dbgPrintf("INX ");
-    m6502.X++;
-    set_flags_NZ(m6502.X);
+    dbgPrintf("INX %02X -> ", m6502.X);
+    set_flags_NZ( ++m6502.X );
+    dbgPrintf("%02X ", m6502.X);
 }
 
 /**
@@ -57,7 +57,7 @@ static inline void INX() {
 **/
 static inline void INY() {
     dbgPrintf("INY %02X -> ", m6502.Y);
-    set_flags_NZ(++m6502.Y);
+    set_flags_NZ( ++m6502.Y );
     dbgPrintf("%02X ", m6502.Y);
 }
 
@@ -75,9 +75,9 @@ static inline void INY() {
  absolute,X    DEC oper,X    DE    3     7
 **/
 static inline void DEC( uint8_t * dst ) {
-    dbgPrintf("DEC ");
-    (*dst)--;
-    set_flags_NZ(*dst);
+    dbgPrintf("DEC %02X -> ", *dst);
+    set_flags_NZ( --(*dst) );
+    dbgPrintf("%02X ", *dst);
 }
 
 /**
@@ -91,9 +91,9 @@ static inline void DEC( uint8_t * dst ) {
  implied       DEC           CA    1     2
 **/
 static inline void DEX() {
-    dbgPrintf("DEX ");
-    m6502.X--;
-    set_flags_NZ(m6502.X);
+    dbgPrintf("DEX %02X -> ", m6502.X);
+    set_flags_NZ( --m6502.X );
+    dbgPrintf("%02X ", m6502.X);
 }
 
 /**
@@ -107,9 +107,9 @@ static inline void DEX() {
  implied       DEC           88    1     2
  **/
 static inline void DEY() {
-    dbgPrintf("DEY ");
-    m6502.Y--;
-    set_flags_NZ(m6502.Y);
+    dbgPrintf("DEY %02X -> ", m6502.Y);
+    set_flags_NZ( --m6502.Y );
+    dbgPrintf("%02X ", m6502.Y);
 }
 
 #endif // __6502_INSTR_INC_DEC_H__
diff --git a/A2Mac/instructions/6502_instr_load_store.h b/A2Mac/instructions/6502_instr_load_store.h
index 2096af0..849b9ab 100644
--- a/A2Mac/instructions/6502_instr_load_store.h
+++ b/A2Mac/instructions/6502_instr_load_store.h
@@ -70,7 +70,7 @@ static inline void LDX( uint8_t imm ) {
  absolute,X    LDY oper,X    BC    3     4*
 **/
 static inline void LDY( uint8_t imm ) {
-    dbgPrintf("LDY ");
+    dbgPrintf("LDY(%02X) ", imm);
     m6502.Y = imm;
     set_flags_NZ(imm);
 }
@@ -95,6 +95,10 @@ static inline void STR( uint8_t * dst, uint8_t imm ) {
 //    uint16_t v = dst - RAM;
 //    if ( ( v >= 0x400 ) && ( v < 0x800 ) ) {
 //        char c = charConv[imm];
+//        if ( c == '?' ) {
+//            printf("? SYNTAX ERROR\n");
+//        }
+
 //        if (( imm > ' ' ) && ( c < 0x7F ))
 //            printf("%04X: t:%02X '%c'\n", v, imm, isprint(c) ? c : ' ');
 //    }
diff --git a/A2Mac/instructions/6502_instr_logic.h b/A2Mac/instructions/6502_instr_logic.h
index bb06c07..0dc5f70 100644
--- a/A2Mac/instructions/6502_instr_logic.h
+++ b/A2Mac/instructions/6502_instr_logic.h
@@ -28,7 +28,7 @@
  (indirect),Y  ORA (oper),Y  11    2     5*
 **/
 static inline void ORA( uint8_t imm ) {
-    dbgPrintf("ORA ");
+    dbgPrintf("ORA(%02X) ", imm);
     m6502.A |= imm;
     set_flags_NZ( m6502.A );
 }
@@ -51,7 +51,7 @@ static inline void ORA( uint8_t imm ) {
  (indirect),Y  AND (oper),Y  31    2     5*
  **/
 static inline void AND( uint8_t imm ) {
-    dbgPrintf("AND ");
+    dbgPrintf("AND(%02X) ", imm);
     m6502.A &= imm;
     set_flags_NZ( m6502.A );
 }
@@ -74,7 +74,7 @@ static inline void AND( uint8_t imm ) {
  (indirect),Y  EOR (oper),Y  51    2     5*
 **/
 static inline void EOR( uint8_t imm ) {
-    dbgPrintf("EOR ");
+    dbgPrintf("EOR(%02X) ", imm);
     m6502.A ^= imm;
     set_flags_NZ( m6502.A );
 }
diff --git a/A2Mac/instructions/6502_instr_shift_rotate.h b/A2Mac/instructions/6502_instr_shift_rotate.h
index eba6fdf..0ab4aad 100644
--- a/A2Mac/instructions/6502_instr_shift_rotate.h
+++ b/A2Mac/instructions/6502_instr_shift_rotate.h
@@ -26,7 +26,7 @@
 **/
 static inline void ASL( uint8_t * dst ) {
     dbgPrintf("ASL ");
-    m6502.flags.C = (*dst & (1<<7)) >> 7;
+    m6502.flags.C = *dst >> 7;
     *dst <<= 1;
     set_flags_NZ( *dst );
 }
@@ -69,7 +69,7 @@ static inline void LSR( uint8_t * dst ) {
 static inline void ROL( uint8_t * dst ) {
     dbgPrintf("ROL ");
     uint8_t C = m6502.flags.C;
-    m6502.flags.C = (*dst & (1<<7)) >> 7;
+    m6502.flags.C = *dst >> 7;
     *dst <<= 1;
     *dst |= C;
     set_flags_NZ( *dst );
@@ -92,7 +92,7 @@ static inline void ROL( uint8_t * dst ) {
 static inline void ROR( uint8_t * dst ) {
     dbgPrintf("ROR ");
     uint8_t C = m6502.flags.C << 7;
-    m6502.flags.C = *dst;
+    m6502.flags.C = *dst & 1;
     *dst >>= 1;
     *dst |= C;
     set_flags_NZ( *dst );
diff --git a/A2Mac/instructions/6502_instr_stack.h b/A2Mac/instructions/6502_instr_stack.h
index d636ace..f5efa01 100644
--- a/A2Mac/instructions/6502_instr_stack.h
+++ b/A2Mac/instructions/6502_instr_stack.h
@@ -11,11 +11,11 @@
 
 
 static inline void PUSH( uint8_t n ) {
-    memwrite( m6502.sp--, n );
+    RAM[ 0x100 + m6502.sp-- ] = n;
 }
 
 static inline uint8_t POP() {
-    return memread( ++m6502.sp );
+    return RAM[ 0x100 + (++m6502.sp) ];
 }
 
 static inline void PUSH_addr( uint16_t addr ) {
@@ -56,6 +56,7 @@ static inline void PHA() {
 static inline void PLA() {
     dbgPrintf("PLA ");
     m6502.A = POP();
+    set_flags_NZ(m6502.A);
 }
 
 /**
diff --git a/A2Mac/instructions/6502_instr_transfer.h b/A2Mac/instructions/6502_instr_transfer.h
index 5f256c4..e2a750c 100644
--- a/A2Mac/instructions/6502_instr_transfer.h
+++ b/A2Mac/instructions/6502_instr_transfer.h
@@ -14,7 +14,7 @@
  TAX  Transfer Accumulator to Index X
  
  A -> X                           N Z C I D V
- + + - - - -
+                                  + + - - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -30,7 +30,7 @@ static inline void TAX() {
  TXA  Transfer Index X to Accumulator
  
  X -> A                           N Z C I D V
- + + - - - -
+                                  + + - - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -47,7 +47,7 @@ static inline void TXA() {
  TAY  Transfer Accumulator to Index Y
  
  A -> Y                           N Z C I D V
- + + - - - -
+                                  + + - - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -63,7 +63,7 @@ static inline void TAY() {
  TYA  Transfer Index Y to Accumulator
  
  Y -> A                           N Z C I D V
- + + - - - -
+                                  + + - - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -79,7 +79,7 @@ static inline void TYA() {
  TSX  Transfer Stack Pointer to Index X
  
  SP -> X                          N Z C I D V
- + + - - - -
+                                  + + - - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------
@@ -95,7 +95,7 @@ static inline void TSX() {
  TXS  Transfer Index X to Stack Register
  
  X -> SP                          N Z C I D V
- - - - - - -
+                                  - - - - - -
  
  addressing    assembler    opc  bytes  cyles
  --------------------------------------------