diff --git a/A2Mac.xcodeproj/project.pbxproj b/A2Mac.xcodeproj/project.pbxproj index 654d2bc..c0385a3 100644 --- a/A2Mac.xcodeproj/project.pbxproj +++ b/A2Mac.xcodeproj/project.pbxproj @@ -1249,7 +1249,7 @@ "$(inherited)", "@executable_path/../Frameworks", ); - LLVM_LTO = YES; + LLVM_LTO = YES_THIN; OTHER_CFLAGS = ( "-D_NO_DISASSEMBLER", "-D_NO_INTERRUPT_CHECK_PER_STEP", diff --git a/A2Mac/ViewController.swift b/A2Mac/ViewController.swift index 888d8c3..19402bb 100644 --- a/A2Mac/ViewController.swift +++ b/A2Mac/ViewController.swift @@ -710,7 +710,7 @@ class ViewController: NSViewController { @IBAction func speedSelected(_ sender: NSButton) { if ( sender.title == "MAX" ) { - setCPUClockSpeed(freq: 1100) + setCPUClockSpeed(freq: 1280) } else if let freq = Double( sender.title ) { setCPUClockSpeed(freq: freq) diff --git a/src/cpu/6502.c b/src/cpu/6502.c index 610394f..c496519 100644 --- a/src/cpu/6502.c +++ b/src/cpu/6502.c @@ -57,7 +57,15 @@ m6502_t m6502 = { 0, // X 0, // Y - 0, // SR + 0, // C + 0, // Z + 0, // I + 0, // D + 0, // B + 0, // res + 0, // V + 0, // N + 0, // PC 0, // SP @@ -409,7 +417,7 @@ INLINE int m6502_Step() { case 0x0D: ORA( src_abs() ); return 4; // ORA abs case 0x0E: ASL( addr_abs() ); return 6; // ASL abs // case 0x0F: // SLO* (undocumented) - case 0x10: BPL( rel_addr() ); return 2; // BPL rel + case 0x10: BPL( rel_addr() ); return 3; // BPL rel case 0x11: ORA( src_ind_Y() ); return 5; // ORA ind,Y // case 0x12: // t jams // case 0x13: // SLO* (undocumented) @@ -441,7 +449,7 @@ INLINE int m6502_Step() { case 0x2D: AND( src_abs() ); return 4; // AND abs case 0x2E: ROL( addr_abs() ); return 6; // ROL abs // case 0x2F: RLA abs 6 - case 0x30: BMI( rel_addr() ); return 2; // BMI rel + case 0x30: BMI( rel_addr() ); return 3; // BMI rel case 0x31: AND( src_ind_Y() ); return 5; // AND ind,Y // case 0x32: KIL // case 0x33: RLA izy 8 @@ -473,7 +481,7 @@ INLINE int m6502_Step() { case 0x4D: EOR( src_abs() ); return 4; // EOR abs case 0x4E: LSR( addr_abs() ); return 6; // LSR abs // case 0x4F: SRE abs 6 - case 0x50: BVC( rel_addr() ); return 2; // BVC rel + case 0x50: BVC( rel_addr() ); return 3; // BVC rel case 0x51: EOR( src_ind_Y() ); return 5; // EOR ind,Y // case 0x52: KIL // case 0x53: SRE izy 8 @@ -505,7 +513,7 @@ INLINE int m6502_Step() { case 0x6D: ADC( src_abs() ); return 4; // ADC abs case 0x6E: ROR( addr_abs() ); return 6; // ROR abs // case 0x6F: RRA abs 6 - case 0x70: BVS( rel_addr() ); return 2; // BVS rel + case 0x70: BVS( rel_addr() ); return 3; // BVS rel case 0x71: ADC( src_ind_Y() ); return 5; // ADC ind,Y // case 0x72: // case 0x73: @@ -537,7 +545,7 @@ INLINE int m6502_Step() { case 0x8D: STA( addr_abs() ); return 4; // STA abs case 0x8E: STX( addr_abs() ); return 4; // STX abs // case 0x8F: - case 0x90: BCC( rel_addr() ); return 2; // BCC rel + case 0x90: BCC( rel_addr() ); return 3; // BCC rel case 0x91: STA( addr_ind_Y() ); return 6; // STA ind,Y // case 0x92: // case 0x93: @@ -569,7 +577,7 @@ INLINE int m6502_Step() { case 0xAD: LDA( src_abs() ); return 4; // LDA abs case 0xAE: LDX( src_abs() ); return 4; // LDX abs // case 0xAF: - case 0xB0: BCS( rel_addr() ); return 2; // BCS rel + case 0xB0: BCS( rel_addr() ); return 3; // BCS rel case 0xB1: LDA( src_ind_Y() ); return 5; // LDA ind,Y // case 0xB2: // case 0xB3: @@ -601,7 +609,7 @@ INLINE int m6502_Step() { case 0xCD: CMP( src_abs() ); return 4; // CMP abs case 0xCE: DEC( addr_abs() ); return 6; // DEC abs // case 0xCF: - case 0xD0: BNE( rel_addr() ); return 2; // BNE rel + case 0xD0: BNE( rel_addr() ); return 3; // BNE rel case 0xD1: CMP( src_ind_Y() ); return 5; // CMP ind,Y // case 0xD2: // case 0xD3: @@ -633,7 +641,7 @@ INLINE int m6502_Step() { case 0xED: SBC( src_abs() ); return 4; // SBC abs case 0xEE: INC( addr_abs() ); return 6; // INC abs // case 0xEF: - case 0xF0: BEQ( rel_addr() ); return 2; // BEQ rel + case 0xF0: BEQ( rel_addr() ); return 3; // BEQ rel case 0xF1: SBC( src_ind_Y() ); return 5; // SBC ind,Y // case 0xF2: // case 0xF3: diff --git a/src/cpu/instructions/6502_instr_branch.h b/src/cpu/instructions/6502_instr_branch.h index 8827975..b28f277 100644 --- a/src/cpu/instructions/6502_instr_branch.h +++ b/src/cpu/instructions/6502_instr_branch.h @@ -15,7 +15,7 @@ INLINE void BRA( int8_t reladdr ) { uint8_t pg = m6502.PC >> 8; m6502.clktime += m6502.PC >> 8 == pg ? 1 : 2; #else - m6502.clktime++; +// m6502.clktime++; #endif #ifdef DEBUG if ( reladdr == -2 ) { diff --git a/src/dev/mem/mmio.h b/src/dev/mem/mmio.h index 5ee9ecd..e18321a 100644 --- a/src/dev/mem/mmio.h +++ b/src/dev/mem/mmio.h @@ -399,7 +399,8 @@ void auxMemorySelect() { INLINE uint8_t ioRead( uint16_t addr ) { // if (outdev) fprintf(outdev, "ioRead:%04X\n", addr); - +// printf("ioRead:%04X (PC:%04X)\n", addr, m6502.PC); + uint8_t currentMagnet = 0; switch ( (uint8_t)addr ) { @@ -681,6 +682,7 @@ void kbdUp () { INLINE void ioWrite( uint16_t addr, uint8_t val ) { // if (outdev) fprintf(outdev, "ioWrite:%04X (A:%02X)\n", addr, m6502.A); + switch (addr) { case io_KBDSTRB: Apple2_64K_RAM[io_KBD] &= 0x7F; diff --git a/src/util/disassembler.h b/src/util/disassembler.h index a19762f..5f7fd2e 100644 --- a/src/util/disassembler.h +++ b/src/util/disassembler.h @@ -50,6 +50,22 @@ unsigned long long discnt = 0; } \ } +INLINE flags_t getFlags2() { + flags_t f = { + m6502.C != 0, // Carry Flag + m6502.Z != 0, // Zero Flag + m6502.I != 0, // Interrupt Flag + m6502.D != 0, // Decimal Flag + m6502.B != 0, // B Flag + m6502.res != 0, // reserved -- should be always 1 + m6502.V != 0, // Overflow Flag ??? + m6502.N != 0, // Negative Flag + }; + + return f; +} + + INLINE void printDisassembly( FILE * f ) { if ( m6502.dbgLevel.trace && f ) { // fprintf( f, "%s: %-14s%-6s%-14s%-16s A:%02X X:%02X Y:%02X S:%02X P:%02X (%c%c%c%c%c%c%c%c)\n", @@ -83,7 +99,8 @@ INLINE void printDisassembly( FILE * f ) { m6502.A, m6502.X, m6502.Y, - m6502.SR, + 0, + //getFlags2(), m6502.SP, disassembly.comment );