mirror of https://github.com/trudnai/Steve2.git
Bugfixes merged from Master
This commit is contained in:
parent
92442e6491
commit
bc56d23bd2
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@ -1069,8 +1069,8 @@
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endingColumnNumber = "9223372036854775807"
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startingLineNumber = "500"
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endingLineNumber = "500"
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landmarkName = "unknown"
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landmarkType = "0">
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landmarkName = "ioRead(addr)"
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landmarkType = "9">
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</BreakpointContent>
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</BreakpointProxy>
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<BreakpointProxy
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@ -1085,8 +1085,8 @@
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endingColumnNumber = "9223372036854775807"
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startingLineNumber = "490"
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endingLineNumber = "490"
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landmarkName = "auxMemorySelect()"
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landmarkType = "9">
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landmarkName = "unknown"
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landmarkType = "0">
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</BreakpointContent>
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</BreakpointProxy>
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<BreakpointProxy
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@ -1181,7 +1181,7 @@
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endingColumnNumber = "9223372036854775807"
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startingLineNumber = "497"
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endingLineNumber = "497"
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landmarkName = "auxMemorySelect()"
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landmarkName = "ioRead(addr)"
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landmarkType = "9">
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</BreakpointContent>
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</BreakpointProxy>
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@ -1293,7 +1293,7 @@
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endingColumnNumber = "9223372036854775807"
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startingLineNumber = "426"
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endingLineNumber = "426"
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landmarkName = "resetMemory()"
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landmarkName = "textPageSelect()"
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landmarkType = "9">
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</BreakpointContent>
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</BreakpointProxy>
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@ -886,14 +886,14 @@ void rom_loadFile( const char * bundlePath, const char * filename ) {
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else if ( flen == 16 * KB ) {
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read_rom( bundlePath, filename, Apple2_16K_ROM, 0);
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memcpy(Apple2_64K_MEM + 0xC000, Apple2_16K_ROM, 16 * KB);
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// memcpy(Apple2_64K_MEM + 0xC000, Apple2_16K_ROM, 16 * KB);
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// SWITCH_CX_ROM( RAM_PG_RD_TBL, 0xC0, Apple2_16K_ROM, 0x00);
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}
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else if ( flen == 12 * KB ) {
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read_rom( bundlePath, filename, Apple2_16K_ROM, 0x1000);
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memcpy(Apple2_64K_MEM + 0xD000, Apple2_16K_ROM + 0x1000, 12 * KB);
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// memcpy(Apple2_64K_MEM + 0xD000, Apple2_16K_ROM + 0x1000, 12 * KB);
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}
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}
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@ -357,40 +357,40 @@ enum mmio {
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void resetMemory() {
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// 48K main memory
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x00, Apple2_64K_RAM, 0x00)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x10, Apple2_64K_RAM, 0x10)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x20, Apple2_64K_RAM, 0x20)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x30, Apple2_64K_RAM, 0x30)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x40, Apple2_64K_RAM, 0x40)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x50, Apple2_64K_RAM, 0x50)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x60, Apple2_64K_RAM, 0x60)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x70, Apple2_64K_RAM, 0x70)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x80, Apple2_64K_RAM, 0x80)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x90, Apple2_64K_RAM, 0x90)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xA0, Apple2_64K_RAM, 0xA0)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xB0, Apple2_64K_RAM, 0xB0)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x00, Apple2_64K_MEM, 0x00)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x10, Apple2_64K_MEM, 0x10)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x20, Apple2_64K_MEM, 0x20)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x30, Apple2_64K_MEM, 0x30)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x40, Apple2_64K_MEM, 0x40)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x50, Apple2_64K_MEM, 0x50)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x60, Apple2_64K_MEM, 0x60)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x70, Apple2_64K_MEM, 0x70)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x80, Apple2_64K_MEM, 0x80)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0x90, Apple2_64K_MEM, 0x90)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xA0, Apple2_64K_MEM, 0xA0)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xB0, Apple2_64K_MEM, 0xB0)
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// I/O Addresses
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xC0, Apple2_64K_RAM, 0xC0)
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xC0, Apple2_64K_MEM, 0xC0)
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// Reading from the ROM
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xD0, Apple2_16K_ROM, 0x10) // D0
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xE0, Apple2_16K_ROM, 0x20) // E0
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SWITCH_RAM_PAGE16( RAM_PG_RD_TBL, 0xF0, Apple2_16K_ROM, 0x30) // F0
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// 48K main memory
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x00, Apple2_64K_RAM, 0x00)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x10, Apple2_64K_RAM, 0x10)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x20, Apple2_64K_RAM, 0x20)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x30, Apple2_64K_RAM, 0x30)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x40, Apple2_64K_RAM, 0x40)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x50, Apple2_64K_RAM, 0x50)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x60, Apple2_64K_RAM, 0x60)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x70, Apple2_64K_RAM, 0x70)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x80, Apple2_64K_RAM, 0x80)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x90, Apple2_64K_RAM, 0x90)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xA0, Apple2_64K_RAM, 0xA0)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xB0, Apple2_64K_RAM, 0xB0)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x00, Apple2_64K_MEM, 0x00)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x10, Apple2_64K_MEM, 0x10)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x20, Apple2_64K_MEM, 0x20)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x30, Apple2_64K_MEM, 0x30)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x40, Apple2_64K_MEM, 0x40)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x50, Apple2_64K_MEM, 0x50)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x60, Apple2_64K_MEM, 0x60)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x70, Apple2_64K_MEM, 0x70)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x80, Apple2_64K_MEM, 0x80)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0x90, Apple2_64K_MEM, 0x90)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xA0, Apple2_64K_MEM, 0xA0)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xB0, Apple2_64K_MEM, 0xB0)
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// I/O Addresses
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xC0, Apple2_64K_RAM, 0xC0)
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xC0, Apple2_64K_MEM, 0xC0)
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// NO Writing to the ROM
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xD0, Apple2_Dummy_RAM, 0 );
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SWITCH_RAM_PAGE16( RAM_PG_WR_TBL, 0xE0, Apple2_Dummy_RAM, 0 );
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@ -406,9 +406,8 @@ void resetMemory() {
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MEMcfg.RD_AUX_MEM = 0;
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MEMcfg.WR_AUX_MEM = 0;
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MEMcfg.int_Cx_ROM = 0;
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MEMcfg.slot_C3_ROM = 0;
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MEMcfg.ALT_ZP = 0;
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MEMcfg.RD_AUX_MEM = 0;
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MEMcfg.WR_AUX_MEM = 0;
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MEMcfg.txt_page_2 = 0;
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@ -416,11 +415,8 @@ void resetMemory() {
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memset( Apple2_64K_AUX, 0, sizeof(Apple2_64K_AUX) );
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// 64K Main Memory Area
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memset( Apple2_64K_RAM, 0, sizeof(Apple2_64K_RAM) );
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// 16K Memory Expansion
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memset( Apple2_16K_RAM, 0, sizeof(Apple2_16K_RAM) );
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// I/O area should be 0 -- just in case we decide to init RAM with a different pattern...
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memset( Apple2_64K_RAM + 0xC000, 0, 0x1000 );
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}
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