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Efforts to implement a debugger

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This commit is contained in:
tudnai 2022-08-26 19:59:14 -07:00
parent f9abef0123
commit c3977b2b89
36 changed files with 886 additions and 97 deletions
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12
A2Mac.xcodeproj/project.pbxproj
View File

@ -895,7 +895,6 @@
32439F7622ECD8AD0077AAE0 /* 6502_instr_set_clr.h */,
32439F7722ECD8AD0077AAE0 /* 6502_instr_stack.h */,
32439F7822ECD8AD0077AAE0 /* 6502_instr_logic.h */,
323D0435248B20F20086A901 /* 6502_instr_undoc.h */,
32439F7922ECD8AD0077AAE0 /* 6502_instr_shift_rotate.h */,
32439F7A22ECD8AD0077AAE0 /* 6502_instr_inc_dec.h */,
32439F7B22ECD8AD0077AAE0 /* 6502_instr_compare_test.h */,
@ -904,6 +903,7 @@
32439F7E22ECD8AD0077AAE0 /* 6502_instr_arithmetic.h */,
32439F7F22ECD8AD0077AAE0 /* 6502_instr_transfer.h */,
32439F8222ECD8AD0077AAE0 /* 6502_instr_call_ret_jump.h */,
323D0435248B20F20086A901 /* 6502_instr_undoc.h */,
32439F8322ECD8AD0077AAE0 /* 6502_instructions.h */,
);
path = instructions;
@ -1061,6 +1061,7 @@
32A6AB452671D0660023257A /* instructions */ = {
isa = PBXGroup;
children = (
32A6AB512671D0660023257A /* 6502_instr_load_store.h */,
32A6AB462671D0660023257A /* 6502_instr_set_clr.h */,
32A6AB472671D0660023257A /* 6502_instr_stack.h */,
32A6AB482671D0660023257A /* 6502_instr_logic.h */,
@ -1070,10 +1071,9 @@
32A6AB4C2671D0660023257A /* 6502_instr_branch.h */,
32A6AB4D2671D0660023257A /* 6502_instr_misc.h */,
32A6AB4E2671D0660023257A /* 6502_instr_arithmetic.h */,
32A6AB4F2671D0660023257A /* 6502_instr_undoc.h */,
32A6AB502671D0660023257A /* 6502_instr_transfer.h */,
32A6AB512671D0660023257A /* 6502_instr_load_store.h */,
32A6AB522671D0660023257A /* 6502_instr_call_ret_jump.h */,
32A6AB4F2671D0660023257A /* 6502_instr_undoc.h */,
32A6AB532671D0660023257A /* 6502_instructions.h */,
);
path = instructions;
@ -1929,11 +1929,12 @@
MACOSX_DEPLOYMENT_TARGET = 10.12;
MARKETING_VERSION = 0.85;
OTHER_CFLAGS = (
"-DDEBUGGER",
"-DDISASSEMBLER",
"-D_NO_INTERRUPT_CHECK_PER_STEP",
"-D_NO_CLK_ABSOLUTE_PRECISE",
);
OTHER_SWIFT_FLAGS = "-DHIRES -D_NO_METAL -D_NO_HIRESDRAW -DHIRESLOW -DHIRESLOWCOLOR";
OTHER_SWIFT_FLAGS = "-DHIRES -D_NO_METAL -D_NO_HIRESDRAW -DHIRESLOW -DHIRESLOWCOLOR -DDEBUGGER";
PRODUCT_BUNDLE_IDENTIFIER = com.trudnai.steveii;
PRODUCT_NAME = "$(TARGET_NAME)";
SWIFT_ACTIVE_COMPILATION_CONDITIONS = DEBUG;
@ -1972,11 +1973,12 @@
MACOSX_DEPLOYMENT_TARGET = 10.12;
MARKETING_VERSION = 0.85;
OTHER_CFLAGS = (
"-DDEBUGGER",
"-DDISASSEMBLER",
"-D_NO_INTERRUPT_CHECK_PER_STEP",
"-D_NO_CLK_ABSOLUTE_PRECISE",
);
OTHER_SWIFT_FLAGS = "-DHIRES -D_NO_METAL -D_NO_HIRESDRAW -DHIRESLOW -DHIRESLOWCOLOR";
OTHER_SWIFT_FLAGS = "-DHIRES -D_NO_METAL -D_NO_HIRESDRAW -DHIRESLOW -DHIRESLOWCOLOR -DDEBUGGER";
PRODUCT_BUNDLE_IDENTIFIER = com.trudnai.steveii;
PRODUCT_NAME = "$(TARGET_NAME)";
SWIFT_OBJC_BRIDGING_HEADER = "A2Mac/A2Mac-Bridging-Header.h";

29
A2Mac.xcodeproj/project.xcworkspace/xcuserdata/trudnai.xcuserdatad/xcdebugger/Expressions.xcexplist
View File

@ -101,6 +101,9 @@
</PersistentString>
</PersistentStrings>
</ContextState>
<ContextState
contextName = "set_flags_N:6502.c">
</ContextState>
<ContextState
contextName = "rel_addr:Apple2_mmio.h">
</ContextState>
@ -226,6 +229,9 @@
<PersistentString
value = "m6502.clkfrm">
</PersistentString>
<PersistentString
value = "cpuState">
</PersistentString>
</PersistentStrings>
</ContextState>
<ContextState
@ -940,6 +946,12 @@
<PersistentString
value = "Apple2_64K_AUX + 0x3600">
</PersistentString>
<PersistentString
value = "m6502.clkfrm">
</PersistentString>
<PersistentString
value = "m6502.ecoSpindown">
</PersistentString>
<PersistentString
value = "m6502.PC">
</PersistentString>
@ -1073,6 +1085,20 @@
</PersistentString>
</PersistentStrings>
</ContextState>
<ContextState
contextName = "ioRead:mmio.c">
<PersistentStrings>
<PersistentString
value = "m6502.clkfrm">
</PersistentString>
<PersistentString
value = "(int)IOframe">
</PersistentString>
<PersistentString
value = "lastIO">
</PersistentString>
</PersistentStrings>
</ContextState>
<ContextState
contextName = "pdl_read:paddle.h">
<PersistentStrings>
@ -1182,6 +1208,9 @@
<ContextState
contextName = "STA:6502_instr_load_store.h">
</ContextState>
<ContextState
contextName = "set_flags_Z:6502.c">
</ContextState>
<ContextState
contextName = "textPageSelect:mmio.h">
<PersistentStrings>

36
A2Mac/ViewController.swift
View File

@ -592,6 +592,8 @@ class ViewController: NSViewController {
override func keyDown(with event: NSEvent) {
m6502.ecoSpindown = ecoSpindown;
if ( cpuMode == cpuMode_eco ) {
cpuState = cpuState_running;
#if SCHEDULER_CVDISPLAYLINK
@ -1162,10 +1164,10 @@ class ViewController: NSViewController {
// Input()
// run some code
cpuState = cpuState_executing
// cpuState = cpuState_executing
// DispatchQueue.global(qos: .userInitiated).async {
m6502_Run()
cpuState = cpuState_running
// cpuState = cpuState_running
// }
// video rendering
@ -1190,7 +1192,12 @@ class ViewController: NSViewController {
break
case cpuState_halted:
#if SCHEDULER_CVDISPLAYLINK
CVDisplayLinkStop(displayLink!)
#else
upd.suspend()
#endif
break
default:
@ -1934,19 +1941,24 @@ class ViewController: NSViewController {
func Cheat_Wavy_Navy_Victory() {
#if !DEBUGGER
JUMP( 0x1528 ) // called when player clears the level
#endif
}
func Cheat_Wavy_Navy_Add_3_Ships() {
#if !DEBUGGER
let ships = min( getMEM( 0x4746 ) + 3, 9 )
setMEM( 0x4746, ships )
m6502.A = ships
// m6502.X = 0x10
setMEM16(0x4728, 0x16F0) // cursor pos: 0x4728:x, 0x4729:y
CALL( 0x1FDA ) // position and number needed? A:Number of ships X:0x10
#endif
}
func Cheat_Wavy_Navy_OtherCheats() {
#if !DEBUGGER
// Replace STC / SBC $0x1 to NOPs...
setMEM( 0x1E63, 0xEA )
setMEM( 0x1E64, 0xEA )
@ -1981,9 +1993,11 @@ class ViewController: NSViewController {
// setMEM( i, 0xEA )
// i += 1
// }
#endif
}
func Cheat_Wavy_Navy_Never_Lose() -> NSControl.StateValue {
#if !DEBUGGER
// Replace STC / SBC #$01 to NOPs...
// setMEM( 0x1E63, 0xEA )
// setMEM( 0x1E64, 0xEA )
@ -2003,9 +2017,13 @@ class ViewController: NSViewController {
print("Not Wavy Navy!")
return .off
}
#else
return .off
#endif
}
func Cheat_Wavy_Navy_Lose_To_Win() -> NSControl.StateValue {
#if !DEBUGGER
if ( getMEM16(0x1545) == 0x09F0 ) { // BEQ $1550
// lose to win
setMEM16( 0x1545, 0xEAEA ) // NOP NOP
@ -2020,31 +2038,43 @@ class ViewController: NSViewController {
print("Not Wavy Navy!")
return .off
}
#else
return .off
#endif
}
func Get_Hard_Hat_Mack() -> UInt8 {
#if !DEBUGGER
return getMEM( 0x4EDF )
#else
return 0
#endif
}
func Cheat_Hard_Hat_Mack(add : UInt8) -> UInt8 {
#if !DEBUGGER
let ships = min( getMEM( 0x4EDF ) + add, 9 )
setMEM( 0x4EDF, ships )
// CALL( 0x1219 ) // starts from the beginning
CALL( 0x1A2B ) // refresh Mack counter on screen
return ships
#else
return 0
#endif
}
func Cheat_Hard_Hat_Mack_Never_Lose() -> NSControl.StateValue {
#if !DEBUGGER
setMEM( 0x0503, 0x18 )
setMEM( 0x0504, 0x60 )
setMEM( 0x50A5, 0xEA )
setMEM( 0x50A6, 0xEA )
setMEM( 0x50A7, 0xEA )
#endif
return .on
}
}

25
src/cpu/6502.c
View File

@ -104,7 +104,12 @@ m6502_t m6502 = {
0, // clktime
0, // clklast
0, // clkfrm
0, // clk_wrenable
0, // lastIO
0, // ecoSpindown
0, // trace
0, // step
0, // brk
@ -113,10 +118,12 @@ m6502_t m6502 = {
0, // bra_true
0, // bra_false
0, // compile
HALT, // IF
HALT, // IF
};
const int ecoSpindown = 25; // initial value of ECO Spingdown Counter
#include "../util/disassembler.h"
#include "../dev/mem/mmio.h"
@ -324,6 +331,7 @@ void m6502_Run() {
m6502.clktime += m6502.clkfrm;
m6502.clkfrm = 0;
m6502.lastIO = 0;
if( diskAccelerator_count ) {
if( --diskAccelerator_count <= 0 ) {
@ -381,6 +389,19 @@ void m6502_Run() {
}
if ( cpuMode == cpuMode_eco ) {
// check if this is a busy keyboard poll (aka waiting for user input)
if ( m6502.clkfrm - m6502.lastIO < 16 ) {
if (m6502.ecoSpindown) {
m6502.ecoSpindown--;
}
else {
cpuState = cpuState_halting;
}
}
}
// play the entire sound buffer for this frame
spkr_update();
// this will take care of turning off disk motor sound when time is up

7
src/cpu/6502.h
View File

@ -126,7 +126,10 @@ typedef struct m6502_s {
uint64_t clklast; // 22:
uint32_t clkfrm; // 30:
uint64_t clk_wrenable; // CPU clock when WRITE RAM is triggered
uint64_t clk_wrenable; // CPU clock when WRITE RAM is triggered
uint64_t lastIO; // Last time I/O accessed
int ecoSpindown; // spindown counter for eco mode
debugLevel_t dbgLevel; // 34: 0: No Debug, 1: Disassembly Only, 2: Run till BRK, 3: StepByStep
@ -138,6 +141,8 @@ typedef struct m6502_s {
} m6502_t;
//#pragma pack()
extern const int ecoSpindown; // initial value of ECO Spingdown Counter
// Memory Config
typedef struct MEMcfg_s {

9
src/cpu/instructions/6502_instr_arithmetic.h
View File

@ -44,6 +44,7 @@
(indirect,X) ADC (oper,X) 61 2 6
(indirect),Y ADC (oper),Y 71 2 5*
**/
#ifndef DEBUGGER
INLINE void _ADC( uint8_t src ) {
uint16_t tmp;
@ -79,11 +80,14 @@ INLINE void _ADC( uint8_t src ) {
// set_flags_NZ( m6502.A = tmp );
}
#endif
INLINE void ADC( uint8_t src ) {
dbgPrintf("ADC(%02X) ", src);
disPrintf(disassembly.inst, "ADC");
#ifndef DEBUGGER
_ADC(src);
#endif
}
/**
@ -103,6 +107,7 @@ INLINE void ADC( uint8_t src ) {
(indirect,X) SBC (oper,X) E1 2 6
(indirect),Y SBC (oper),Y F1 2 5*
**/
#ifndef DEBUGGER
INLINE void _SBC( uint8_t src ) {
uint16_t tmp;
@ -128,10 +133,14 @@ INLINE void _SBC( uint8_t src ) {
m6502.V = ( (m6502.A ^ tmp) & 0x80 ) && ( (m6502.A ^ src) & 0x80 );
set_flags_NZ( m6502.A = tmp );
}
#endif
INLINE void SBC( uint8_t src ) {
dbgPrintf("SBC(%02X) ", src);
disPrintf(disassembly.inst, "SBC");
#ifndef DEBUGGER
_SBC(src);
#endif
}
#endif // __6502_INSTR_ARITHMETIC_H__

40
src/cpu/instructions/6502_instr_branch.h
View File

@ -50,12 +50,15 @@ INLINE void BRA( int8_t reladdr ) {
INLINE void BCC( int8_t reladdr ) {
dbgPrintf("BCC ");
disPrintf(disassembly.inst, "BCC");
#ifndef DEBUGGER
if ( ! m6502.C ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -71,12 +74,15 @@ INLINE void BCC( int8_t reladdr ) {
INLINE void BCS( int8_t reladdr ) {
dbgPrintf("BCS ");
disPrintf(disassembly.inst, "BCS");
#ifndef DEBUGGER
if ( m6502.C ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -92,12 +98,15 @@ INLINE void BCS( int8_t reladdr ) {
INLINE void BNE( int8_t reladdr ) {
dbgPrintf("BNE ");
disPrintf(disassembly.inst, "BNE");
#ifndef DEBUGGER
if ( ! m6502.Z ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -113,12 +122,15 @@ INLINE void BNE( int8_t reladdr ) {
INLINE void BEQ( int8_t reladdr ) {
dbgPrintf("BEQ ");
disPrintf(disassembly.inst, "BEQ");
#ifndef DEBUGGER
if ( m6502.Z ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -134,12 +146,15 @@ INLINE void BEQ( int8_t reladdr ) {
INLINE void BPL( int8_t reladdr ) {
dbgPrintf("BPL ");
disPrintf(disassembly.inst, "BPL");
#ifndef DEBUGGER
if ( ! m6502.N ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -155,12 +170,15 @@ INLINE void BPL( int8_t reladdr ) {
INLINE void BMI( int8_t reladdr ) {
dbgPrintf("BMI ");
disPrintf(disassembly.inst, "BMI");
#ifndef DEBUGGER
if ( m6502.N ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -176,12 +194,15 @@ INLINE void BMI( int8_t reladdr ) {
INLINE void BVC( int8_t reladdr ) {
dbgPrintf("BVC ");
disPrintf(disassembly.inst, "BVC");
#ifndef DEBUGGER
if ( ! m6502.V ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -197,12 +218,15 @@ INLINE void BVC( int8_t reladdr ) {
INLINE void BVS( int8_t reladdr ) {
dbgPrintf("BVS ");
disPrintf(disassembly.inst, "BVS");
#ifndef DEBUGGER
if ( m6502.V ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -246,6 +270,7 @@ INLINE void BVS( int8_t reladdr ) {
FF 3 5 zp,rel ........ BBS7 $12,LABEL
**/
#ifndef DEBUGGER
#define BBR(n) INLINE void BBR##n( uint8_t src, int8_t reladdr ) { \
dbgPrintf("BBR"#n" "); \
disPrintf(disassembly.inst, "BBR"#n); \
@ -253,6 +278,12 @@ disPrintf(disassembly.inst, "BBR"#n); \
BRA( reladdr ); \
} \
}
#else
#define BBR(n) INLINE void BBR##n( uint8_t src, int8_t reladdr ) { \
dbgPrintf("BBR"#n" "); \
disPrintf(disassembly.inst, "BBR"#n); \
}
#endif
BBR(0)
BBR(1)
@ -263,6 +294,8 @@ disPrintf(disassembly.inst, "BBR"#n); \
BBR(6)
BBR(7)
#ifndef DEBUGGER
#define BBS(n) INLINE void BBS##n( uint8_t src, int8_t reladdr ) { \
dbgPrintf("BBS"#n" "); \
disPrintf(disassembly.inst, "BBS"#n); \
@ -270,6 +303,12 @@ disPrintf(disassembly.inst, "BBS"#n); \
BRA( reladdr ); \
} \
}
#else
#define BBS(n) INLINE void BBS##n( uint8_t src, int8_t reladdr ) { \
dbgPrintf("BBS"#n" "); \
disPrintf(disassembly.inst, "BBS"#n); \
}
#endif
BBS(0)
BBS(1)
@ -280,4 +319,5 @@ disPrintf(disassembly.inst, "BBS"#n); \
BBS(6)
BBS(7)
#endif // __6502_INSTR_BRANCH_H__

23
src/cpu/instructions/6502_instr_call_ret_jump.h
View File

@ -39,7 +39,9 @@
INLINE void JMP( uint16_t addr ) {
dbgPrintf("JMP %04X ", addr);
disPrintf(disassembly.inst, "JMP");
// disPrintf(disassembly.comment, "to:%04X", addr)
#ifndef DEBUGGER
// disPrintf(disassembly.comment, "to:%04X", addr)
#ifdef DEBUG
if ( addr == m6502.PC - 3 ) {
dbgPrintf("Infinite Loop at %04X!\n", m6502.PC);
@ -49,6 +51,7 @@ INLINE void JMP( uint16_t addr ) {
m6502.clkfrm += 1;
}
m6502.PC = addr;
#endif
}
@ -56,10 +59,19 @@ INLINE void JMP( uint16_t addr ) {
void CALL( uint16_t addr ) {
dbgPrintf("CALL ");
disPrintf(disassembly.inst, "CALL");
#ifndef DEBUGGER
PUSH_addr(m6502.PC -1);
m6502.PC = addr;
#endif
}
// for patching game purposes -- it should not be inline!
void JUMP( uint16_t addr ) {
dbgPrintf("JUMP ");
disPrintf(disassembly.inst, "JUMP");
m6502.PC = addr;
}
/**
JSR Jump to New Location Saving Return Address
@ -75,8 +87,11 @@ void CALL( uint16_t addr ) {
INLINE void JSR( uint16_t addr ) {
dbgPrintf("JSR ");
disPrintf(disassembly.inst, "JSR");
#ifndef DEBUGGER
PUSH_addr(m6502.PC -1);
m6502.PC = addr;
#endif
}
/**
@ -92,6 +107,8 @@ INLINE void JSR( uint16_t addr ) {
INLINE void RTS() {
dbgPrintf("RTS ");
disPrintf(disassembly.inst, "RTS");
#ifndef DEBUGGER
m6502.PC = POP_addr() +1;
// disk accelerator would only work for a certain amount of time
@ -99,6 +116,7 @@ INLINE void RTS() {
// if ( m6502.clktime - disk.clk_last_access > clk_diskAcceleratorTimeout ) {
// clk_6502_per_frm = clk_6502_per_frm_set;
// }
#endif
}
/**
@ -114,9 +132,12 @@ INLINE void RTS() {
INLINE void RTI() {
dbgPrintf("RTI ");
disPrintf(disassembly.inst, "RTI");
#ifndef DEBUGGER
setFlags( POP() );
// m6502.I = 0;
m6502.PC = POP_addr();
#endif
}

20
src/cpu/instructions/6502_instr_compare_test.h
View File

@ -42,8 +42,11 @@
INLINE void BIT( uint8_t src ) {
dbgPrintf("BIT(%02X) ", src);
disPrintf(disassembly.inst, "BIT");
#ifndef DEBUGGER
set_flags_NV(src);
set_flags_Z(m6502.A & src);
#endif
}
/**
@ -71,8 +74,11 @@ INLINE void BIT( uint8_t src ) {
INLINE void TRB( uint16_t addr ) {
dbgPrintf("TRB(%02X) ", src);
disPrintf(disassembly.inst, "TRB");
#ifndef DEBUGGER
set_flags_Z( WRLOMEM[addr] & m6502.A );
WRLOMEM[addr] &= ~m6502.A;
#endif
}
/**
@ -98,8 +104,11 @@ INLINE void TRB( uint16_t addr ) {
INLINE void TSB( uint16_t addr ) {
dbgPrintf("TSB(%02X) ", src);
disPrintf(disassembly.inst, "TSB");
#ifndef DEBUGGER
set_flags_Z( WRLOMEM[addr] & m6502.A );
WRLOMEM[addr] |= m6502.A;
#endif
}
/**
@ -119,13 +128,18 @@ INLINE void TSB( uint16_t addr ) {
(indirect,X) CMP (oper,X) C1 2 6
(indirect),Y CMP (oper),Y D1 2 5*
**/
#ifndef DEBUGGER
INLINE void _CMP( uint8_t src ) {
set_flags_NZC( (int16_t)m6502.A - src );
}
#endif
INLINE void CMP( uint8_t src ) {
dbgPrintf("CMP(%02X) ", src);
disPrintf(disassembly.inst, "CMP");
#ifndef DEBUGGER
_CMP(src);
#endif
}
/**
@ -143,7 +157,10 @@ INLINE void CMP( uint8_t src ) {
INLINE void CPX( uint8_t src ) {
dbgPrintf("CPX(%02X) ", src);
disPrintf(disassembly.inst, "CPX");
#ifndef DEBUGGER
set_flags_NZC( (int16_t)m6502.X - src );
#endif
}
/**
@ -161,7 +178,10 @@ INLINE void CPX( uint8_t src ) {
INLINE void CPY( uint8_t src ) {
dbgPrintf("CPY(%02X) ", src);
disPrintf(disassembly.inst, "CPY");
#ifndef DEBUGGER
set_flags_NZC( (int16_t)m6502.Y - src );
#endif
}
#endif // __6502_INSTR_COMPARE_TEST_H__

28
src/cpu/instructions/6502_instr_inc_dec.h
View File

@ -38,12 +38,17 @@
absolute INC oper EE 3 6
absolute,X INC oper,X FE 3 7
**/
#ifndef DEBUGGER
INLINE void _INC( uint16_t addr ) {
set_flags_NZ( ++(WRLOMEM[addr]) );
}
#endif
INLINE void INC( uint16_t addr ) {
disPrintf(disassembly.inst, "INC");
#ifndef DEBUGGER
_INC(addr);
#endif
}
/**
@ -59,8 +64,11 @@ INLINE void INC( uint16_t addr ) {
INLINE void INX() {
dbgPrintf("INX %02X -> ", m6502.X);
disPrintf(disassembly.inst, "INX");
#ifndef DEBUGGER
set_flags_NZ( ++m6502.X );
dbgPrintf("%02X ", m6502.X);
#endif
}
/**
@ -76,8 +84,11 @@ INLINE void INX() {
INLINE void INY() {
dbgPrintf("INY %02X -> ", m6502.Y);
disPrintf(disassembly.inst, "INY");
#ifndef DEBUGGER
set_flags_NZ( ++m6502.Y );
dbgPrintf("%02X ", m6502.Y);
#endif
}
/**
@ -93,8 +104,11 @@ INLINE void INY() {
INLINE void INA() {
dbgPrintf("INA %02X -> ", m6502.A);
disPrintf(disassembly.inst, "INA");
#ifndef DEBUGGER
set_flags_NZ( ++m6502.A );
dbgPrintf("%02X ", m6502.A);
#endif
}
/**
@ -110,12 +124,17 @@ INLINE void INA() {
absolute DEC oper CE 3 3
absolute,X DEC oper,X DE 3 7
**/
#ifndef DEBUGGER
INLINE void _DEC( uint16_t addr ) {
set_flags_NZ( --(WRLOMEM[addr]) );
}
#endif
INLINE void DEC( uint16_t addr ) {
disPrintf(disassembly.inst, "DEC");
#ifndef DEBUGGER
_DEC(addr);
#endif
}
/**
@ -131,8 +150,11 @@ INLINE void DEC( uint16_t addr ) {
INLINE void DEX() {
dbgPrintf("DEX %02X -> ", m6502.X);
disPrintf(disassembly.inst, "DEX");
#ifndef DEBUGGER
set_flags_NZ( --m6502.X );
dbgPrintf("%02X ", m6502.X);
#endif
}
/**
@ -148,8 +170,11 @@ INLINE void DEX() {
INLINE void DEY() {
dbgPrintf("DEY %02X -> ", m6502.Y);
disPrintf(disassembly.inst, "DEY");
#ifndef DEBUGGER
set_flags_NZ( --m6502.Y );
dbgPrintf("%02X ", m6502.Y);
#endif
}
/**
@ -165,8 +190,11 @@ implied DEC 88 1 2
INLINE void DEA() {
dbgPrintf("DEA %02X -> ", m6502.A);
disPrintf(disassembly.inst, "DEA");
#ifndef DEBUGGER
set_flags_NZ( --m6502.A );
dbgPrintf("%02X ", m6502.A);
#endif
}
#endif // __6502_INSTR_INC_DEC_H__

16
src/cpu/instructions/6502_instr_load_store.h
View File

@ -48,7 +48,9 @@
INLINE void LDA( uint8_t src ) {
dbgPrintf("LDA(%02X) ", src);
disPrintf(disassembly.inst, "LDA");
#ifndef DEBUGGER
set_flags_NZ(m6502.A = src);
#endif
}
/**
@ -68,7 +70,9 @@ INLINE void LDA( uint8_t src ) {
INLINE void LDX( uint8_t src ) {
dbgPrintf("LDX(%02X) ", src);
disPrintf(disassembly.inst, "LDX");
#ifndef DEBUGGER
set_flags_NZ(m6502.X = src);
#endif
}
/**
@ -88,7 +92,9 @@ INLINE void LDX( uint8_t src ) {
INLINE void LDY( uint8_t src ) {
dbgPrintf("LDY(%02X) ", src);
disPrintf(disassembly.inst, "LDY");
#ifndef DEBUGGER
set_flags_NZ(m6502.Y = src);
#endif
}
@ -107,7 +113,9 @@ char * charConv =
**/
INLINE void STR( uint16_t addr, uint8_t src ) {
dbgPrintf("STR [%04X], %02X ", addr, src );
#ifndef DEBUGGER
memwrite(addr, src);
#endif
}
/**
@ -129,7 +137,9 @@ INLINE void STR( uint16_t addr, uint8_t src ) {
INLINE void STA( uint16_t addr ) {
dbgPrintf("STA ");
disPrintf(disassembly.inst, "STA");
#ifndef DEBUGGER
STR(addr, m6502.A);
#endif
}
/**
@ -147,7 +157,9 @@ INLINE void STA( uint16_t addr ) {
INLINE void STX( uint16_t addr ) {
dbgPrintf("STX ");
disPrintf(disassembly.inst, "STX");
#ifndef DEBUGGER
STR(addr, m6502.X);
#endif
}
/**
@ -165,7 +177,9 @@ INLINE void STX( uint16_t addr ) {
INLINE void STY( uint16_t addr ) {
dbgPrintf("STY ");
disPrintf(disassembly.inst, "STY");
#ifndef DEBUGGER
STR(addr, m6502.Y);
#endif
}
/**
@ -184,7 +198,9 @@ INLINE void STY( uint16_t addr ) {
INLINE void STZ( uint16_t addr ) {
dbgPrintf("STZ ");
disPrintf(disassembly.inst, "STZ");
#ifndef DEBUGGER
STR(addr, 0);
#endif
}
#endif // __6502_INSTR_LOAD_STORE_H__

13
src/cpu/instructions/6502_instr_logic.h
View File

@ -42,13 +42,18 @@
(indirect,X) ORA (oper,X) 01 2 6
(indirect),Y ORA (oper),Y 11 2 5*
**/
#ifndef DEBUGGER
INLINE void _ORA( uint8_t src ) {
set_flags_NZ( m6502.A |= src );
}
#endif
INLINE void ORA( uint8_t src ) {
dbgPrintf("ORA(%02X) ", src);
disPrintf(disassembly.inst, "ORA");
#ifndef DEBUGGER
_ORA(src);
#endif
}
/**
@ -68,13 +73,18 @@ INLINE void ORA( uint8_t src ) {
(indirect,X) AND (oper,X) 21 2 6
(indirect),Y AND (oper),Y 31 2 5*
**/
#ifndef DEBUGGER
INLINE void _AND( uint8_t src ) {
set_flags_NZ( m6502.A &= src );
}
#endif
INLINE void AND( uint8_t src ) {
dbgPrintf("AND(%02X) ", src);
disPrintf(disassembly.inst, "AND");
#ifndef DEBUGGER
_AND(src);
#endif
}
/**
@ -97,7 +107,10 @@ INLINE void AND( uint8_t src ) {
INLINE void EOR( uint8_t src ) {
dbgPrintf("EOR(%02X) ", src);
disPrintf(disassembly.inst, "EOR");
#ifndef DEBUGGER
set_flags_NZ( m6502.A ^= src );
#endif
}
#endif // __6502_INSTR_LOGIC_H__

7
src/cpu/instructions/6502_instr_misc.h
View File

@ -38,13 +38,15 @@
INLINE int BRK() {
dbgPrintf("BRK ");
disPrintf(disassembly.inst, "BRK");
#ifndef DEBUGGER
PUSH_addr(m6502.PC +1); // PC +2, however, fetch already incremented it by 1
// B flag should be set before pushing flags onto the stack
m6502.B = 1;
PUSH( getFlags().SR );
m6502.I = 1;
m6502.PC = memread16(IRQ_VECTOR);
#endif
return 7;
}
@ -53,7 +55,10 @@ INLINE int BRK() {
**/
INLINE void HLT() {
disPrintf(disassembly.inst, "HLT");
#ifndef DEBUGGER
m6502.interrupt = HALT;
#endif
}
/**

29
src/cpu/instructions/6502_instr_set_clr.h
View File

@ -37,7 +37,9 @@
INLINE void CLC() {
dbgPrintf("CLC ");
disPrintf(disassembly.inst, "CLC");
#ifndef DEBUGGER
m6502.C = 0;
#endif
}
/**
@ -53,7 +55,9 @@ INLINE void CLC() {
INLINE void CLD() {
dbgPrintf("CLD ");
disPrintf(disassembly.inst, "CLD");
#ifndef DEBUGGER
m6502.D = 0;
#endif
}
/**
@ -69,7 +73,9 @@ INLINE void CLD() {
INLINE void CLI() {
dbgPrintf("CLI ");
disPrintf(disassembly.inst, "CLI");
#ifndef DEBUGGER
m6502.I = 0;
#endif
}
/**
@ -85,7 +91,9 @@ INLINE void CLI() {
INLINE void CLV() {
dbgPrintf("CLV ");
disPrintf(disassembly.inst, "CLV");
#ifndef DEBUGGER
m6502.V = 0;
#endif
}
/**
@ -101,7 +109,9 @@ INLINE void CLV() {
INLINE void SEC() {
dbgPrintf("SEC ");
disPrintf(disassembly.inst, "SEC");
#ifndef DEBUGGER
m6502.C = 1;
#endif
}
/**
@ -117,7 +127,9 @@ INLINE void SEC() {
INLINE void SED() {
dbgPrintf("SED ");
disPrintf(disassembly.inst, "SED");
#ifndef DEBUGGER
m6502.D = 1;
#endif
}
/**
@ -133,7 +145,9 @@ INLINE void SED() {
INLINE void SEI() {
dbgPrintf("SEI ");
disPrintf(disassembly.inst, "SEI");
#ifndef DEBUGGER
m6502.I = 1;
#endif
}
/**
@ -175,11 +189,18 @@ INLINE void SEI() {
E7 2 5 zp ........ SMB6 $12
F7 2 5 zp ........ SMB7 $12
**/
#ifndef DEBUGGER
#define RMB(n) INLINE void RMB##n( uint8_t zpg ) { \
dbgPrintf("RMB"#n" "); \
disPrintf(disassembly.inst, "RMB"#n); \
WRLOMEM[zpg] &= ~(1 << n); \
}
#else
#define RMB(n) INLINE void RMB##n( uint8_t zpg ) { \
dbgPrintf("RMB"#n" "); \
disPrintf(disassembly.inst, "RMB"#n); \
}
#endif
RMB(0)
RMB(1)
@ -190,11 +211,19 @@ INLINE void SEI() {
RMB(6)
RMB(7)
#ifndef DEBUGGER
#define SMB(n) INLINE void SMB##n( uint8_t zpg ) { \
dbgPrintf("SMB"#n" "); \
disPrintf(disassembly.inst, "SMB"#n); \
WRLOMEM[zpg] |= (1 << n); \
}
#else
#define SMB(n) INLINE void SMB##n( uint8_t zpg ) { \
dbgPrintf("SMB"#n" "); \
disPrintf(disassembly.inst, "SMB"#n); \
}
#endif
SMB(0)
SMB(1)

30
src/cpu/instructions/6502_instr_shift_rotate.h
View File

@ -39,20 +39,28 @@
absolute ASL oper 0E 3 6
absolute,X ASL oper,X 1E 3 7
**/
#ifndef DEBUGGER
INLINE void _ASL( uint16_t addr ) {
m6502.C = memread(addr) & 0x80;
set_flags_NZ( WRLOMEM[addr] <<= 1 );
}
#endif
INLINE void ASL( uint16_t addr ) {
dbgPrintf("ASL ");
disPrintf(disassembly.inst, "ASL");
#ifndef DEBUGGER
_ASL(addr);
#endif
}
INLINE void ASLA() {
dbgPrintf("ASL ");
disPrintf(disassembly.inst, "ASL");
#ifndef DEBUGGER
m6502.C = m6502.A & 0x80;
set_flags_NZ( m6502.A <<= 1 );
#endif
}
/**
@ -72,14 +80,20 @@ INLINE void ASLA() {
INLINE void LSR( uint16_t addr ) {
dbgPrintf("LSR ");
disPrintf(disassembly.inst, "LSR");
#ifndef DEBUGGER
m6502.C = WRLOMEM[addr] & 1;
set_flags_NZ( WRLOMEM[addr] >>= 1 );
#endif
}
INLINE void LSRA() {
dbgPrintf("LSR ");
disPrintf(disassembly.inst, "LSR");
#ifndef DEBUGGER
m6502.C = m6502.A & 1;
set_flags_NZ( m6502.A >>= 1 );
#endif
}
/**
@ -96,24 +110,32 @@ INLINE void LSRA() {
absolute ROL oper 2E 3 6
absolute,X ROL oper,X 3E 3 7
**/
#ifndef DEBUGGER
INLINE void _ROL( uint16_t addr ) {
uint8_t C = m6502.C != 0;
m6502.C = WRLOMEM[addr] & 0x80;
WRLOMEM[addr] <<= 1;
set_flags_NZ( WRLOMEM[addr] |= C );
}
#endif
INLINE void ROL( uint16_t addr ) {
dbgPrintf("ROL ");
disPrintf(disassembly.inst, "ROL");
#ifndef DEBUGGER
_ROL(addr);
#endif
}
INLINE void ROLA() {
dbgPrintf("ROL ");
disPrintf(disassembly.inst, "ROL");
#ifndef DEBUGGER
uint8_t C = m6502.C != 0;
m6502.C = m6502.A & 0x80;
m6502.A <<= 1;
set_flags_NZ( m6502.A |= C );
#endif
}
/**
@ -130,24 +152,32 @@ INLINE void ROLA() {
absolute ROR oper 6E 3 6
absolute,X ROR oper,X 7E 3 7
**/
#ifndef DEBUGGER
INLINE void _ROR( uint16_t addr ) {
uint8_t C = m6502.C != 0;
m6502.C = WRLOMEM[addr] & 1;
WRLOMEM[addr] >>= 1;
set_flags_NZ( WRLOMEM[addr] |= C << 7 );
}
#endif
INLINE void ROR( uint16_t addr ) {
dbgPrintf("ROR ");
disPrintf(disassembly.inst, "ROR");
#ifndef DEBUGGER
_ROR(addr);
#endif
}
INLINE void RORA() {
dbgPrintf("ROR ");
disPrintf(disassembly.inst, "ROR");
#ifndef DEBUGGER
uint8_t C = m6502.C != 0;
m6502.C = m6502.A & 1;
m6502.A >>= 1;
set_flags_NZ( m6502.A |= C << 7);
#endif
}

36
src/cpu/instructions/6502_instr_stack.h
View File

@ -27,6 +27,7 @@
static const uint16_t stack_base_addr = 0x100;
#ifndef DEBUGGER
INLINE void PUSH( uint8_t src ) {
// DO NOT MAKE IT NICER! faster this way!
WRLOMEM[ stack_base_addr | m6502.SP-- ] = src;
@ -45,7 +46,7 @@ INLINE void PUSH_addr( uint16_t addr ) {
INLINE uint16_t POP_addr() {
return POP() + ( POP() << 8 );
}
#endif
/**
PHA Push Accumulator on Stack
@ -60,7 +61,10 @@ INLINE uint16_t POP_addr() {
INLINE void PHA() {
dbgPrintf("PHA %02X ", m6502.A);
disPrintf(disassembly.inst, "PHA");
#ifndef DEBUGGER
PUSH( m6502.A );
#endif
}
/**
@ -76,7 +80,10 @@ INLINE void PHA() {
INLINE void PHX() {
dbgPrintf("PHX %02X ", m6502.X);
disPrintf(disassembly.inst, "PHX");
#ifndef DEBUGGER
PUSH( m6502.X );
#endif
}
/**
@ -92,7 +99,10 @@ INLINE void PHX() {
INLINE void PHY() {
dbgPrintf("PHY %02X ", m6502.Y);
disPrintf(disassembly.inst, "PHY");
#ifndef DEBUGGER
PUSH( m6502.Y );
#endif
}
/**
@ -106,10 +116,16 @@ INLINE void PHY() {
implied PLA 68 1 4
**/
INLINE void PLA() {
#ifndef DEBUGGER
m6502.A = POP();
#endif
dbgPrintf("PLA %02X ", m6502.A);
disPrintf(disassembly.inst, "PLA");
#ifndef DEBUGGER
set_flags_NZ( m6502.A );
#endif
}
/**
@ -123,10 +139,16 @@ INLINE void PLA() {
implied PLX 68 1 4
**/
INLINE void PLX() {
#ifndef DEBUGGER
m6502.X = POP();
#endif
dbgPrintf("PLX %02X ", m6502.X);
disPrintf(disassembly.inst, "PLX");
#ifndef DEBUGGER
set_flags_NZ( m6502.X );
#endif
}
/**
@ -140,10 +162,16 @@ INLINE void PLX() {
implied PLY 68 1 4
**/
INLINE void PLY() {
#ifndef DEBUGGER
m6502.Y = POP();
#endif
dbgPrintf("PLY %02X ", m6502.Y);
disPrintf(disassembly.inst, "PLY");
#ifndef DEBUGGER
set_flags_NZ( m6502.Y );
#endif
}
/**
@ -159,7 +187,10 @@ INLINE void PLY() {
INLINE void PHP() {
dbgPrintf("PHP %02X ", m6502.SR);
disPrintf(disassembly.inst, "PHP");
#ifndef DEBUGGER
PUSH( getFlags().SR ); // res and B flag should be set
#endif
}
/**
@ -173,7 +204,10 @@ INLINE void PHP() {
implied PLP 28 1 4
**/
INLINE void PLP() {
#ifndef DEBUGGER
setFlags(POP() | 0x30); // res and B flag should be set
#endif
dbgPrintf("PLP %02X ", m6502.SR);
disPrintf(disassembly.inst, "PLP");
}

18
src/cpu/instructions/6502_instr_transfer.h
View File

@ -38,7 +38,10 @@
INLINE void TAX() {
dbgPrintf("TAX(%02X) ", m6502.A);
disPrintf(disassembly.inst, "TAX");
#ifndef DEBUGGER
set_flags_NZ(m6502.X = m6502.A);
#endif
}
/**
@ -54,7 +57,10 @@ INLINE void TAX() {
INLINE void TXA() {
dbgPrintf("TXA(%02X) ", m6502.X);
disPrintf(disassembly.inst, "TXA");
#ifndef DEBUGGER
set_flags_NZ(m6502.A = m6502.X);
#endif
}
@ -71,7 +77,10 @@ INLINE void TXA() {
INLINE void TAY() {
dbgPrintf("TAY ");
disPrintf(disassembly.inst, "TAY");
#ifndef DEBUGGER
set_flags_NZ(m6502.Y = m6502.A);
#endif
}
/**
@ -87,7 +96,10 @@ INLINE void TAY() {
INLINE void TYA() {
dbgPrintf("TYA(%02X) ", m6502.Y);
disPrintf(disassembly.inst, "TYA");
#ifndef DEBUGGER
set_flags_NZ(m6502.A = m6502.Y);
#endif
}
/**
@ -103,7 +115,10 @@ INLINE void TYA() {
INLINE void TSX() {
dbgPrintf("TSX(%02X) ", m6502.SP);
disPrintf(disassembly.inst, "TSX");
#ifndef DEBUGGER
set_flags_NZ(m6502.X = m6502.SP);
#endif
}
/**
@ -119,7 +134,10 @@ INLINE void TSX() {
INLINE void TXS() {
dbgPrintf("TXS(%02X) ", m6502.X);
disPrintf(disassembly.inst, "TXS");
#ifndef DEBUGGER
m6502.SP = m6502.X;
#endif
}
#endif // __6502_INSTR_TRANSFER_H__

37
src/cpu/instructions/6502_instr_undoc.h
View File

@ -35,8 +35,10 @@ ANC - "AND" Memory with Accumulator
INLINE void ANC ( uint8_t src ) {
disPrintf(disassembly.inst, "ANC");
#ifndef DEBUGGER
set_flags_NZ( m6502.A &= src );
m6502.C = m6502.A >> 7;
#endif
}
@ -53,6 +55,7 @@ INLINE void ANC ( uint8_t src ) {
INLINE void ARC ( uint8_t src ) {
disPrintf(disassembly.inst, "ARC");
#ifndef DEBUGGER
_AND(src);
m6502.C = m6502.A >> 7;
@ -60,6 +63,7 @@ INLINE void ARC ( uint8_t src ) {
uint8_t C = m6502.C != 0;
m6502.A >>= 1;
set_flags_NZ( m6502.A |= C << 7);
#endif
}
@ -73,12 +77,14 @@ INLINE void ARC ( uint8_t src ) {
INLINE void ASR ( uint8_t src ) {
disPrintf(disassembly.inst, "ASR");
#ifndef DEBUGGER
// AND
m6502.A &= src;
// LSR A
m6502.C = m6502.A & 1;
set_flags_NZ( m6502.A >>= 1 );
#endif
}
@ -91,8 +97,10 @@ INLINE void ASR ( uint8_t src ) {
**/
INLINE void DCP ( uint16_t addr ) {
disPrintf(disassembly.inst, "DCP");
#ifndef DEBUGGER
_DEC(addr);
_CMP(WRLOMEM[addr]);
#endif
}
@ -101,7 +109,9 @@ INLINE void DCP ( uint16_t addr ) {
**/
INLINE void LAS ( uint8_t src ) {
disPrintf(disassembly.inst, "LAS");
#ifndef DEBUGGER
set_flags_NZ( m6502.A = m6502.X = m6502.SP = m6502.SP & src );
#endif
}
@ -114,8 +124,10 @@ INLINE void LAS ( uint8_t src ) {
**/
INLINE void ISB ( uint16_t addr ) {
disPrintf(disassembly.inst, "ISB");
#ifndef DEBUGGER
_INC(addr);
_SBC(WRLOMEM[addr]);
#endif
}
@ -126,7 +138,9 @@ INLINE void ISB ( uint16_t addr ) {
**/
INLINE void LAX ( uint8_t src ) {
disPrintf(disassembly.inst, "LAX");
#ifndef DEBUGGER
set_flags_NZ(m6502.A = m6502.X = src);
#endif
}
@ -140,8 +154,10 @@ INLINE void LAX ( uint8_t src ) {
INLINE void RLA ( uint16_t addr ) {
disPrintf(disassembly.inst, "RLA");
#ifndef DEBUGGER
_ROL(addr);
_AND(WRLOMEM[addr]);
#endif
}
@ -154,8 +170,10 @@ INLINE void RLA ( uint16_t addr ) {
**/
INLINE void RRA ( uint16_t addr ) {
disPrintf(disassembly.inst, "RRA");
#ifndef DEBUGGER
_ROR(addr);
_ADC(WRLOMEM[addr]);
#endif
}
@ -169,8 +187,10 @@ INLINE void RRA ( uint16_t addr ) {
INLINE void SAS ( uint16_t addr ) {
disPrintf(disassembly.inst, "SAS");
#ifndef DEBUGGER
m6502.SP = m6502.A & m6502.X;
set_flags_NZ( WRLOMEM[addr] = m6502.SP & ((addr >> 8) + 1) );
#endif
}
@ -198,6 +218,7 @@ INLINE void SAS ( uint16_t addr ) {
INLINE void SBX ( uint8_t src ) {
disPrintf(disassembly.inst, "SBX");
#ifndef DEBUGGER
uint16_t tmp;
// Decimal flag is ignored
@ -206,6 +227,7 @@ INLINE void SBX ( uint8_t src ) {
m6502.C = tmp < 0x100;
m6502.V = ( (m6502.A ^ tmp) & 0x80 ) && ( (m6502.A ^ src) & 0x80 );
set_flags_NZ( m6502.X = tmp );
#endif
}
@ -217,7 +239,9 @@ INLINE void SBX ( uint8_t src ) {
INLINE void SHA ( uint16_t addr ) {
disPrintf(disassembly.inst, "SHA");
#ifndef DEBUGGER
set_flags_NZ( WRLOMEM[addr] = m6502.X & m6502.A & ((addr >> 8) + 1) );
#endif
}
@ -229,7 +253,9 @@ INLINE void SHA ( uint16_t addr ) {
INLINE void SHY ( uint16_t addr ) {
disPrintf(disassembly.inst, "SHY");
#ifndef DEBUGGER
set_flags_NZ( WRLOMEM[addr] = m6502.Y &((addr >> 8) + 1) );
#endif
}
@ -241,7 +267,9 @@ INLINE void SHY ( uint16_t addr ) {
INLINE void SHX ( uint16_t addr ) {
disPrintf(disassembly.inst, "SHX");
#ifndef DEBUGGER
set_flags_NZ( WRLOMEM[addr] = m6502.X &((addr >> 8) + 1) );
#endif
}
@ -258,9 +286,11 @@ INLINE void SHX ( uint16_t addr ) {
INLINE void SLO ( uint16_t addr ) {
disPrintf(disassembly.inst, "SLO");
#ifndef DEBUGGER
_ASL(addr);
_ORA( WRLOMEM[addr] );
set_flags_NZ( WRLOMEM[addr] = m6502.A ); // A -> M
#endif
}
@ -272,7 +302,9 @@ INLINE void SLO ( uint16_t addr ) {
INLINE void SAX ( uint16_t addr ) {
disPrintf(disassembly.inst, "SAX");
#ifndef DEBUGGER
set_flags_NZ( WRLOMEM[addr] = m6502.A & m6502.X );
#endif
}
@ -287,13 +319,14 @@ INLINE void SAX ( uint16_t addr ) {
INLINE void SRE ( uint16_t addr ) {
disPrintf(disassembly.inst, "SRE");
#ifndef DEBUGGER
// LSR
m6502.C = WRLOMEM[addr] & 1;
set_flags_NZ( WRLOMEM[addr] >>= 1 );
// EOR M
set_flags_NZ( m6502.A |= WRLOMEM[addr] );
#endif
}
@ -304,7 +337,9 @@ XAA - "AND" Memory with Index X into Accumulator
**/
INLINE void XAA ( uint8_t src ) {
disPrintf(disassembly.inst, "XAA");
#ifndef DEBUGGER
set_flags_NZ( m6502.A = m6502.X & src );
#endif
}

9
src/cpu/jit/instructions/6502_instr_arithmetic.h
View File

@ -44,6 +44,7 @@
(indirect,X) ADC (oper,X) 61 2 6
(indirect),Y ADC (oper),Y 71 2 5*
**/
#ifndef DEBUGGER
INLINE void _ADC( uint8_t src ) {
uint16_t tmp;
@ -79,11 +80,14 @@ INLINE void _ADC( uint8_t src ) {
// set_flags_NZ( m6502.A = tmp );
}
#endif
INLINE void ADC( uint8_t src ) {
dbgPrintf("ADC(%02X) ", src);
disPrintf(disassembly.inst, "ADC");
#ifndef DEBUGGER
_ADC(src);
#endif
}
/**
@ -103,6 +107,7 @@ INLINE void ADC( uint8_t src ) {
(indirect,X) SBC (oper,X) E1 2 6
(indirect),Y SBC (oper),Y F1 2 5*
**/
#ifndef DEBUGGER
INLINE void _SBC( uint8_t src ) {
uint16_t tmp;
@ -128,10 +133,14 @@ INLINE void _SBC( uint8_t src ) {
m6502.V = ( (m6502.A ^ tmp) & 0x80 ) && ( (m6502.A ^ src) & 0x80 );
set_flags_NZ( m6502.A = tmp );
}
#endif
INLINE void SBC( uint8_t src ) {
dbgPrintf("SBC(%02X) ", src);
disPrintf(disassembly.inst, "SBC");
#ifndef DEBUGGER
_SBC(src);
#endif
}
#endif // __6502_INSTR_ARITHMETIC_H__

40
src/cpu/jit/instructions/6502_instr_branch.h
View File

@ -50,12 +50,15 @@ INLINE void BRA( int8_t reladdr ) {
INLINE void BCC( int8_t reladdr ) {
dbgPrintf("BCC ");
disPrintf(disassembly.inst, "BCC");
#ifndef DEBUGGER
if ( ! m6502.C ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -71,12 +74,15 @@ INLINE void BCC( int8_t reladdr ) {
INLINE void BCS( int8_t reladdr ) {
dbgPrintf("BCS ");
disPrintf(disassembly.inst, "BCS");
#ifndef DEBUGGER
if ( m6502.C ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -92,12 +98,15 @@ INLINE void BCS( int8_t reladdr ) {
INLINE void BNE( int8_t reladdr ) {
dbgPrintf("BNE ");
disPrintf(disassembly.inst, "BNE");
#ifndef DEBUGGER
if ( ! m6502.Z ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -113,12 +122,15 @@ INLINE void BNE( int8_t reladdr ) {
INLINE void BEQ( int8_t reladdr ) {
dbgPrintf("BEQ ");
disPrintf(disassembly.inst, "BEQ");
#ifndef DEBUGGER
if ( m6502.Z ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -134,12 +146,15 @@ INLINE void BEQ( int8_t reladdr ) {
INLINE void BPL( int8_t reladdr ) {
dbgPrintf("BPL ");
disPrintf(disassembly.inst, "BPL");
#ifndef DEBUGGER
if ( ! m6502.N ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -155,12 +170,15 @@ INLINE void BPL( int8_t reladdr ) {
INLINE void BMI( int8_t reladdr ) {
dbgPrintf("BMI ");
disPrintf(disassembly.inst, "BMI");
#ifndef DEBUGGER
if ( m6502.N ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -176,12 +194,15 @@ INLINE void BMI( int8_t reladdr ) {
INLINE void BVC( int8_t reladdr ) {
dbgPrintf("BVC ");
disPrintf(disassembly.inst, "BVC");
#ifndef DEBUGGER
if ( ! m6502.V ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -197,12 +218,15 @@ INLINE void BVC( int8_t reladdr ) {
INLINE void BVS( int8_t reladdr ) {
dbgPrintf("BVS ");
disPrintf(disassembly.inst, "BVS");
#ifndef DEBUGGER
if ( m6502.V ) {
BRA( reladdr );
}
else {
dbgPrintf("-no-");
}
#endif
}
/**
@ -246,6 +270,7 @@ INLINE void BVS( int8_t reladdr ) {
FF 3 5 zp,rel ........ BBS7 $12,LABEL
**/
#ifndef DEBUGGER
#define BBR(n) INLINE void BBR##n( uint8_t src, int8_t reladdr ) { \
dbgPrintf("BBR"#n" "); \
disPrintf(disassembly.inst, "BBR"#n); \
@ -253,6 +278,12 @@ disPrintf(disassembly.inst, "BBR"#n); \
BRA( reladdr ); \
} \
}
#else
#define BBR(n) INLINE void BBR##n( uint8_t src, int8_t reladdr ) { \
dbgPrintf("BBR"#n" "); \
disPrintf(disassembly.inst, "BBR"#n); \
}
#endif
BBR(0)
BBR(1)
@ -263,6 +294,8 @@ disPrintf(disassembly.inst, "BBR"#n); \
BBR(6)
BBR(7)
#ifndef DEBUGGER
#define BBS(n) INLINE void BBS##n( uint8_t src, int8_t reladdr ) { \
dbgPrintf("BBS"#n" "); \
disPrintf(disassembly.inst, "BBS"#n); \
@ -270,6 +303,12 @@ disPrintf(disassembly.inst, "BBS"#n); \
BRA( reladdr ); \
} \
}
#else
#define BBS(n) INLINE void BBS##n( uint8_t src, int8_t reladdr ) { \
dbgPrintf("BBS"#n" "); \
disPrintf(disassembly.inst, "BBS"#n); \
}
#endif
BBS(0)
BBS(1)
@ -280,4 +319,5 @@ disPrintf(disassembly.inst, "BBS"#n); \
BBS(6)
BBS(7)
#endif // __6502_INSTR_BRANCH_H__

17
src/cpu/jit/instructions/6502_instr_call_ret_jump.h
View File

@ -39,7 +39,9 @@
INLINE void JMP( uint16_t addr ) {
dbgPrintf("JMP %04X ", addr);
disPrintf(disassembly.inst, "JMP");
// disPrintf(disassembly.comment, "to:%04X", addr)
#ifndef DEBUGGER
// disPrintf(disassembly.comment, "to:%04X", addr)
#ifdef DEBUG
if ( addr == m6502.PC - 3 ) {
dbgPrintf("Infinite Loop at %04X!\n", m6502.PC);
@ -49,6 +51,7 @@ INLINE void JMP( uint16_t addr ) {
m6502.clkfrm += 1;
}
m6502.PC = addr;
#endif
}
@ -56,8 +59,11 @@ INLINE void JMP( uint16_t addr ) {
void CALL( uint16_t addr ) {
dbgPrintf("CALL ");
disPrintf(disassembly.inst, "CALL");
#ifndef DEBUGGER
PUSH_addr(m6502.PC -1);
m6502.PC = addr;
#endif
}
// for patching game purposes -- it should not be inline!
@ -81,8 +87,11 @@ void JUMP( uint16_t addr ) {
INLINE void JSR( uint16_t addr ) {
dbgPrintf("JSR ");
disPrintf(disassembly.inst, "JSR");
#ifndef DEBUGGER
PUSH_addr(m6502.PC -1);
m6502.PC = addr;
#endif
}
/**
@ -98,6 +107,8 @@ INLINE void JSR( uint16_t addr ) {
INLINE void RTS() {
dbgPrintf("RTS ");
disPrintf(disassembly.inst, "RTS");
#ifndef DEBUGGER
m6502.PC = POP_addr() +1;
// disk accelerator would only work for a certain amount of time
@ -105,6 +116,7 @@ INLINE void RTS() {
// if ( m6502.clktime - disk.clk_last_access > clk_diskAcceleratorTimeout ) {
// clk_6502_per_frm = clk_6502_per_frm_set;
// }
#endif
}
/**
@ -120,9 +132,12 @@ INLINE void RTS() {
INLINE void RTI() {
dbgPrintf("RTI ");
disPrintf(disassembly.inst, "RTI");
#ifndef DEBUGGER
setFlags( POP() );
// m6502.I = 0;
m6502.PC = POP_addr();
#endif
}

20
src/cpu/jit/instructions/6502_instr_compare_test.h
View File

@ -42,8 +42,11 @@
INLINE void BIT( uint8_t src ) {
dbgPrintf("BIT(%02X) ", src);
disPrintf(disassembly.inst, "BIT");
#ifndef DEBUGGER
set_flags_NV(src);
set_flags_Z(m6502.A & src);
#endif
}
/**
@ -71,8 +74,11 @@ INLINE void BIT( uint8_t src ) {
INLINE void TRB( uint16_t addr ) {
dbgPrintf("TRB(%02X) ", src);
disPrintf(disassembly.inst, "TRB");
#ifndef DEBUGGER
set_flags_Z( WRLOMEM[addr] & m6502.A );
WRLOMEM[addr] &= ~m6502.A;
#endif
}
/**
@ -98,8 +104,11 @@ INLINE void TRB( uint16_t addr ) {
INLINE void TSB( uint16_t addr ) {
dbgPrintf("TSB(%02X) ", src);
disPrintf(disassembly.inst, "TSB");
#ifndef DEBUGGER
set_flags_Z( WRLOMEM[addr] & m6502.A );
WRLOMEM[addr] |= m6502.A;
#endif
}
/**
@ -119,13 +128,18 @@ INLINE void TSB( uint16_t addr ) {
(indirect,X) CMP (oper,X) C1 2 6
(indirect),Y CMP (oper),Y D1 2 5*
**/
#ifndef DEBUGGER
INLINE void _CMP( uint8_t src ) {
set_flags_NZC( (int16_t)m6502.A - src );
}
#endif
INLINE void CMP( uint8_t src ) {
dbgPrintf("CMP(%02X) ", src);
disPrintf(disassembly.inst, "CMP");
#ifndef DEBUGGER
_CMP(src);
#endif
}
/**
@ -143,7 +157,10 @@ INLINE void CMP( uint8_t src ) {
INLINE void CPX( uint8_t src ) {
dbgPrintf("CPX(%02X) ", src);
disPrintf(disassembly.inst, "CPX");
#ifndef DEBUGGER
set_flags_NZC( (int16_t)m6502.X - src );
#endif
}
/**
@ -161,7 +178,10 @@ INLINE void CPX( uint8_t src ) {
INLINE void CPY( uint8_t src ) {
dbgPrintf("CPY(%02X) ", src);
disPrintf(disassembly.inst, "CPY");
#ifndef DEBUGGER
set_flags_NZC( (int16_t)m6502.Y - src );
#endif
}
#endif // __6502_INSTR_COMPARE_TEST_H__

28
src/cpu/jit/instructions/6502_instr_inc_dec.h
View File

@ -38,12 +38,17 @@
absolute INC oper EE 3 6
absolute,X INC oper,X FE 3 7
**/
#ifndef DEBUGGER
INLINE void _INC( uint16_t addr ) {
set_flags_NZ( ++(WRLOMEM[addr]) );
}
#endif
INLINE void INC( uint16_t addr ) {
disPrintf(disassembly.inst, "INC");
#ifndef DEBUGGER
_INC(addr);
#endif
}
/**
@ -59,8 +64,11 @@ INLINE void INC( uint16_t addr ) {
INLINE void INX() {
dbgPrintf("INX %02X -> ", m6502.X);
disPrintf(disassembly.inst, "INX");
#ifndef DEBUGGER
set_flags_NZ( ++m6502.X );
dbgPrintf("%02X ", m6502.X);
#endif
}
/**
@ -76,8 +84,11 @@ INLINE void INX() {
INLINE void INY() {
dbgPrintf("INY %02X -> ", m6502.Y);
disPrintf(disassembly.inst, "INY");
#ifndef DEBUGGER
set_flags_NZ( ++m6502.Y );
dbgPrintf("%02X ", m6502.Y);
#endif
}
/**
@ -93,8 +104,11 @@ INLINE void INY() {
INLINE void INA() {
dbgPrintf("INA %02X -> ", m6502.A);
disPrintf(disassembly.inst, "INA");
#ifndef DEBUGGER
set_flags_NZ( ++m6502.A );
dbgPrintf("%02X ", m6502.A);
#endif
}
/**
@ -110,12 +124,17 @@ INLINE void INA() {
absolute DEC oper CE 3 3
absolute,X DEC oper,X DE 3 7
**/
#ifndef DEBUGGER
INLINE void _DEC( uint16_t addr ) {
set_flags_NZ( --(WRLOMEM[addr]) );
}
#endif
INLINE void DEC( uint16_t addr ) {
disPrintf(disassembly.inst, "DEC");
#ifndef DEBUGGER
_DEC(addr);
#endif
}
/**
@ -131,8 +150,11 @@ INLINE void DEC( uint16_t addr ) {
INLINE void DEX() {
dbgPrintf("DEX %02X -> ", m6502.X);
disPrintf(disassembly.inst, "DEX");
#ifndef DEBUGGER
set_flags_NZ( --m6502.X );
dbgPrintf("%02X ", m6502.X);
#endif
}
/**
@ -148,8 +170,11 @@ INLINE void DEX() {
INLINE void DEY() {
dbgPrintf("DEY %02X -> ", m6502.Y);
disPrintf(disassembly.inst, "DEY");
#ifndef DEBUGGER
set_flags_NZ( --m6502.Y );
dbgPrintf("%02X ", m6502.Y);
#endif
}
/**
@ -165,8 +190,11 @@ implied DEC 88 1 2
INLINE void DEA() {
dbgPrintf("DEA %02X -> ", m6502.A);
disPrintf(disassembly.inst, "DEA");
#ifndef DEBUGGER
set_flags_NZ( --m6502.A );
dbgPrintf("%02X ", m6502.A);
#endif
}
#endif // __6502_INSTR_INC_DEC_H__

16
src/cpu/jit/instructions/6502_instr_load_store.h
View File

@ -48,7 +48,9 @@
INLINE void LDA( uint8_t src ) {
dbgPrintf("LDA(%02X) ", src);
disPrintf(disassembly.inst, "LDA");
#ifndef DEBUGGER
set_flags_NZ(m6502.A = src);
#endif
}
/**
@ -68,7 +70,9 @@ INLINE void LDA( uint8_t src ) {
INLINE void LDX( uint8_t src ) {
dbgPrintf("LDX(%02X) ", src);
disPrintf(disassembly.inst, "LDX");
#ifndef DEBUGGER
set_flags_NZ(m6502.X = src);
#endif
}
/**
@ -88,7 +92,9 @@ INLINE void LDX( uint8_t src ) {
INLINE void LDY( uint8_t src ) {
dbgPrintf("LDY(%02X) ", src);
disPrintf(disassembly.inst, "LDY");
#ifndef DEBUGGER
set_flags_NZ(m6502.Y = src);
#endif
}
@ -107,7 +113,9 @@ char * charConv =
**/
INLINE void STR( uint16_t addr, uint8_t src ) {
dbgPrintf("STR [%04X], %02X ", addr, src );
#ifndef DEBUGGER
memwrite(addr, src);
#endif
}
/**
@ -129,7 +137,9 @@ INLINE void STR( uint16_t addr, uint8_t src ) {
INLINE void STA( uint16_t addr ) {
dbgPrintf("STA ");
disPrintf(disassembly.inst, "STA");
#ifndef DEBUGGER
STR(addr, m6502.A);
#endif
}
/**
@ -147,7 +157,9 @@ INLINE void STA( uint16_t addr ) {
INLINE void STX( uint16_t addr ) {
dbgPrintf("STX ");
disPrintf(disassembly.inst, "STX");
#ifndef DEBUGGER
STR(addr, m6502.X);
#endif
}
/**
@ -165,7 +177,9 @@ INLINE void STX( uint16_t addr ) {
INLINE void STY( uint16_t addr ) {
dbgPrintf("STY ");
disPrintf(disassembly.inst, "STY");
#ifndef DEBUGGER
STR(addr, m6502.Y);
#endif
}
/**
@ -184,7 +198,9 @@ INLINE void STY( uint16_t addr ) {
INLINE void STZ( uint16_t addr ) {
dbgPrintf("STZ ");
disPrintf(disassembly.inst, "STZ");
#ifndef DEBUGGER
STR(addr, 0);
#endif
}
#endif // __6502_INSTR_LOAD_STORE_H__

13
src/cpu/jit/instructions/6502_instr_logic.h
View File

@ -42,13 +42,18 @@
(indirect,X) ORA (oper,X) 01 2 6
(indirect),Y ORA (oper),Y 11 2 5*
**/
#ifndef DEBUGGER
INLINE void _ORA( uint8_t src ) {
set_flags_NZ( m6502.A |= src );
}
#endif
INLINE void ORA( uint8_t src ) {
dbgPrintf("ORA(%02X) ", src);
disPrintf(disassembly.inst, "ORA");
#ifndef DEBUGGER
_ORA(src);
#endif
}
/**
@ -68,13 +73,18 @@ INLINE void ORA( uint8_t src ) {
(indirect,X) AND (oper,X) 21 2 6
(indirect),Y AND (oper),Y 31 2 5*
**/
#ifndef DEBUGGER
INLINE void _AND( uint8_t src ) {
set_flags_NZ( m6502.A &= src );
}
#endif
INLINE void AND( uint8_t src ) {
dbgPrintf("AND(%02X) ", src);
disPrintf(disassembly.inst, "AND");
#ifndef DEBUGGER
_AND(src);
#endif
}
/**
@ -97,7 +107,10 @@ INLINE void AND( uint8_t src ) {
INLINE void EOR( uint8_t src ) {
dbgPrintf("EOR(%02X) ", src);
disPrintf(disassembly.inst, "EOR");
#ifndef DEBUGGER
set_flags_NZ( m6502.A ^= src );
#endif
}
#endif // __6502_INSTR_LOGIC_H__

7
src/cpu/jit/instructions/6502_instr_misc.h
View File

@ -38,13 +38,15 @@
INLINE int BRK() {
dbgPrintf("BRK ");
disPrintf(disassembly.inst, "BRK");
#ifndef DEBUGGER
PUSH_addr(m6502.PC +1); // PC +2, however, fetch already incremented it by 1
// B flag should be set before pushing flags onto the stack
m6502.B = 1;
PUSH( getFlags().SR );
m6502.I = 1;
m6502.PC = memread16(IRQ_VECTOR);
#endif
return 7;
}
@ -53,7 +55,10 @@ INLINE int BRK() {
**/
INLINE void HLT() {
disPrintf(disassembly.inst, "HLT");
#ifndef DEBUGGER
m6502.interrupt = HALT;
#endif
}
/**

29
src/cpu/jit/instructions/6502_instr_set_clr.h
View File

@ -37,7 +37,9 @@
INLINE void CLC() {
dbgPrintf("CLC ");
disPrintf(disassembly.inst, "CLC");
#ifndef DEBUGGER
m6502.C = 0;
#endif
}
/**
@ -53,7 +55,9 @@ INLINE void CLC() {
INLINE void CLD() {
dbgPrintf("CLD ");
disPrintf(disassembly.inst, "CLD");
#ifndef DEBUGGER
m6502.D = 0;
#endif
}
/**
@ -69,7 +73,9 @@ INLINE void CLD() {
INLINE void CLI() {
dbgPrintf("CLI ");
disPrintf(disassembly.inst, "CLI");
#ifndef DEBUGGER
m6502.I = 0;
#endif
}
/**
@ -85,7 +91,9 @@ INLINE void CLI() {
INLINE void CLV() {
dbgPrintf("CLV ");
disPrintf(disassembly.inst, "CLV");
#ifndef DEBUGGER
m6502.V = 0;
#endif
}
/**
@ -101,7 +109,9 @@ INLINE void CLV() {
INLINE void SEC() {
dbgPrintf("SEC ");
disPrintf(disassembly.inst, "SEC");
#ifndef DEBUGGER
m6502.C = 1;
#endif
}
/**
@ -117,7 +127,9 @@ INLINE void SEC() {
INLINE void SED() {
dbgPrintf("SED ");
disPrintf(disassembly.inst, "SED");
#ifndef DEBUGGER
m6502.D = 1;
#endif
}
/**
@ -133,7 +145,9 @@ INLINE void SED() {
INLINE void SEI() {
dbgPrintf("SEI ");
disPrintf(disassembly.inst, "SEI");
#ifndef DEBUGGER
m6502.I = 1;
#endif
}
/**
@ -175,11 +189,18 @@ INLINE void SEI() {
E7 2 5 zp ........ SMB6 $12
F7 2 5 zp ........ SMB7 $12
**/
#ifndef DEBUGGER
#define RMB(n) INLINE void RMB##n( uint8_t zpg ) { \
dbgPrintf("RMB"#n" "); \
disPrintf(disassembly.inst, "RMB"#n); \
WRLOMEM[zpg] &= ~(1 << n); \
}
#else
#define RMB(n) INLINE void RMB##n( uint8_t zpg ) { \
dbgPrintf("RMB"#n" "); \
disPrintf(disassembly.inst, "RMB"#n); \
}
#endif
RMB(0)
RMB(1)
@ -190,11 +211,19 @@ INLINE void SEI() {
RMB(6)
RMB(7)
#ifndef DEBUGGER
#define SMB(n) INLINE void SMB##n( uint8_t zpg ) { \
dbgPrintf("SMB"#n" "); \
disPrintf(disassembly.inst, "SMB"#n); \
WRLOMEM[zpg] |= (1 << n); \
}
#else
#define SMB(n) INLINE void SMB##n( uint8_t zpg ) { \
dbgPrintf("SMB"#n" "); \
disPrintf(disassembly.inst, "SMB"#n); \
}
#endif
SMB(0)
SMB(1)

30
src/cpu/jit/instructions/6502_instr_shift_rotate.h
View File

@ -39,20 +39,28 @@
absolute ASL oper 0E 3 6
absolute,X ASL oper,X 1E 3 7
**/
#ifndef DEBUGGER
INLINE void _ASL( uint16_t addr ) {
m6502.C = memread(addr) & 0x80;
set_flags_NZ( WRLOMEM[addr] <<= 1 );
}
#endif
INLINE void ASL( uint16_t addr ) {
dbgPrintf("ASL ");
disPrintf(disassembly.inst, "ASL");
#ifndef DEBUGGER
_ASL(addr);
#endif
}
INLINE void ASLA() {
dbgPrintf("ASL ");
disPrintf(disassembly.inst, "ASL");
#ifndef DEBUGGER
m6502.C = m6502.A & 0x80;
set_flags_NZ( m6502.A <<= 1 );
#endif
}
/**
@ -72,14 +80,20 @@ INLINE void ASLA() {
INLINE void LSR( uint16_t addr ) {
dbgPrintf("LSR ");
disPrintf(disassembly.inst, "LSR");
#ifndef DEBUGGER
m6502.C = WRLOMEM[addr] & 1;
set_flags_NZ( WRLOMEM[addr] >>= 1 );
#endif
}
INLINE void LSRA() {
dbgPrintf("LSR ");
disPrintf(disassembly.inst, "LSR");
#ifndef DEBUGGER
m6502.C = m6502.A & 1;
set_flags_NZ( m6502.A >>= 1 );
#endif
}
/**
@ -96,24 +110,32 @@ INLINE void LSRA() {
absolute ROL oper 2E 3 6
absolute,X ROL oper,X 3E 3 7
**/
#ifndef DEBUGGER
INLINE void _ROL( uint16_t addr ) {
uint8_t C = m6502.C != 0;
m6502.C = WRLOMEM[addr] & 0x80;
WRLOMEM[addr] <<= 1;
set_flags_NZ( WRLOMEM[addr] |= C );
}
#endif
INLINE void ROL( uint16_t addr ) {
dbgPrintf("ROL ");
disPrintf(disassembly.inst, "ROL");
#ifndef DEBUGGER
_ROL(addr);
#endif
}
INLINE void ROLA() {
dbgPrintf("ROL ");
disPrintf(disassembly.inst, "ROL");
#ifndef DEBUGGER
uint8_t C = m6502.C != 0;
m6502.C = m6502.A & 0x80;
m6502.A <<= 1;
set_flags_NZ( m6502.A |= C );
#endif
}
/**
@ -130,24 +152,32 @@ INLINE void ROLA() {
absolute ROR oper 6E 3 6
absolute,X ROR oper,X 7E 3 7
**/
#ifndef DEBUGGER
INLINE void _ROR( uint16_t addr ) {
uint8_t C = m6502.C != 0;
m6502.C = WRLOMEM[addr] & 1;
WRLOMEM[addr] >>= 1;
set_flags_NZ( WRLOMEM[addr] |= C << 7 );
}
#endif
INLINE void ROR( uint16_t addr ) {
dbgPrintf("ROR ");
disPrintf(disassembly.inst, "ROR");
#ifndef DEBUGGER
_ROR(addr);
#endif
}
INLINE void RORA() {
dbgPrintf("ROR ");
disPrintf(disassembly.inst, "ROR");
#ifndef DEBUGGER
uint8_t C = m6502.C != 0;
m6502.C = m6502.A & 1;
m6502.A >>= 1;
set_flags_NZ( m6502.A |= C << 7);
#endif
}

36
src/cpu/jit/instructions/6502_instr_stack.h
View File

@ -27,6 +27,7 @@
static const uint16_t stack_base_addr = 0x100;
#ifndef DEBUGGER
INLINE void PUSH( uint8_t src ) {
// DO NOT MAKE IT NICER! faster this way!
WRLOMEM[ stack_base_addr | m6502.SP-- ] = src;
@ -45,7 +46,7 @@ INLINE void PUSH_addr( uint16_t addr ) {
INLINE uint16_t POP_addr() {
return POP() + ( POP() << 8 );
}
#endif
/**
PHA Push Accumulator on Stack
@ -60,7 +61,10 @@ INLINE uint16_t POP_addr() {
INLINE void PHA() {
dbgPrintf("PHA %02X ", m6502.A);
disPrintf(disassembly.inst, "PHA");
#ifndef DEBUGGER
PUSH( m6502.A );
#endif
}
/**
@ -76,7 +80,10 @@ INLINE void PHA() {
INLINE void PHX() {
dbgPrintf("PHX %02X ", m6502.X);
disPrintf(disassembly.inst, "PHX");
#ifndef DEBUGGER
PUSH( m6502.X );
#endif
}
/**
@ -92,7 +99,10 @@ INLINE void PHX() {
INLINE void PHY() {
dbgPrintf("PHY %02X ", m6502.Y);
disPrintf(disassembly.inst, "PHY");
#ifndef DEBUGGER
PUSH( m6502.Y );
#endif
}
/**
@ -106,10 +116,16 @@ INLINE void PHY() {
implied PLA 68 1 4
**/
INLINE void PLA() {
#ifndef DEBUGGER
m6502.A = POP();
#endif
dbgPrintf("PLA %02X ", m6502.A);
disPrintf(disassembly.inst, "PLA");
#ifndef DEBUGGER
set_flags_NZ( m6502.A );
#endif
}
/**
@ -123,10 +139,16 @@ INLINE void PLA() {
implied PLX 68 1 4
**/
INLINE void PLX() {
#ifndef DEBUGGER
m6502.X = POP();
#endif
dbgPrintf("PLX %02X ", m6502.X);
disPrintf(disassembly.inst, "PLX");
#ifndef DEBUGGER
set_flags_NZ( m6502.X );
#endif
}
/**
@ -140,10 +162,16 @@ INLINE void PLX() {
implied PLY 68 1 4
**/
INLINE void PLY() {
#ifndef DEBUGGER
m6502.Y = POP();
#endif
dbgPrintf("PLY %02X ", m6502.Y);
disPrintf(disassembly.inst, "PLY");
#ifndef DEBUGGER
set_flags_NZ( m6502.Y );
#endif
}
/**
@ -159,7 +187,10 @@ INLINE void PLY() {
INLINE void PHP() {
dbgPrintf("PHP %02X ", m6502.SR);
disPrintf(disassembly.inst, "PHP");
#ifndef DEBUGGER
PUSH( getFlags().SR ); // res and B flag should be set
#endif
}
/**
@ -173,7 +204,10 @@ INLINE void PHP() {
implied PLP 28 1 4
**/
INLINE void PLP() {
#ifndef DEBUGGER
setFlags(POP() | 0x30); // res and B flag should be set
#endif
dbgPrintf("PLP %02X ", m6502.SR);
disPrintf(disassembly.inst, "PLP");
}

18
src/cpu/jit/instructions/6502_instr_transfer.h
View File

@ -38,7 +38,10 @@
INLINE void TAX() {
dbgPrintf("TAX(%02X) ", m6502.A);
disPrintf(disassembly.inst, "TAX");
#ifndef DEBUGGER
set_flags_NZ(m6502.X = m6502.A);
#endif
}
/**
@ -54,7 +57,10 @@ INLINE void TAX() {
INLINE void TXA() {
dbgPrintf("TXA(%02X) ", m6502.X);
disPrintf(disassembly.inst, "TXA");
#ifndef DEBUGGER
set_flags_NZ(m6502.A = m6502.X);
#endif
}
@ -71,7 +77,10 @@ INLINE void TXA() {
INLINE void TAY() {
dbgPrintf("TAY ");
disPrintf(disassembly.inst, "TAY");
#ifndef DEBUGGER
set_flags_NZ(m6502.Y = m6502.A);
#endif
}
/**
@ -87,7 +96,10 @@ INLINE void TAY() {
INLINE void TYA() {
dbgPrintf("TYA(%02X) ", m6502.Y);
disPrintf(disassembly.inst, "TYA");
#ifndef DEBUGGER
set_flags_NZ(m6502.A = m6502.Y);
#endif
}
/**
@ -103,7 +115,10 @@ INLINE void TYA() {
INLINE void TSX() {
dbgPrintf("TSX(%02X) ", m6502.SP);
disPrintf(disassembly.inst, "TSX");
#ifndef DEBUGGER
set_flags_NZ(m6502.X = m6502.SP);
#endif
}
/**
@ -119,7 +134,10 @@ INLINE void TSX() {
INLINE void TXS() {
dbgPrintf("TXS(%02X) ", m6502.X);
disPrintf(disassembly.inst, "TXS");
#ifndef DEBUGGER
m6502.SP = m6502.X;
#endif
}
#endif // __6502_INSTR_TRANSFER_H__

37
src/cpu/jit/instructions/6502_instr_undoc.h
View File

@ -35,8 +35,10 @@ ANC - "AND" Memory with Accumulator
INLINE void ANC ( uint8_t src ) {
disPrintf(disassembly.inst, "ANC");
#ifndef DEBUGGER
set_flags_NZ( m6502.A &= src );
m6502.C = m6502.A >> 7;
#endif
}
@ -53,6 +55,7 @@ INLINE void ANC ( uint8_t src ) {
INLINE void ARC ( uint8_t src ) {
disPrintf(disassembly.inst, "ARC");
#ifndef DEBUGGER
_AND(src);
m6502.C = m6502.A >> 7;
@ -60,6 +63,7 @@ INLINE void ARC ( uint8_t src ) {
uint8_t C = m6502.C != 0;
m6502.A >>= 1;
set_flags_NZ( m6502.A |= C << 7);
#endif
}
@ -73,12 +77,14 @@ INLINE void ARC ( uint8_t src ) {
INLINE void ASR ( uint8_t src ) {
disPrintf(disassembly.inst, "ASR");
#ifndef DEBUGGER
// AND
m6502.A &= src;
// LSR A
m6502.C = m6502.A & 1;
set_flags_NZ( m6502.A >>= 1 );
#endif
}
@ -91,8 +97,10 @@ INLINE void ASR ( uint8_t src ) {
**/
INLINE void DCP ( uint16_t addr ) {
disPrintf(disassembly.inst, "DCP");
#ifndef DEBUGGER
_DEC(addr);
_CMP(WRLOMEM[addr]);
#endif
}
@ -101,7 +109,9 @@ INLINE void DCP ( uint16_t addr ) {
**/
INLINE void LAS ( uint8_t src ) {
disPrintf(disassembly.inst, "LAS");
#ifndef DEBUGGER
set_flags_NZ( m6502.A = m6502.X = m6502.SP = m6502.SP & src );
#endif
}
@ -114,8 +124,10 @@ INLINE void LAS ( uint8_t src ) {
**/
INLINE void ISB ( uint16_t addr ) {
disPrintf(disassembly.inst, "ISB");
#ifndef DEBUGGER
_INC(addr);
_SBC(WRLOMEM[addr]);
#endif
}
@ -126,7 +138,9 @@ INLINE void ISB ( uint16_t addr ) {
**/
INLINE void LAX ( uint8_t src ) {
disPrintf(disassembly.inst, "LAX");
#ifndef DEBUGGER
set_flags_NZ(m6502.A = m6502.X = src);
#endif
}
@ -140,8 +154,10 @@ INLINE void LAX ( uint8_t src ) {
INLINE void RLA ( uint16_t addr ) {
disPrintf(disassembly.inst, "RLA");
#ifndef DEBUGGER
_ROL(addr);
_AND(WRLOMEM[addr]);
#endif
}
@ -154,8 +170,10 @@ INLINE void RLA ( uint16_t addr ) {
**/
INLINE void RRA ( uint16_t addr ) {
disPrintf(disassembly.inst, "RRA");
#ifndef DEBUGGER
_ROR(addr);
_ADC(WRLOMEM[addr]);
#endif
}
@ -169,8 +187,10 @@ INLINE void RRA ( uint16_t addr ) {
INLINE void SAS ( uint16_t addr ) {
disPrintf(disassembly.inst, "SAS");
#ifndef DEBUGGER
m6502.SP = m6502.A & m6502.X;
set_flags_NZ( WRLOMEM[addr] = m6502.SP & ((addr >> 8) + 1) );
#endif
}
@ -198,6 +218,7 @@ INLINE void SAS ( uint16_t addr ) {
INLINE void SBX ( uint8_t src ) {
disPrintf(disassembly.inst, "SBX");
#ifndef DEBUGGER
uint16_t tmp;
// Decimal flag is ignored
@ -206,6 +227,7 @@ INLINE void SBX ( uint8_t src ) {
m6502.C = tmp < 0x100;
m6502.V = ( (m6502.A ^ tmp) & 0x80 ) && ( (m6502.A ^ src) & 0x80 );
set_flags_NZ( m6502.X = tmp );
#endif
}
@ -217,7 +239,9 @@ INLINE void SBX ( uint8_t src ) {
INLINE void SHA ( uint16_t addr ) {
disPrintf(disassembly.inst, "SHA");
#ifndef DEBUGGER
set_flags_NZ( WRLOMEM[addr] = m6502.X & m6502.A & ((addr >> 8) + 1) );
#endif
}
@ -229,7 +253,9 @@ INLINE void SHA ( uint16_t addr ) {
INLINE void SHY ( uint16_t addr ) {
disPrintf(disassembly.inst, "SHY");
#ifndef DEBUGGER
set_flags_NZ( WRLOMEM[addr] = m6502.Y &((addr >> 8) + 1) );
#endif
}
@ -241,7 +267,9 @@ INLINE void SHY ( uint16_t addr ) {
INLINE void SHX ( uint16_t addr ) {
disPrintf(disassembly.inst, "SHX");
#ifndef DEBUGGER
set_flags_NZ( WRLOMEM[addr] = m6502.X &((addr >> 8) + 1) );
#endif
}
@ -258,9 +286,11 @@ INLINE void SHX ( uint16_t addr ) {
INLINE void SLO ( uint16_t addr ) {
disPrintf(disassembly.inst, "SLO");
#ifndef DEBUGGER
_ASL(addr);
_ORA( WRLOMEM[addr] );
set_flags_NZ( WRLOMEM[addr] = m6502.A ); // A -> M
#endif
}
@ -272,7 +302,9 @@ INLINE void SLO ( uint16_t addr ) {
INLINE void SAX ( uint16_t addr ) {
disPrintf(disassembly.inst, "SAX");
#ifndef DEBUGGER
set_flags_NZ( WRLOMEM[addr] = m6502.A & m6502.X );
#endif
}
@ -287,13 +319,14 @@ INLINE void SAX ( uint16_t addr ) {
INLINE void SRE ( uint16_t addr ) {
disPrintf(disassembly.inst, "SRE");
#ifndef DEBUGGER
// LSR
m6502.C = WRLOMEM[addr] & 1;
set_flags_NZ( WRLOMEM[addr] >>= 1 );
// EOR M
set_flags_NZ( m6502.A |= WRLOMEM[addr] );
#endif
}
@ -304,7 +337,9 @@ XAA - "AND" Memory with Index X into Accumulator
**/
INLINE void XAA ( uint8_t src ) {
disPrintf(disassembly.inst, "XAA");
#ifndef DEBUGGER
set_flags_NZ( m6502.A = m6502.X & src );
#endif
}

13
src/dev/audio/speaker.c
View File

@ -39,7 +39,9 @@
// 64 dow not sound better much than 32
// 128 Relally good!
// 256 sounds really amazing!
#define SPKR_OVERSAMPLING 128
//#define SPKR_OVERSAMPLING 128
#define SPKR_OVERSAMPLING 160
//#define SPKR_OVERSAMPLING 256
#define min(x,y) (x) < (y) ? (x) : (y)
@ -111,7 +113,11 @@ int spkr_last_level = SPKR_LEVEL_ZERO;
//static const int ema_len_soft = 20;
//static const int ema_len_supersoft = 40;
#if (SPKR_OVERSAMPLING >= 128)
#if (SPKR_OVERSAMPLING >= 256)
int spkr_ema_len = 480;
#elif (SPKR_OVERSAMPLING >= 160)
int spkr_ema_len = 480;
#elif (SPKR_OVERSAMPLING >= 128)
int spkr_ema_len = 256;
#elif (SPKR_OVERSAMPLING >= 64)
int spkr_ema_len = 128;
@ -575,6 +581,9 @@ float SPKR_INITIAL_TRAILING_EDGE = 0.64; // need a bit of slope to get Xonix so
void spkr_toggle() {
// do not sleep while sound is playing
m6502.ecoSpindown = ecoSpindown;
if ( diskAccelerator_count ) {
// turn off disk acceleration immediately
diskAccelerator_count = 0;

153
src/dev/mem/mmio.c
View File

@ -68,9 +68,6 @@ uint8_t activeTextAuxPage = 0;
uint8_t * activeTextPage = Apple2_64K_RAM + 0x400;
uint8_t * shadowTextPage = Apple2_64K_MEM + 0x400;
unsigned int lastIO = 0;
#define INIT_MEMCFG { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
const MEMcfg_t initMEMcfg = INIT_MEMCFG;
@ -317,14 +314,14 @@ INLINE int is_io_interesting( uint16_t addr ) {
}
INLINE uint8_t kbdRead( const unsigned IOframe ) {
if ( cpuMode == cpuMode_eco ) {
INLINE uint8_t kbdRead() {
// if ( cpuMode == cpuMode_eco ) {
// check if this is a busy keyboard poll (aka waiting for user input)
if ( IOframe < 16 ) {
clk_6502_per_frm_max = 6502; // Let it run for a bit to display character -- nerd number :-)
cpuState = cpuState_halting;
}
}
// if ( IOframe < 16 ) {
// clk_6502_per_frm_max = 6502; // Let it run for a bit to display character -- nerd number :-)
// cpuState = cpuState_halting;
// }
// }
// we have to return keybard not only for $C000 but for ports all the way till $C00F
return Apple2_64K_RAM[io_KBD];
@ -334,16 +331,17 @@ INLINE uint8_t kbdRead( const unsigned IOframe ) {
INLINE uint8_t kbdStrobe() {
Apple2_64K_RAM[io_KBD] &= ~(1 << 7);
if ( cpuMode == cpuMode_eco ) {
// check if this is a busy keyboard poll (aka waiting for user input)
clk_6502_per_frm_max = clk_6502_per_frm; // Absolute low mode
cpuState = cpuState_running;
}
// if ( cpuMode == cpuMode_eco ) {
// // check if this is a busy keyboard poll (aka waiting for user input)
// clk_6502_per_frm_max = clk_6502_per_frm; // Absolute low mode
// cpuState = cpuState_halting; // cpuState_running;
// }
return Apple2_64K_RAM[io_KBDSTRB];
}
#ifndef DEBUGGER
INLINE uint8_t ioRead( uint16_t addr ) {
// if (outdev) fprintf(outdev, "ioRead:%04X\n", addr);
@ -351,8 +349,7 @@ INLINE uint8_t ioRead( uint16_t addr ) {
// printf("ioRead:%04X (PC:%04X)\n", addr, m6502.PC);
// }
unsigned int IOframe = m6502.clkfrm - lastIO;
lastIO = m6502.clkfrm;
m6502.lastIO = m6502.clkfrm;
// // TODO: This is for speed demo only, should be either removed or the entire ioRead should based on binary search, whatever is faster
// if ( addr == io_KBD ) {
@ -378,7 +375,7 @@ INLINE uint8_t ioRead( uint16_t addr ) {
case (uint8_t)io_SETALTZP:
case (uint8_t)io_SETINTC3ROM:
case (uint8_t)io_SETSLOTC3ROM:
return kbdRead(IOframe);
return kbdRead();
case (uint8_t)io_KBDSTRB:
return kbdStrobe();
@ -507,7 +504,7 @@ INLINE uint8_t ioRead( uint16_t addr ) {
auxMemorySelect(newMEMcfg);
// still need to return keyboard
return kbdRead(IOframe);
return kbdRead();
break;
@ -518,7 +515,7 @@ INLINE uint8_t ioRead( uint16_t addr ) {
auxMemorySelect(newMEMcfg);
// still need to return keyboard
return kbdRead(IOframe);
return kbdRead();
break;
@ -529,7 +526,7 @@ INLINE uint8_t ioRead( uint16_t addr ) {
auxMemorySelect(newMEMcfg);
// still need to return keyboard
return kbdRead(IOframe);
return kbdRead();
break;
@ -540,7 +537,7 @@ INLINE uint8_t ioRead( uint16_t addr ) {
auxMemorySelect(newMEMcfg);
// still need to return keyboard
return kbdRead(IOframe);
return kbdRead();
break;
@ -891,7 +888,7 @@ INLINE void ioWrite( uint16_t addr, uint8_t val ) {
}
return;
}
#endif
/**
Naive implementation of RAM read from address
@ -903,10 +900,11 @@ INLINE uint8_t memread8_high( uint16_t addr ) {
return RDHIMEM[addr];
}
INLINE uint8_t memread8( uint16_t addr ) {
#ifndef DEBUGGER
if (addr >= 0xC000) {
return memread8_high(addr);
}
#endif
return memread8_low(addr);
}
/**
@ -928,6 +926,7 @@ INLINE uint16_t memread16( uint16_t addr ) {
}
INLINE uint8_t memread( uint16_t addr ) {
#ifndef DEBUGGER
if (addr >= 0xC000) {
if (addr < 0xC100) {
return ioRead(addr);
@ -936,7 +935,7 @@ INLINE uint8_t memread( uint16_t addr ) {
// return memread8_paged(addr);
return memread8_high(addr);
}
#endif
// return memread8_paged(addr);
return memread8_low(addr);
@ -965,15 +964,22 @@ INLINE uint8_t memread( uint16_t addr ) {
**/
INLINE void memwrite8_low( uint16_t addr, uint8_t data ) {
#ifndef DEBUGGER
WRLOMEM[addr] = data;
#endif
}
INLINE void memwrite8_bank( uint16_t addr, uint8_t data ) {
#ifndef DEBUGGER
WRD0MEM[addr] = data;
#endif
}
INLINE void memwrite8_high( uint16_t addr, uint8_t data ) {
#ifndef DEBUGGER
WRHIMEM[addr] = data;
#endif
}
INLINE void memwrite( uint16_t addr, uint8_t data ) {
#ifndef DEBUGGER
if (addr >= 0xC000) {
if (addr < 0xC100) {
ioWrite(addr, data);
@ -995,7 +1001,7 @@ INLINE void memwrite( uint16_t addr, uint8_t data ) {
// RAM
memwrite8_low(addr, data);
}
#endif
}
/**
@ -1048,11 +1054,15 @@ INLINE uint16_t fetch16() {
**/
INLINE uint16_t addr_abs() {
dbgPrintf("abs:%04X(%02X) ", *((uint16_t*)&RAM[m6502.PC]), RAM[*((uint16_t*)&RAM[m6502.PC])]);
disPrintf(disassembly.oper, "$%04X", memread16(m6502.PC))
disPrintf(disassembly.oper, "$%04X", memread16(m6502.PC));
return fetch16();
}
INLINE uint8_t src_abs() {
#ifndef DEBUGGER
return memread( addr_abs() );
#else
return 0;
#endif
}
//INLINE uint8_t * dest_abs() {
// return WRLOMEM + addr_abs();
@ -1060,17 +1070,22 @@ INLINE uint8_t src_abs() {
INLINE int8_t rel_addr() {
disPrintf(disassembly.oper, "$%04X", m6502.PC + 1 + (int8_t)memread8(m6502.PC))
disPrintf(disassembly.oper, "$%04X", m6502.PC + 1 + (int8_t)memread8(m6502.PC));
return fetch();
}
INLINE uint16_t abs_addr() {
disPrintf(disassembly.oper, "$%04X", memread16(m6502.PC))
disPrintf(disassembly.oper, "$%04X", memread16(m6502.PC));
return fetch16();
}
INLINE uint16_t ind_addr() {
disPrintf(disassembly.oper, "($%04X)", memread16(m6502.PC))
disPrintf(disassembly.comment, "ind_addr:%04X", memread16(memread16(m6502.PC)))
disPrintf(disassembly.oper, "($%04X)", memread16(m6502.PC));
disPrintf(disassembly.comment, "ind_addr:%04X", memread16(memread16(m6502.PC)));
#ifndef DEBUGGER
return memread16( fetch16() );
#else
return 0;
#endif
}
/**
@ -1083,7 +1098,11 @@ INLINE uint16_t addr_abs_X() {
return fetch16() + m6502.X;
}
INLINE uint8_t src_abs_X() {
#ifndef DEBUGGER
return memread( addr_abs_X() );
#else
return 0;
#endif
}
//INLINE uint8_t * dest_abs_X() {
// return WRLOMEM + addr_abs_X();
@ -1096,18 +1115,22 @@ INLINE uint8_t src_abs_X() {
**/
INLINE uint16_t addr_abs_Y() {
dbgPrintf("abs,Y:%04X(%02X) ", *((uint16_t*)&RAM[m6502.PC]) + m6502.Y, RAM[*((uint16_t*)&RAM[m6502.PC]) + m6502.Y]);
disPrintf(disassembly.oper, "$%04X,Y", memread16(m6502.PC))
disPrintf(disassembly.oper, "$%04X,Y", memread16(m6502.PC));
return fetch16() + m6502.Y;
}
INLINE uint8_t src_abs_Y() {
#ifndef DEBUGGER
return memread(addr_abs_Y());
#else
return 0;
#endif
}
//INLINE uint8_t * dest_abs_Y() {
// return WRLOMEM + addr_abs_Y();
//}
INLINE uint8_t imm() {
disPrintf(disassembly.oper, "#$%02X", memread8(m6502.PC))
disPrintf(disassembly.oper, "#$%02X", memread8(m6502.PC));
return fetch();
}
@ -1118,11 +1141,15 @@ INLINE uint8_t imm() {
**/
INLINE uint8_t addr_zp() {
dbgPrintf("zp:%02X(%02X) ", RAM[m6502.PC], RAM[ RAM[m6502.PC]] );
disPrintf(disassembly.oper, "$%02X", memread8(m6502.PC))
disPrintf(disassembly.oper, "$%02X", memread8(m6502.PC));
return fetch();
}
INLINE uint8_t src_zp() {
#ifndef DEBUGGER
return memread8_low(addr_zp());
#else
return 0;
#endif
}
//INLINE uint8_t * dest_zp() {
// return WRLOMEM + addr_zp();
@ -1145,12 +1172,21 @@ INLINE uint8_t src_zp() {
**/
INLINE uint16_t addr_ind() {
dbgPrintf("zpi:%02X:%04X(%02X) ", RAM[m6502.PC], *((uint16_t*)&RAM[m6502.PC]), RAM[*((uint16_t*)&RAM[m6502.PC])]);
disPrintf(disassembly.oper, "($%02X,X)", memread8(m6502.PC) )
disPrintf(disassembly.oper, "($%02X,X)", memread8(m6502.PC) );
disPrintf(disassembly.comment, "ind_addr:%04X", memread16( memread8(m6502.PC)) );
#ifndef DEBUGGER
return memread16( fetch() );
#else
return 0;
#endif
}
INLINE uint8_t src_ind() {
#ifndef DEBUGGER
return memread( addr_ind() );
#else
return 0;
#endif
}
/**
@ -1160,12 +1196,21 @@ INLINE uint8_t src_ind() {
**/
INLINE uint16_t addr_ind_X() {
dbgPrintf("zpXi:%02X:%04X(%02X) ", RAM[m6502.PC], *((uint16_t*)&RAM[m6502.PC]) + m6502.X, RAM[*((uint16_t*)&RAM[m6502.PC]) + m6502.X]);
disPrintf(disassembly.oper, "($%02X,X)", memread8(m6502.PC) )
disPrintf(disassembly.oper, "($%02X,X)", memread8(m6502.PC) );
disPrintf(disassembly.comment, "ind_addr:%04X", memread16( memread8(m6502.PC) + m6502.X) );
#ifndef DEBUGGER
return memread16( fetch() + m6502.X );
#else
return 0;
#endif
}
INLINE uint8_t src_X_ind() {
#ifndef DEBUGGER
return memread( addr_ind_X() );
#else
return 0;
#endif
}
//INLINE uint8_t * dest_X_ind() {
// return WRLOMEM + addr_ind_X();
@ -1179,12 +1224,21 @@ INLINE uint8_t src_X_ind() {
INLINE uint16_t addr_ind_Y() {
// uint8_t a = fetch();
// dbgPrintf("addr_ind_Y: %04X + %02X = %04X ", addr_zpg_ind( a ), m6502.Y, addr_zpg_ind( a ) + m6502.Y);
disPrintf(disassembly.oper, "($%02X),Y", memread8(m6502.PC) )
disPrintf(disassembly.oper, "($%02X),Y", memread8(m6502.PC) );
disPrintf(disassembly.comment, "ind_addr:%04X", memread16( memread8(m6502.PC) ) + m6502.Y );
#ifndef DEBUGGER
return memread16( fetch() ) + m6502.Y;
#else
return 0;
#endif
}
INLINE uint8_t src_ind_Y() {
#ifndef DEBUGGER
return memread( addr_ind_Y() );
#else
return 0;
#endif
}
//INLINE uint8_t * dest_ind_Y() {
// return WRLOMEM + addr_ind_Y();
@ -1197,11 +1251,20 @@ INLINE uint8_t src_ind_Y() {
effective address is address incremented by X without carry **
**/
INLINE uint8_t addr_zp_X() {
disPrintf(disassembly.oper, "$%02X,X", memread8(m6502.PC))
disPrintf(disassembly.oper, "$%02X,X", memread8(m6502.PC));
#ifndef DEBUGGER
return fetch() + m6502.X;
#else
return 0;
#endif
}
INLINE uint8_t src_zp_X() {
#ifndef DEBUGGER
return memread8_low(addr_zp_X());
#else
return 0;
#endif
}
//INLINE uint8_t * dest_zp_X() {
// return WRLOMEM + addr_zp_X();
@ -1213,17 +1276,27 @@ INLINE uint8_t src_zp_X() {
effective address is address incremented by Y without carry **
**/
INLINE uint8_t addr_zp_Y() {
disPrintf(disassembly.oper, "$%02X,Y", memread8(m6502.PC))
disPrintf(disassembly.oper, "$%02X,Y", memread8(m6502.PC));
#ifndef DEBUGGER
return fetch() + m6502.Y;
#else
return 0;
#endif
}
INLINE uint8_t src_zp_Y() {
#ifndef DEBUGGER
return memread8_low(addr_zp_Y());
#else
return 0;
#endif
}
//INLINE uint8_t * dest_zp_Y() {
// return WRLOMEM + addr_zp_Y();
//}
#ifndef DEBUGGER
void auxMemorySelect( MEMcfg_t newMEMcfg ) {
const uint8_t * newReadMEM = currentLowRDMEM;
uint8_t * newWriteMEM = currentLowWRMEM;
@ -1532,7 +1605,7 @@ void kbdUp () {
RAM[io_KBDSTRB] &= 0x7F;
}
#endif

8
src/dev/mem/mmio.h
View File

@ -84,9 +84,12 @@ extern void kbdInput ( uint8_t code );
extern void kbdUp (void);
extern uint8_t getIO ( uint16_t ioaddr );
extern void setIO ( uint16_t ioaddr, uint8_t val );
#ifndef DEBUGGER
extern uint8_t getMEM ( uint16_t ioaddr );
extern uint16_t getMEM16 ( uint16_t ioaddr );
extern uint32_t getMEM32 ( uint16_t ioaddr );
extern void setMEM ( uint16_t ioaddr, uint8_t val );
extern void setMEM16 ( uint16_t ioaddr, uint16_t val );
extern void setMEM32 ( uint16_t ioaddr, uint32_t val );
@ -94,6 +97,8 @@ extern void setMEMarray ( uint16_t addr, uint8_t * arr, int len );
extern void CALL( uint16_t addr );
extern void JUMP( uint16_t addr );
#endif
#define DEF_RAM_PAGE(mem,pg) \
(mem) + ((pg) << 8)
@ -393,9 +398,6 @@ extern void initMemory(void);
extern inline uint8_t *extracted(void);
extern void textPageSelect(void);
extern unsigned int lastIO;
INLINE void io_RAM_EXP( uint16_t addr );
INLINE uint8_t ioRead( uint16_t addr );
INLINE void ioWrite( uint16_t addr, uint8_t val );

48
src/util/disassembler.c
View File

@ -7,6 +7,8 @@
//
#include <stdio.h>
#include <string.h>
#include <stdarg.h>
#include "disassembler.h"
disassembly_t disassembly;
@ -28,6 +30,52 @@ INLINE flags_t getFlags2() {
}
void _disHexB( char ** s, const uint8_t b ) {
if ( m6502.dbgLevel.trace ) {
snprintf(*s, 4, "%02X ", b);
*s += 3;
}
}
void _disHexW( char ** s, const uint16_t w ) {
if ( m6502.dbgLevel.trace ) {
snprintf(*s, 6, "%04X ", w);
*s += 5;
}
}
void _disPuts( char ** s, const char * from ) {
if ( m6502.dbgLevel.trace ) {
while ( (*(*s)++ = *from++) );
}
}
void _disPrintf( char * s, const size_t n, const char * fmt, ... ) {
if ( m6502.dbgLevel.trace ) {
va_list arg_ptr;
va_start(arg_ptr, fmt);
vsnprintf( s, n, fmt, arg_ptr );
va_end(arg_ptr);
}
}
void _disNewInstruction() {
if ( m6502.dbgLevel.trace ) {
memset( &disassembly, 0, sizeof(disassembly) );
disassembly.clk = m6502.clktime + m6502.clkfrm;
snprintf(disassembly.addr, 5, "%04X ", m6502.PC);
disassembly.pOpcode = disassembly.opcode;
// disassembly.opcode[0] = '\0';
// disassembly.inst[0] = '\0';
// disassembly.oper[0] = '\0';
// disassembly.comment[0] = '\0';
}
}
#ifdef DISASSEMBLER
void printDisassembly( FILE * f ) {
if ( m6502.dbgLevel.trace && f ) {

46
src/util/disassembler.h
View File

@ -48,43 +48,23 @@ extern disassembly_t disassembly;
//extern unsigned long long int clktime;
extern unsigned long long discnt;
#define disHexB( to, b ) \
if ( m6502.dbgLevel.trace ) { \
snprintf((to), 4, "%02X ", (b)); \
to += 3; \
}
extern void _disHexB( char ** s, const uint8_t b );
#define disHexB( s, b ) _disHexB( &(s), (b) )
#define disHexW( to, w ) \
if ( m6502.dbgLevel.trace ) { \
snprintf((to), 6, "%04X ", (w)); \
to += 5; \
}
extern void _disHexW( char ** s, const uint16_t w );
#define disHexW( s, w ) _disHexW( &(s), (w) )
#define disPuts( to, from ) { \
char * s = from; \
if ( m6502.dbgLevel.trace ) { \
while ( (*(to)++ = *s++) ); \
} \
}
extern void _disPuts( char ** s, const char * from );
#define disPuts( s, from ) _disPuts( &(s), (from) )
extern void _disPrintf( char * s, const size_t n, const char * fmt, ... );
#define disPrintf( s, fmt, args... ) _disPrintf( (s), sizeof(s), (fmt), ##args )
#define disPrintf( to, fmt, args... ) { \
if ( m6502.dbgLevel.trace ) { \
snprintf( (to), sizeof(to), fmt, ##args ); \
} \
}
// TODO: We should add a new field for clk counter, so we can print that out _before_ execution, not after...
#define disNewInstruction() { \
if ( m6502.dbgLevel.trace ) { \
disassembly.clk = m6502.clktime + m6502.clkfrm; \
snprintf(disassembly.addr, 5, "%04X ", m6502.PC); \
disassembly.opcode[0] = '\0'; \
disassembly.pOpcode = disassembly.opcode; \
disassembly.inst[0] = '\0'; \
disassembly.oper[0] = '\0'; \
disassembly.comment[0] = '\0'; \
} \
}
extern void _disNewInstruction();
#define disNewInstruction() _disNewInstruction()
extern void printDisassembly( FILE * f );
@ -93,7 +73,7 @@ extern void printDisassembly( FILE * f );
#define disHexB( to, b )
#define disHexW( to, w )
#define disPuts( to, from )
#define disPrintf( to, fmt, args... )
#define disPrintf( s, fmt, args... )
#define disNewInstruction()
#define printDisassembly( f )