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Memory debug works

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This commit is contained in:
tudnai 2022-11-17 21:03:04 -08:00
parent 20daf5c73c
commit e48c71c254
5 changed files with 119 additions and 38 deletions
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2
A2Mac/DebuggerWindowController.swift
View File

@ -130,7 +130,7 @@ class DebuggerWindowController: NSWindowController, NSWindowDelegate {
ViewController.shared?.Pause(0)
m6502.debugger.wMask = 0
// m6502.debugger.wMask = 0
m6502.debugger.on = false
}

6
A2Mac/ViewController.swift
View File

@ -1328,6 +1328,12 @@ class ViewController: NSViewController {
case BREAKPOINT: // CPU halted because of a breakpoint
debugBreak()
case BREAKRDMEM: // CPU halted because of a breakpoint
debugBreak()
case BREAKWRMEM: // CPU halted because of a breakpoint
debugBreak()
case RET:
if m6502.debugger.mask.ret == 1 {
// Step_Out / Step_Over

19
src/cpu/6502_dbg.c
View File

@ -115,7 +115,7 @@ void m6502_Debug(void) {
}
clk_6502_per_frm_max = clk_6502_per_frm;
pc = m6502.PC;
for ( m6502.clkfrm = m6502_Step_dbg(); m6502.clkfrm < clk_6502_per_frm_max; m6502.clkfrm += m6502_Step_dbg() ) {
switch (m6502.interrupt) {
case HALT:
@ -134,6 +134,23 @@ void m6502_Debug(void) {
}
break;
case BREAKRDMEM:
if (m6502.debugger.mask.brk) {
cpuState = cpuState_halted;
// m6502.debugger.wMask = 0;
m6502.PC = pc;
return;
}
break;
case BREAKWRMEM:
if (m6502.debugger.mask.brk) {
cpuState = cpuState_halted;
// m6502.debugger.wMask = 0;
return;
}
break;
case IRQ:
if (m6502.debugger.mask.irq) {
cpuState = cpuState_halted;

21
src/dev/mem/mmio.c
View File

@ -1022,7 +1022,8 @@ INLINE uint8_t _memread( uint16_t addr ) {
INLINE uint8_t _memread_dbg( uint16_t addr ) {
if (LAST_IDX(mem_read_breakpoints)) {
if ( m6502_dbg_bp_exists(mem_read_breakpoints, addr) ) {
cpuState = cpuState_halted;
// printf("MEM BP $%04X (bp:%04X)\n", addr, m6502.PC);
// cpuState = cpuState_halted;
m6502.interrupt = BREAKRDMEM;
}
}
@ -1169,6 +1170,9 @@ INLINE uint16_t _addr_abs_dis() {
INLINE uint8_t _src_abs() {
return _memread( _addr_abs() );
}
INLINE uint8_t _src_abs_dbg() {
return _memread_dbg( _addr_abs() );
}
INLINE uint8_t _src_abs_dis() {
return _memread_dis( _addr_abs_dis() );
}
@ -1215,6 +1219,9 @@ INLINE uint16_t _addr_abs_X_dis() {
INLINE uint8_t _src_abs_X() {
return _memread( _addr_abs_X() );
}
INLINE uint8_t _src_abs_X_dbg() {
return _memread_dbg( _addr_abs_X() );
}
INLINE uint8_t _src_abs_X_dis() {
return _memread_dis( _addr_abs_X_dis() );
}
@ -1237,6 +1244,9 @@ INLINE uint16_t _addr_abs_Y_dis() {
INLINE uint8_t _src_abs_Y() {
return _memread(_addr_abs_Y());
}
INLINE uint8_t _src_abs_Y_dbg() {
return _memread_dbg(_addr_abs_Y());
}
INLINE uint8_t _src_abs_Y_dis() {
return _memread_dis(_addr_abs_Y_dis());
}
@ -1301,6 +1311,9 @@ INLINE uint16_t _addr_ind_dis() {
INLINE uint8_t _src_ind() {
return _memread( _addr_ind() );
}
INLINE uint8_t _src_ind_dbg() {
return _memread_dbg( _addr_ind() );
}
INLINE uint8_t _src_ind_dis() {
return _memread_dis( _addr_ind_dis() );
}
@ -1322,6 +1335,9 @@ INLINE uint16_t _addr_ind_X_dis() {
INLINE uint8_t _src_X_ind() {
return _memread( _addr_ind_X() );
}
INLINE uint8_t _src_X_ind_dbg() {
return _memread_dbg( _addr_ind_X() );
}
INLINE uint8_t _src_X_ind_dis() {
return _memread_dis( _addr_ind_X_dis() );
}
@ -1346,6 +1362,9 @@ INLINE uint16_t _addr_ind_Y_dis() {
INLINE uint8_t _src_ind_Y() {
return _memread( _addr_ind_Y() );
}
INLINE uint8_t _src_ind_Y_dbg() {
return _memread_dbg( _addr_ind_Y() );
}
INLINE uint8_t _src_ind_Y_dis() {
return _memread_dis( _addr_ind_Y_dis() );
}

109
src/dev/mem/mmio.h
View File

@ -411,6 +411,7 @@ INLINE uint8_t memread8( uint16_t addr );
INLINE uint16_t memread16_low( uint16_t addr );
INLINE uint16_t memread16( uint16_t addr );
INLINE uint8_t _memread( uint16_t addr );
INLINE uint8_t _memread_dbg( uint16_t addr );
INLINE uint8_t _memread_dis( uint16_t addr );
INLINE void _memwrite8_low( uint16_t addr, uint8_t data );
INLINE void _memwrite8_bank( uint16_t addr, uint8_t data );
@ -423,6 +424,7 @@ INLINE uint16_t _fetch16_dis(void);
INLINE uint16_t _addr_abs(void);
INLINE uint16_t _addr_abs_dis(void);
INLINE uint8_t _src_abs(void);
INLINE uint8_t _src_abs_dbg(void);
INLINE uint8_t _src_abs_dis(void);
INLINE int8_t _rel_addr(void);
INLINE int8_t _rel_addr_dis(void);
@ -433,10 +435,12 @@ INLINE uint16_t _ind_addr_dis(void);
INLINE uint16_t _addr_abs_X(void);
INLINE uint16_t _addr_abs_X_dis(void);
INLINE uint8_t _src_abs_X(void);
INLINE uint8_t _src_abs_X_dbg(void);
INLINE uint8_t _src_abs_X_dis(void);
INLINE uint16_t _addr_abs_Y(void);
INLINE uint16_t _addr_abs_Y_dis(void);
INLINE uint8_t _src_abs_Y(void);
INLINE uint8_t _src_abs_Y_dbg(void);
INLINE uint8_t _src_abs_Y_dis(void);
INLINE uint8_t _imm(void);
INLINE uint8_t _imm_dis(void);
@ -447,14 +451,17 @@ INLINE uint8_t _src_zp_dis(void);
INLINE uint16_t _addr_ind(void);
INLINE uint16_t _addr_ind_dis(void);
INLINE uint8_t _src_ind(void);
INLINE uint8_t _src_ind_dbg(void);
INLINE uint8_t _src_ind_dis(void);
INLINE uint16_t _addr_ind_X(void);
INLINE uint16_t _addr_ind_X_dis(void);
INLINE uint8_t _src_X_ind(void);
INLINE uint8_t _src_X_ind_dbg(void);
INLINE uint8_t _src_X_ind_dis(void);
INLINE uint16_t _addr_ind_Y(void);
INLINE uint16_t _addr_ind_Y_dis(void);
INLINE uint8_t _src_ind_Y(void);
INLINE uint8_t _src_ind_Y_dbg(void);
INLINE uint8_t _src_ind_Y_dis(void);
INLINE uint8_t _addr_zp_X(void);
INLINE uint8_t _addr_zp_X_dis(void);
@ -466,43 +473,11 @@ INLINE uint8_t _src_zp_Y(void);
INLINE uint8_t _src_zp_Y_dis(void);
#ifndef DISASSEMBLER
#define fetch() _fetch()
#define fetch16() _fetch16()
#define memread(addr) _memread(addr);
#define memwrite8_low(addr,data) _memwrite8_low(addr,data);
#define memwrite8_bank(addr,data) _memwrite8_bank(addr,data);
#define memwrite8_high(addr,data) _memwrite8_high(addr,data);
#define memwrite(addr,data) _memwrite(addr,data);
#define addr_abs() _addr_abs()
#define src_abs() _src_abs()
#define rel_addr() _rel_addr()
#define abs_addr() _abs_addr()
#define ind_addr() _ind_addr()
#define addr_abs_X() _addr_abs_X()
#define src_abs_X() _src_abs_X()
#define addr_abs_Y() _addr_abs_Y()
#define src_abs_Y() _src_abs_Y()
#define imm() _imm()
#define addr_zp() _addr_zp()
#define src_zp() _src_zp()
#define addr_ind() _addr_ind()
#define src_ind() _src_ind()
#define addr_ind_X() _addr_ind_X()
#define src_X_ind() _src_X_ind()
#define addr_ind_Y() _addr_ind_Y()
#define src_ind_Y() _src_ind_Y()
#define addr_zp_X() _addr_zp_X()
#define src_zp_X() _src_zp_X()
#define addr_zp_Y() _addr_zp_Y()
#define src_zp_Y() _src_zp_Y()
#else // DISASSEMBLER
#ifdef DISASSEMBLER
#define fetch() _fetch_dis()
#define fetch16() _fetch16_dis()
#define memread(addr) _memread_dis(addr);
#define memread(addr) _memread_dis(addr)
#define memwrite8_low(addr,data) // do not write anything into the memory while disassembling
#define memwrite8_bank(addr,data) // do not write anything into the memory while disassembling
#define memwrite8_high(addr,data) // do not write anything into the memory while disassembling
@ -530,7 +505,71 @@ INLINE uint8_t _src_zp_Y_dis(void);
#define addr_zp_Y() _addr_zp_Y_dis()
#define src_zp_Y() _src_zp_Y_dis()
#endif // DISASSEMBLER
#elif defined(DEBUGGER) // DISASSEMBLER
#define fetch() _fetch()
#define fetch16() _fetch16()
#define memread(addr) _memread_dbg(addr)
#define memwrite8_low(addr,data) _memwrite8_low(addr,data)
#define memwrite8_bank(addr,data) _memwrite8_bank(addr,data)
#define memwrite8_high(addr,data) _memwrite8_high(addr,data)
#define memwrite(addr,data) _memwrite(addr,data);
#define addr_abs() _addr_abs()
#define src_abs() _src_abs_dbg()
#define rel_addr() _rel_addr()
#define abs_addr() _abs_addr()
#define ind_addr() _ind_addr()
#define addr_abs_X() _addr_abs_X()
#define src_abs_X() _src_abs_X_dbg()
#define addr_abs_Y() _addr_abs_Y()
#define src_abs_Y() _src_abs_Y_dbg()
#define imm() _imm()
#define addr_zp() _addr_zp()
#define src_zp() _src_zp()
#define addr_ind() _addr_ind()
#define src_ind() _src_ind_dbg()
#define addr_ind_X() _addr_ind_X()
#define src_X_ind() _src_X_ind_dbg()
#define addr_ind_Y() _addr_ind_Y()
#define src_ind_Y() _src_ind_Y()
#define addr_zp_X() _addr_zp_X()
#define src_zp_X() _src_zp_X()
#define addr_zp_Y() _addr_zp_Y()
#define src_zp_Y() _src_zp_Y()
#else // DEBUGGER
#define fetch() _fetch()
#define fetch16() _fetch16()
#define memread(addr) _memread(addr)
#define memwrite8_low(addr,data) _memwrite8_low(addr,data)
#define memwrite8_bank(addr,data) _memwrite8_bank(addr,data)
#define memwrite8_high(addr,data) _memwrite8_high(addr,data)
#define memwrite(addr,data) _memwrite(addr,data)
#define addr_abs() _addr_abs()
#define src_abs() _src_abs()
#define rel_addr() _rel_addr()
#define abs_addr() _abs_addr()
#define ind_addr() _ind_addr()
#define addr_abs_X() _addr_abs_X()
#define src_abs_X() _src_abs_X()
#define addr_abs_Y() _addr_abs_Y()
#define src_abs_Y() _src_abs_Y()
#define imm() _imm()
#define addr_zp() _addr_zp()
#define src_zp() _src_zp()
#define addr_ind() _addr_ind()
#define src_ind() _src_ind()
#define addr_ind_X() _addr_ind_X()
#define src_X_ind() _src_X_ind()
#define addr_ind_Y() _addr_ind_Y()
#define src_ind_Y() _src_ind_Y()
#define addr_zp_X() _addr_zp_X()
#define src_zp_X() _src_zp_X()
#define addr_zp_Y() _addr_zp_Y()
#define src_zp_Y() _src_zp_Y()
#endif // DISASSEMBLER & DEBUGGER
#endif // __APPLE2_MMIO_H__