mirror of https://github.com/trudnai/Steve2.git
252 lines
6.6 KiB
C
252 lines
6.6 KiB
C
//
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// main.c
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// 6502
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//
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// Created by Tamas Rudnai on 7/14/19.
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// Copyright © 2019 Tamas Rudnai. All rights reserved.
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//
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// This file is part of Steve ][ -- The Apple ][ Emulator.
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//
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// Steve ][ is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// Steve ][ is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with Steve ][. If not, see <https://www.gnu.org/licenses/>.
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//
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#ifndef __6502_INSTR_LOAD_STORE_H__
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#define __6502_INSTR_LOAD_STORE_H__
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#include <ctype.h>
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#include "mmio.h"
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/**
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LDA Load Accumulator with Memory
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M -> A N Z C I D V
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+ + - - - -
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addressing assembler opc bytes cyles
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--------------------------------------------
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immidiate LDA #oper A9 2 2
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zeropage LDA oper A5 2 3
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zeropage,X LDA oper,X B5 2 4
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absolute LDA oper AD 3 4
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absolute,X LDA oper,X BD 3 4*
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absolute,Y LDA oper,Y B9 3 4*
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(indirect,X) LDA (oper,X) A1 2 6
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(indirect),Y LDA (oper),Y B1 2 5*
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**/
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INSTR void LDA( uint8_t src ) {
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dbgPrintf("LDA(%02X) ", src);
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disPrintf(disassembly.inst, "LDA");
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#ifndef DISASSEMBLER
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set_flags_NZ(m6502.A = src);
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#endif
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}
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//INSTR void LDA_imm( uint8_t src ) {
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// dbgPrintf("LDA(%02X) ", src);
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// disPrintf(disassembly.inst, "LDA");
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//#ifndef DISASSEMBLER
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// if (src == 0x4C) {
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// m6502.interrupt = BREAK;
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// }
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// set_flags_NZ(m6502.A = src);
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//#endif
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//}
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/**
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LDX Load Index X with Memory
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M -> X N Z C I D V
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+ + - - - -
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addressing assembler opc bytes cyles
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--------------------------------------------
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immidiate LDX #oper A2 2 2
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zeropage LDX oper A6 2 3
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zeropage,Y LDX oper,Y B6 2 4
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absolute LDX oper AE 3 4
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absolute,Y LDX oper,Y BE 3 4*
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**/
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INSTR void LDX( uint8_t src ) {
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dbgPrintf("LDX(%02X) ", src);
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disPrintf(disassembly.inst, "LDX");
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#ifndef DISASSEMBLER
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set_flags_NZ(m6502.X = src);
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#endif
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}
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/**
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LDY Load Index Y with Memory
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M -> Y N Z C I D V
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+ + - - - -
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addressing assembler opc bytes cyles
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--------------------------------------------
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immidiate LDY #oper A0 2 2
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zeropage LDY oper A4 2 3
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zeropage,X LDY oper,X B4 2 4
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absolute LDY oper AC 3 4
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absolute,X LDY oper,X BC 3 4*
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**/
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INSTR void LDY( uint8_t src ) {
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dbgPrintf("LDY(%02X) ", src);
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disPrintf(disassembly.inst, "LDY");
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#ifndef DISASSEMBLER
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set_flags_NZ(m6502.Y = src);
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#endif
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}
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static char * charConv =
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"@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\\]^_ !\"#$%&'()*+,-./0123456789:;<=>?"
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"@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\\]^_ !\"#$%&'()*+,-./0123456789:;<=>?"
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"@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\\]^_ !\"#$%&'()*+,-./0123456789:;<=>?"
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"@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\\]^_`abcdefghijklmnopqrstuvwxyz{|}~?"
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;
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/**
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STR Store Data in Destination
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(not a real instruction, only a helper function)
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**/
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INSTR void STR( uint16_t addr, uint8_t src ) {
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dbgPrintf("STR [%04X], %02X ", addr, src );
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#ifndef DISASSEMBLER
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_memwrite(addr, src);
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#endif
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}
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INSTR void STR_zp( uint8_t addr, uint8_t src ) {
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dbgPrintf("STR [%04X], %02X ", addr, src );
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#ifndef DISASSEMBLER
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_memwrite8_zp(addr, src);
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#endif
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}
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/**
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STA Store Accumulator in Memory
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A -> M N Z C I D V
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- - - - - -
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addressing assembler opc bytes cyles
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--------------------------------------------
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zeropage STA oper 85 2 3
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zeropage,X STA oper,X 95 2 4
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absolute STA oper 8D 3 4
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absolute,X STA oper,X 9D 3 5
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absolute,Y STA oper,Y 99 3 5
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(indirect,X) STA (oper,X) 81 2 6
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(indirect),Y STA (oper),Y 91 2 6
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**/
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INSTR void STA( uint16_t addr ) {
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dbgPrintf("STA ");
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disPrintf(disassembly.inst, "STA");
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#ifndef DISASSEMBLER
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STR(addr, m6502.A);
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#endif
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}
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INSTR void STA_zp( uint8_t addr ) {
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dbgPrintf("STA ");
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disPrintf(disassembly.inst, "STA");
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#ifndef DISASSEMBLER
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STR_zp(addr, m6502.A);
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#endif
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}
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/**
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STX Store Index X in Memory
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X -> M N Z C I D V
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- - - - - -
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addressing assembler opc bytes cyles
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--------------------------------------------
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zeropage STX oper 86 2 3
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zeropage,Y STX oper,Y 96 2 4
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absolute STX oper 8E 3 4
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**/
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INSTR void STX( uint16_t addr ) {
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dbgPrintf("STX ");
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disPrintf(disassembly.inst, "STX");
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#ifndef DISASSEMBLER
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STR(addr, m6502.X);
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#endif
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}
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INSTR void STX_zp( uint8_t addr ) {
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dbgPrintf("STX ");
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disPrintf(disassembly.inst, "STX");
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#ifndef DISASSEMBLER
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STR_zp(addr, m6502.X);
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#endif
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}
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/**
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STY Sore Index Y in Memory
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Y -> M N Z C I D V
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- - - - - -
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addressing assembler opc bytes cyles
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--------------------------------------------
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zeropage STY oper 84 2 3
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zeropage,X STY oper,X 94 2 4
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absolute STY oper 8C 3 4
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**/
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INSTR void STY( uint16_t addr ) {
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dbgPrintf("STY ");
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disPrintf(disassembly.inst, "STY");
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#ifndef DISASSEMBLER
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STR(addr, m6502.Y);
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#endif
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}
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INSTR void STY_zp( uint8_t addr ) {
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dbgPrintf("STY ");
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disPrintf(disassembly.inst, "STY");
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#ifndef DISASSEMBLER
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STR_zp(addr, m6502.Y);
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#endif
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}
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/**
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STZ Store Zero (0) in Memory
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0 -> M N Z C I D V
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- - - - - -
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OP LEN CYC MODE FLAGS SYNTAX
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-- --- --- ---- ----- ------
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64 2 3 zp ........ STZ $12
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74 2 4 zp,X ........ STZ $12,X
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9C 3 4 abs ........ STZ $3456
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9E 3 5 abs,X ........ STZ $3456,X
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**/
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INSTR void STZ( uint16_t addr ) {
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dbgPrintf("STZ ");
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disPrintf(disassembly.inst, "STZ");
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#ifndef DISASSEMBLER
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STR(addr, 0);
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#endif
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}
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INSTR void STZ_zp( uint8_t addr ) {
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dbgPrintf("STZ ");
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disPrintf(disassembly.inst, "STZ");
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#ifndef DISASSEMBLER
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STR_zp(addr, 0);
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#endif
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}
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#endif // __6502_INSTR_LOAD_STORE_H__
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