mirror of https://github.com/trudnai/Steve2.git
84 lines
3.7 KiB
C
84 lines
3.7 KiB
C
//
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// 6502_und.h
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// A2Mac
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//
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// Created by Tamas Rudnai on 7/27/20.
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// Copyright © 2019, 2020 Tamas Rudnai. All rights reserved.
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//
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// This file is part of Steve ][ -- The Apple ][ Emulator.
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//
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// Steve ][ is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// Steve ][ is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with Steve ][. If not, see <https://www.gnu.org/licenses/>.
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//
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// Documentations:
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//
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// http://nesdev.com/6502_cpu.txt
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// http://www.oxyron.de/html/opcodes02.html
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// https://macgui.com/kb/article/46
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// https://www.masswerk.at/6502/6502_instruction_set.html
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//
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#ifndef _6502_C_h
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#define _6502_C_h
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// 6502 instructions with additional addressing modes
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// ADC AND CMP EOR LDA ORA SBC STA - (zp) addressing mode
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case 0x12: ORA( src_zp_0() ); return 5; // ORA (zpg)
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case 0x32: AND( src_zp_0() ); return 5; // AND (zpg)
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case 0x52: EOR( src_zp_0() ); return 5; // EOR (zpg)
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case 0x72: ADC( src_zp_0() ); return 5; // ADC (zpg)
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case 0x92: STA( src_zp_0() ); return 5; // STA (zpg)
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case 0xB2: LDA( src_zp_0() ); return 5; // LDA (zpg)
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case 0xD2: CMP( src_zp_0() ); return 5; // CMP (zpg)
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case 0xF2: SBC( src_zp_0() ); return 5; // SBC (zpg)
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// BIT - imm abs,X zp,X addressing modes
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case 0x34: BIT( src_zp_X() ); return 4; // BIT zpg,X
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case 0x3C: BIT( src_abs_X() ); return 4; // BIT abs,X
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case 0x89: BIT( imm() ); return 2; // BIT imm
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// DEC INC - acc addressing mode
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case 0x1A: INA(); return 2; // INA imm (INC A)
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case 0x3A: DEA(); return 2; // DEA imm (DEC A)
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// JMP - (abs,X) addressing mode
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case 0x7C: JMP( addr_abs_X() ); return 6; // JMP abs,X
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// Additional instructions
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// BRA - BRanch Always
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case 0x80: BRA( rel_addr() ); return 3; // BRA reladdr
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// PHX PHY PLX PLY - PusH or PulL X or Y register
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case 0x5A: PHY(); return 3; // PHY
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case 0x7A: PLY(); return 4; // PLY
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case 0xDA: PHX(); return 3; // PHX
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case 0xFA: PLX(); return 4; // PLX
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// STZ - STore Zero
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case 0x64: STZ( addr_zp() ); return 3; // STZ zpg
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case 0x74: STZ( addr_zp_X() ); return 4; // STZ zpg,X
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case 0x9C: STZ( addr_abs() ); return 4; // STZ abs
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case 0x9E: STZ( addr_abs_X() ); return 5; // STZ abs,X
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// TRB - Test and Reset Bits
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case 0x04: TSB( addr_zp() ); return 5; // TSB zpg
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case 0x0C: TSB( addr_abs() ); return 6; // TSB abs
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case 0x14: TRB( addr_zp() ); return 5; // TRB zpg
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case 0x1C: TRB( addr_abs() ); return 6; // TRB abs
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#endif /* _6502_C_h */
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