2018-05-14 22:39:55 +00:00
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package cpu_test
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2018-04-29 19:41:11 +00:00
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import (
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"flag"
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2018-05-04 14:47:22 +00:00
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"fmt"
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2018-05-14 22:39:55 +00:00
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"testing"
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2018-05-27 10:05:00 +00:00
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2018-05-27 10:48:03 +00:00
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"github.com/freewilll/apple2/cpu"
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"github.com/freewilll/apple2/keyboard"
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"github.com/freewilll/apple2/mmu"
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"github.com/freewilll/apple2/system"
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"github.com/freewilll/apple2/utils"
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2018-04-29 19:41:11 +00:00
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)
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2018-05-14 22:39:55 +00:00
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func TestCPU(t *testing.T) {
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2018-04-29 19:41:11 +00:00
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showInstructions := flag.Bool("show-instructions", false, "Show instructions code while running")
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2018-05-04 14:47:22 +00:00
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skipTest0 := flag.Bool("skip-functional-test", false, "Skip functional test")
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skipTest1 := flag.Bool("skip-interrupt-test", false, "Skip interrupt test")
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2018-04-29 19:41:11 +00:00
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breakAddressString := flag.String("break", "", "Break on address")
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flag.Parse()
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2018-05-10 12:32:42 +00:00
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breakAddress := utils.DecodeCmdLineAddress(breakAddressString)
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2018-05-09 18:32:38 +00:00
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cpu.InitInstructionDecoder()
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2018-05-09 16:43:39 +00:00
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mmu.InitRAM()
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2018-05-08 18:32:55 +00:00
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2018-05-04 14:47:22 +00:00
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var Roms = []string{
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"6502_functional_test.bin.gz",
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"6502_interrupt_test.bin.gz",
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}
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for i, rom := range Roms {
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if (i == 0) && *skipTest0 {
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continue
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}
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if (i == 1) && *skipTest1 {
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continue
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}
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fmt.Printf("Running %s\n", rom)
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2018-05-08 18:32:55 +00:00
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2018-05-09 16:43:39 +00:00
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cpu.Init()
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cpu.State.PC = 0x800
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2018-05-09 18:31:15 +00:00
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system.RunningTests = true
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2018-05-04 14:47:22 +00:00
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if i == 0 {
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2018-05-09 18:31:15 +00:00
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system.RunningFunctionalTests = true
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2018-05-04 14:47:22 +00:00
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}
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if i == 1 {
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2018-05-09 18:31:15 +00:00
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system.RunningInterruptTests = true
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2018-05-04 14:47:22 +00:00
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}
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2018-05-08 18:32:55 +00:00
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bytes, err := utils.ReadMemoryFromGzipFile(rom)
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2018-04-29 19:41:11 +00:00
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if err != nil {
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panic(err)
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}
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2018-05-08 18:32:55 +00:00
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// Copy main RAM area 0x0000-0xbfff
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for i := 0; i < 0xc000; i++ {
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2018-05-09 16:43:39 +00:00
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mmu.PhysicalMemory.MainMemory[i] = bytes[i]
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2018-04-29 19:41:11 +00:00
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}
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2018-05-08 18:32:55 +00:00
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// Map writable RAM area in 0xc000-0xffff
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var RomPretendingToBeRAM [0x4000]uint8
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for i := 0x0; i < 0x4000; i++ {
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RomPretendingToBeRAM[i] = bytes[0xc000+i]
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}
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for i := 0x0; i < 0x40; i++ {
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2018-05-20 10:02:08 +00:00
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mmu.ReadPageTable[0xc0+i] = RomPretendingToBeRAM[i*0x100 : i*0x100+0x100]
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mmu.WritePageTable[0xc0+i] = RomPretendingToBeRAM[i*0x100 : i*0x100+0x100]
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2018-05-08 18:32:55 +00:00
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}
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2018-05-09 14:41:20 +00:00
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keyboard.Init()
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2018-05-15 10:12:38 +00:00
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cpu.Run(*showInstructions, breakAddress, true, false, 0)
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2018-05-04 14:47:22 +00:00
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fmt.Printf("Finished running %s\n\n", rom)
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}
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2018-04-29 19:41:11 +00:00
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}
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