mirror of
https://github.com/freewilll/apple2-go.git
synced 2024-06-25 16:29:51 +00:00
8284073beb
Every frame sends a bunch of audio samples in a channel. This channel is consumed by the audio Read() function which is called asynchronously. There's all kinds of timing issues where the audio/video are not aligned. Issues: - There's a large delay between the audio being produced and it being played - Something with the timing is wrong. The first not of lemonade stand and the system beep are both incorrect. Changing the CPU frequency fixes it for one but not for the other. This means something must be wrong in the cycle counting. Also added FPS display that can be toggled with ctrl-alt-F.
855 lines
20 KiB
Go
855 lines
20 KiB
Go
package cpu
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import (
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"fmt"
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"mos6502go/mmu"
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"mos6502go/system"
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"os"
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)
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const (
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CpuFlagC byte = 1 << iota // 0x01
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CpuFlagZ // 0x02
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CpuFlagI // 0x04
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CpuFlagD // 0x08
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CpuFlagB // 0x10
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CpuFlagR // 0x20
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CpuFlagV // 0x40
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CpuFlagN // 0x80
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)
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var State struct {
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A uint8
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X uint8
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Y uint8
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PC uint16
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SP uint8
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P uint8
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}
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func Init() {
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system.RunningTests = false
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system.RunningFunctionalTests = false
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system.RunningInterruptTests = false
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State.A = 0
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State.X = 0
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State.Y = 0
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State.P = CpuFlagR | CpuFlagB | CpuFlagZ
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State.SP = 0xff
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system.PendingInterrupt = false
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system.PendingNMI = false
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}
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func setC(value bool) {
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if value {
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State.P |= CpuFlagC
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} else {
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State.P &= ^CpuFlagC
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}
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}
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func setV(value bool) {
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if value {
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State.P |= CpuFlagV
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} else {
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State.P &= ^CpuFlagV
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}
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}
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func setN(value uint8) {
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if (value & 0x80) != 0 {
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State.P |= CpuFlagN
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} else {
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State.P &= ^CpuFlagN
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}
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}
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func setZ(value uint8) {
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if value == 0 {
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State.P |= CpuFlagZ
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} else {
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State.P &= ^CpuFlagZ
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}
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}
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func isC() bool {
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return (State.P & CpuFlagC) != 0
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}
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func isZ() bool {
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return (State.P & CpuFlagZ) != 0
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}
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func isD() bool {
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return (State.P & CpuFlagD) != 0
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}
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func isV() bool {
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return (State.P & CpuFlagV) != 0
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}
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func isN() bool {
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return (State.P & CpuFlagN) != 0
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}
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func push8(value uint8) {
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mmu.PageTable[mmu.StackPage][State.SP] = value
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State.SP -= 1
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State.SP &= 0xff
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}
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func push16(value uint16) {
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mmu.PageTable[mmu.StackPage][State.SP] = uint8(value >> 8)
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mmu.PageTable[mmu.StackPage][State.SP-1] = uint8(value & 0xff)
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State.SP -= 2
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State.SP &= 0xff
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}
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func pop8() uint8 {
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State.SP += 1
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State.SP &= 0xff
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return mmu.PageTable[mmu.StackPage][State.SP]
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}
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func pop16() uint16 {
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State.SP += 2
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State.SP &= 0xff
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msb := uint16(mmu.PageTable[mmu.StackPage][State.SP])
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lsb := uint16(mmu.PageTable[mmu.StackPage][State.SP-1])
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return lsb + msb<<8
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}
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func branch(instructionName string, doBranch bool) {
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value := mmu.ReadMemory(State.PC + 1)
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var relativeAddress uint16
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if (value & 0x80) == 0 {
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relativeAddress = State.PC + uint16(value) + 2
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} else {
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relativeAddress = State.PC + uint16(value) + 2 - 0x100
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}
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system.FrameCycles += 2
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if doBranch {
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if system.RunningTests && State.PC == relativeAddress {
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fmt.Printf("Trap at $%04x\n", relativeAddress)
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os.Exit(0)
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}
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samePage := (State.PC & 0xff00) != (relativeAddress & 0xff00)
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if samePage {
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system.FrameCycles += 1
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} else {
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system.FrameCycles += 2
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}
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State.PC = relativeAddress
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} else {
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State.PC += 2
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}
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}
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func getAddressFromAddressMode(addressMode byte) (result uint16, pageBoundaryCrossed bool) {
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switch addressMode {
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case AmZeroPage:
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result = uint16(mmu.ReadMemory(State.PC + 1))
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case AmZeroPageX:
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result = (uint16(mmu.ReadMemory(State.PC+1)) + uint16(State.X)) & 0xff
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case AmZeroPageY:
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result = (uint16(mmu.ReadMemory(State.PC+1)) + uint16(State.Y)) & 0xff
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case AmAbsolute:
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result = uint16(mmu.ReadMemory(State.PC+1)) + uint16(mmu.ReadMemory(State.PC+2))<<8
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case AmAbsoluteX:
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value := uint16(mmu.ReadMemory(State.PC+1)) + uint16(mmu.ReadMemory(State.PC+2))<<8
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pageBoundaryCrossed = (value & 0xff00) != ((value + uint16(State.X)) & 0xff00)
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result = value + uint16(State.X)
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case AmAbsoluteY:
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value := uint16(mmu.ReadMemory(State.PC+1)) + uint16(mmu.ReadMemory(State.PC+2))<<8
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pageBoundaryCrossed = (value & 0xff00) != ((value + uint16(State.Y)) & 0xff00)
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result = value + uint16(State.Y)
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case AmIndirectX:
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zeroPageAddress := (mmu.ReadMemory(State.PC+1) + State.X) & 0xff
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result = uint16(mmu.ReadMemory(uint16(zeroPageAddress))) + uint16(mmu.ReadMemory(uint16(zeroPageAddress)+1))<<8
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case AmIndirectY:
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address := uint16(mmu.ReadMemory(State.PC + 1))
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lsb := uint16(mmu.ReadMemory(address))
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msb := uint16(mmu.ReadMemory(address + 1))
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value := lsb + msb<<8
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pageBoundaryCrossed = (value & 0xff00) != ((value + uint16(State.Y)) & 0xff00)
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result = value + uint16(State.Y)
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default:
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panic(fmt.Sprintf("Unknown address mode %d in getAddressFromAddressMode()", addressMode))
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}
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return result, pageBoundaryCrossed
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}
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func readMemoryWithAddressMode(addressMode byte) (result uint8, pageBoundaryCrossed bool) {
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switch addressMode {
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case AmImmediate:
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result = mmu.ReadMemory(State.PC + 1)
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State.PC += 2
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case AmZeroPage:
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var address uint16
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address, pageBoundaryCrossed = getAddressFromAddressMode(addressMode)
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result = mmu.ReadMemory(address)
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State.PC += 2
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case AmZeroPageX:
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var address uint16
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address, pageBoundaryCrossed = getAddressFromAddressMode(addressMode)
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result = mmu.ReadMemory(address)
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State.PC += 2
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case AmZeroPageY:
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var address uint16
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address, pageBoundaryCrossed = getAddressFromAddressMode(addressMode)
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result = mmu.ReadMemory(address)
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State.PC += 2
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case AmAbsolute:
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var address uint16
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address, pageBoundaryCrossed = getAddressFromAddressMode(addressMode)
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result = mmu.ReadMemory(address)
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State.PC += 3
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case AmAbsoluteX:
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var address uint16
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address, pageBoundaryCrossed = getAddressFromAddressMode(addressMode)
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result = mmu.ReadMemory(address)
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State.PC += 3
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case AmAbsoluteY:
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var address uint16
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address, pageBoundaryCrossed = getAddressFromAddressMode(addressMode)
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result = mmu.ReadMemory(address)
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State.PC += 3
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case AmIndirectX:
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var address uint16
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address, pageBoundaryCrossed = getAddressFromAddressMode(addressMode)
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result = mmu.ReadMemory(address)
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State.PC += 2
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case AmIndirectY:
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var address uint16
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address, pageBoundaryCrossed = getAddressFromAddressMode(addressMode)
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result = mmu.ReadMemory(address)
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State.PC += 2
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default:
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result = 0
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State.PC++
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}
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return result, pageBoundaryCrossed
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}
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// STA, STX and STY
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func store(regValue uint8, addressMode byte) {
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address, _ := getAddressFromAddressMode(addressMode)
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mmu.WriteMemory(address, regValue)
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switch addressMode {
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case AmZeroPage:
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State.PC += 2
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system.FrameCycles += 3
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case AmZeroPageX:
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State.PC += 2
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system.FrameCycles += 4
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case AmZeroPageY:
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State.PC += 2
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system.FrameCycles += 4
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case AmAbsolute:
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State.PC += 3
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system.FrameCycles += 4
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case AmAbsoluteX:
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State.PC += 3
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system.FrameCycles += 5
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case AmAbsoluteY:
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State.PC += 3
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system.FrameCycles += 5
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case AmIndirect:
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State.PC += 2
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system.FrameCycles += 6
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case AmIndirectX:
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State.PC += 2
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system.FrameCycles += 6
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case AmIndirectY:
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State.PC += 2
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system.FrameCycles += 6
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default:
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panic(fmt.Sprintf("Unknown address mode %d in store()", addressMode))
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}
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}
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// These instructions take the same amount of system.FrameCycles
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func advanceCyclesForAcculumatorOperation(addressMode byte, pageBoundaryCrossed bool) {
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extraCycle := uint64(0)
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if pageBoundaryCrossed {
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extraCycle = 1
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}
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switch addressMode {
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case AmImmediate:
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system.FrameCycles += 2
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case AmZeroPage:
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system.FrameCycles += 3
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case AmZeroPageX:
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system.FrameCycles += 4
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case AmZeroPageY:
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system.FrameCycles += 4
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case AmAbsolute:
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system.FrameCycles += 4
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case AmAbsoluteX:
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system.FrameCycles += 4 + extraCycle
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case AmAbsoluteY:
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system.FrameCycles += 4 + extraCycle
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case AmIndirectX:
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system.FrameCycles += 6
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case AmIndirectY:
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system.FrameCycles += 5 + extraCycle
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default:
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panic(fmt.Sprintf("Unknown address mode %d in advanceCyclesForAcculumatorOperation()", addressMode))
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}
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}
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func load(addressMode byte) uint8 {
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value, pageBoundaryCrossed := readMemoryWithAddressMode(addressMode)
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setN(value)
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setZ(value)
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advanceCyclesForAcculumatorOperation(addressMode, pageBoundaryCrossed)
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return value
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}
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func cmp(regValue uint8, addressMode byte) {
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value, pageBoundaryCrossed := readMemoryWithAddressMode(addressMode)
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var result uint16
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result = uint16(regValue) - uint16(value)
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setC(result < 0x100)
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setN(uint8(result))
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setZ(uint8(result & 0xff))
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advanceCyclesForAcculumatorOperation(addressMode, pageBoundaryCrossed)
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}
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func ora(addressMode byte) {
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value, pageBoundaryCrossed := readMemoryWithAddressMode(addressMode)
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State.A |= value
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setN(State.A)
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setZ(State.A)
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advanceCyclesForAcculumatorOperation(addressMode, pageBoundaryCrossed)
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}
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func and(addressMode byte) {
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value, pageBoundaryCrossed := readMemoryWithAddressMode(addressMode)
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State.A &= value
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setN(State.A)
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setZ(State.A)
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advanceCyclesForAcculumatorOperation(addressMode, pageBoundaryCrossed)
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}
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func eor(addressMode byte) {
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value, pageBoundaryCrossed := readMemoryWithAddressMode(addressMode)
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State.A ^= value
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setN(State.A)
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setZ(State.A)
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advanceCyclesForAcculumatorOperation(addressMode, pageBoundaryCrossed)
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}
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func adc(addressMode byte) {
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value, pageBoundaryCrossed := readMemoryWithAddressMode(addressMode)
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var temp uint16
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temp = uint16(State.A) + uint16(value)
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var carry uint8
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if isC() {
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carry = 1
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}
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if carry > 0 {
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temp++
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}
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// This is not valid in decimal mode
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setZ(uint8(temp & 0xff))
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if isD() {
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if ((State.A & 0xf) + (value & 0xf) + carry) > 9 {
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temp += 6
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}
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setN(uint8(temp))
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setV((((State.A ^ value) & 0x80) == 0) && (((State.A ^ uint8(temp)) & 0x80) != 0))
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if temp > 0x99 {
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temp += 96
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}
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setC(temp > 0x99)
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} else {
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setN(uint8(temp))
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setV((((State.A ^ value) & 0x80) == 0) && (((State.A ^ uint8(temp)) & 0x80) != 0))
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setC(temp > 0xff)
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}
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State.A = uint8(temp & 0xff)
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setN(State.A)
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setZ(State.A)
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advanceCyclesForAcculumatorOperation(addressMode, pageBoundaryCrossed)
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}
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func sbc(addressMode byte) {
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value, pageBoundaryCrossed := readMemoryWithAddressMode(addressMode)
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var temp uint16
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temp = uint16(State.A) - uint16(value)
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var carry uint8
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if isC() {
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carry = 0
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} else {
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carry = 1
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}
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if carry > 0 {
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temp--
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}
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setN(uint8(temp))
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// This is not valid in decimal mode
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setZ(uint8(temp & 0xff))
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setV((((State.A ^ uint8(temp)) & 0x80) != 0) && (((State.A ^ value) & 0x80) != 0))
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if isD() {
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if ((int8(State.A) & 0xf) - int8(carry)) < (int8(value) & 0xf) {
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temp -= 6
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}
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if temp > 0x99 {
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temp -= 96
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}
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}
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setC(temp < 0x100)
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State.A = uint8(temp & 0xff)
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advanceCyclesForAcculumatorOperation(addressMode, pageBoundaryCrossed)
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}
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func bit(address uint16) {
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value := mmu.ReadMemory(address)
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setN(value)
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setV((value & 0x40) != 0)
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setZ(value & State.A)
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}
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// Read the address/value for an ASL, LSR, ROR, ROL
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func preProcessShift(addressMode byte) (address uint16, value uint8) {
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if addressMode == AmAccumulator {
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value = State.A
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} else {
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address, _ = getAddressFromAddressMode(addressMode)
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value = mmu.ReadMemory(address)
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}
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if addressMode == AmAccumulator {
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value = State.A
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} else {
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address, _ = getAddressFromAddressMode(addressMode)
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value = mmu.ReadMemory(address)
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}
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return
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}
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// Store the result of a ASL, LSR, ROR, ROL and advance PC and system.FrameCycles
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func postProcessShift(addressMode byte, address uint16, value uint8) {
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switch addressMode {
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case AmAccumulator:
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State.A = value
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State.PC += 1
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system.FrameCycles += 2
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case AmZeroPage:
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mmu.WriteMemory(address, value)
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State.PC += 2
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system.FrameCycles += 5
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case AmZeroPageX:
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mmu.WriteMemory(address, value)
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State.PC += 2
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system.FrameCycles += 6
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case AmAbsolute:
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mmu.WriteMemory(address, value)
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State.PC += 3
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system.FrameCycles += 6
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case AmAbsoluteX:
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mmu.WriteMemory(address, value)
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State.PC += 3
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system.FrameCycles += 7
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default:
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panic(fmt.Sprintf("Unknown address mode %d in postProcessShift()", addressMode))
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}
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}
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func postProcessIncDec(addressMode byte) {
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switch addressMode {
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case AmZeroPage:
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State.PC += 2
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system.FrameCycles += 5
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case AmZeroPageX:
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State.PC += 2
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system.FrameCycles += 6
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case AmAbsolute:
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State.PC += 3
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system.FrameCycles += 6
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case AmAbsoluteX:
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State.PC += 3
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system.FrameCycles += 7
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default:
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panic(fmt.Sprintf("Unknown address mode %d in INC", addressMode))
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}
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}
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func brk() {
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push16(State.PC + 2)
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State.P |= CpuFlagB
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push8(State.P)
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State.P |= CpuFlagI
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State.PC = uint16(mmu.ReadMemory(0xffff))<<8 + uint16(mmu.ReadMemory(0xfffe))
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system.FrameCycles += 7
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}
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func irq() {
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push16(State.PC)
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State.P &= ^CpuFlagB
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push8(State.P)
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State.P |= CpuFlagI
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State.PC = uint16(mmu.ReadMemory(0xffff))<<8 + uint16(mmu.ReadMemory(0xfffe))
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system.FrameCycles += 7
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}
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func nmi() {
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push16(State.PC)
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State.P &= ^CpuFlagB
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push8(State.P)
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State.P |= CpuFlagI
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State.PC = uint16(mmu.ReadMemory(0xfffb))<<8 + uint16(mmu.ReadMemory(0xfffa))
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system.FrameCycles += 7
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}
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func Run(showInstructions bool, breakAddress *uint16, disableFirmwareWait bool, wantedCycles uint64) {
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system.FrameCycles = 0
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|
for {
|
|
if (wantedCycles != 0) && (system.FrameCycles >= wantedCycles) {
|
|
return
|
|
}
|
|
|
|
if system.RunningTests && (State.PC == 0x3869) {
|
|
fmt.Println("Functional tests passed")
|
|
return
|
|
}
|
|
|
|
if system.RunningTests && (State.PC == 0x0af5) {
|
|
fmt.Println("Interrupt tests passed")
|
|
return
|
|
}
|
|
|
|
if system.PendingInterrupt && ((State.P & CpuFlagI) == 0) {
|
|
irq()
|
|
system.PendingInterrupt = false
|
|
continue
|
|
}
|
|
|
|
if system.PendingNMI {
|
|
nmi()
|
|
system.PendingNMI = false
|
|
continue
|
|
}
|
|
|
|
if showInstructions {
|
|
PrintInstruction(true)
|
|
}
|
|
|
|
opcode := mmu.ReadMemory(State.PC)
|
|
addressMode := OpCodes[opcode].AddressingMode.Mode
|
|
|
|
if breakAddress != nil && State.PC == *breakAddress {
|
|
fmt.Printf("Break at $%04x\n", *breakAddress)
|
|
PrintInstruction(true)
|
|
os.Exit(0)
|
|
}
|
|
|
|
switch opcode {
|
|
|
|
case 0x4c: // JMP $0000
|
|
value := uint16(mmu.ReadMemory(State.PC+1)) + uint16(mmu.ReadMemory(State.PC+2))<<8
|
|
if system.RunningTests && State.PC == value {
|
|
fmt.Printf("Trap at $%04x\n", value)
|
|
os.Exit(0)
|
|
}
|
|
State.PC = value
|
|
system.FrameCycles += 3
|
|
case 0x6c: // JMP ($0000)
|
|
value := uint16(mmu.ReadMemory(State.PC+1)) + uint16(mmu.ReadMemory(State.PC+2))<<8
|
|
State.PC = uint16(mmu.ReadMemory(value)) + uint16(mmu.ReadMemory(value+1))<<8
|
|
system.FrameCycles += 5
|
|
|
|
case 0x20: // JSR $0000
|
|
value := uint16(mmu.ReadMemory(State.PC+1)) + uint16(mmu.ReadMemory(State.PC+2))<<8
|
|
system.FrameCycles += 6
|
|
|
|
if disableFirmwareWait && value == 0xfca8 {
|
|
State.PC += 3
|
|
State.A = 0
|
|
continue
|
|
}
|
|
|
|
push16(State.PC + 2)
|
|
State.PC = value
|
|
|
|
case 0x60: // RTS
|
|
value := pop16()
|
|
State.PC = value + 1
|
|
system.FrameCycles += 6
|
|
|
|
case 0xa9, 0xa5, 0xb5, 0xad, 0xbd, 0xb9, 0xa1, 0xb1: // LDA
|
|
State.A = load(addressMode)
|
|
case 0xa2, 0xa6, 0xb6, 0xae, 0xbe: // LDX
|
|
State.X = load(addressMode)
|
|
case 0xa0, 0xa4, 0xb4, 0xac, 0xbc: // LDY
|
|
State.Y = load(addressMode)
|
|
|
|
case 0x85, 0x95, 0x8d, 0x9d, 0x99, 0x81, 0x91: //STA
|
|
store(State.A, addressMode)
|
|
case 0x86, 0x96, 0x8e: // STX
|
|
store(State.X, addressMode)
|
|
case 0x84, 0x94, 0x8c: //STY
|
|
store(State.Y, addressMode)
|
|
|
|
case 0xc9, 0xc5, 0xd5, 0xcd, 0xdd, 0xd9, 0xc1, 0xd1: // CMP
|
|
cmp(State.A, addressMode)
|
|
case 0xe0, 0xe4, 0xeC: // CPX
|
|
cmp(State.X, addressMode)
|
|
case 0xc0, 0xc4, 0xcc: // CPY
|
|
cmp(State.Y, addressMode)
|
|
case 0x09, 0x05, 0x15, 0x0d, 0x1d, 0x19, 0x01, 0x11: // ORA
|
|
ora(addressMode)
|
|
case 0x29, 0x25, 0x35, 0x2d, 0x3d, 0x39, 0x21, 0x31: // AND
|
|
and(addressMode)
|
|
case 0x49, 0x45, 0x55, 0x4d, 0x5d, 0x59, 0x41, 0x51: // EOR
|
|
eor(addressMode)
|
|
case 0x69, 0x65, 0x75, 0x6d, 0x7d, 0x79, 0x61, 0x71: // ADC
|
|
adc(addressMode)
|
|
case 0xe9, 0xe5, 0xf5, 0xed, 0xfd, 0xf9, 0xe1, 0xf1: // SBC
|
|
sbc(addressMode)
|
|
|
|
// Register transfers
|
|
case 0xaa: // TAX
|
|
State.X = State.A
|
|
setN(State.X)
|
|
setZ(State.X)
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
case 0xa8: // TAY
|
|
State.Y = State.A
|
|
setN(State.Y)
|
|
setZ(State.Y)
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
case 0xba: // TSX
|
|
State.X = State.SP
|
|
setN(State.X)
|
|
setZ(State.X)
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
case 0x8a: // TXA
|
|
State.A = State.X
|
|
setN(State.A)
|
|
setZ(State.A)
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
case 0x9a: // TXS
|
|
State.SP = State.X
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
case 0x98: // TYA
|
|
State.A = State.Y
|
|
setN(State.A)
|
|
setZ(State.A)
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
|
|
case 0xE8:
|
|
State.X = (State.X + 1) & 0xff
|
|
setN(State.X)
|
|
setZ(State.X)
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
case 0xC8:
|
|
State.Y = (State.Y + 1) & 0xff
|
|
setN(State.Y)
|
|
setZ(State.Y)
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
case 0xca:
|
|
State.X = (State.X - 1) & 0xff
|
|
setN(State.X)
|
|
setZ(State.X)
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
case 0x88:
|
|
State.Y = (State.Y - 1) & 0xff
|
|
setN(State.Y)
|
|
setZ(State.Y)
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
|
|
// Branch instructions
|
|
case 0x10:
|
|
branch("BPL", !isN())
|
|
case 0x30:
|
|
branch("BMI", isN())
|
|
case 0x50:
|
|
branch("BVC", !isV())
|
|
case 0x70:
|
|
branch("BVS", isV())
|
|
case 0x90:
|
|
branch("BCC", !isC())
|
|
case 0xb0:
|
|
branch("BCS", isC())
|
|
case 0xd0:
|
|
branch("BNE", !isZ())
|
|
case 0xf0:
|
|
branch("BEQ", isZ())
|
|
|
|
// Flag setting
|
|
case 0x18:
|
|
setC(false)
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
case 0x38:
|
|
setC(true)
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
case 0x58:
|
|
State.P &= ^CpuFlagI
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
case 0x78:
|
|
State.P |= CpuFlagI
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
case 0xb8:
|
|
State.P &= ^CpuFlagV
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
case 0xd8:
|
|
State.P &= ^CpuFlagD
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
case 0xf8:
|
|
State.P |= CpuFlagD
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
|
|
case 0x48: // PHA
|
|
push8(State.A)
|
|
State.PC++
|
|
system.FrameCycles += 3
|
|
case 0x68: // PLA
|
|
State.A = pop8()
|
|
setN(State.A)
|
|
setZ(State.A)
|
|
State.PC++
|
|
system.FrameCycles += 4
|
|
case 0x08: // PHP
|
|
// From http://visual6502.org/wiki/index.php?title=6502_BRK_and_B_bit#the_B_flag_and_the_various_mechanisms
|
|
// software instructions BRK & PHP will push the B flag as being 1.
|
|
push8(State.P | CpuFlagB)
|
|
State.PC++
|
|
system.FrameCycles += 3
|
|
case 0x28: // PLP
|
|
// CpuFlagR is always supposed to be 1
|
|
State.P = pop8() | CpuFlagR
|
|
State.PC++
|
|
system.FrameCycles += 4
|
|
case 0xea:
|
|
State.PC++
|
|
system.FrameCycles += 2
|
|
|
|
case 0x00: // BRK
|
|
brk()
|
|
case 0x40: // RTI
|
|
State.P = pop8() | CpuFlagR
|
|
value := pop16()
|
|
State.PC = value
|
|
system.FrameCycles += 6
|
|
|
|
case 0x24: // BIT $00
|
|
address := mmu.ReadMemory(State.PC + 1)
|
|
bit(uint16(address))
|
|
State.PC += 2
|
|
system.FrameCycles += 3
|
|
case 0x2C: // BIT $0000
|
|
address := uint16(mmu.ReadMemory(State.PC+1)) + uint16(mmu.ReadMemory(State.PC+2))<<8
|
|
bit(address)
|
|
State.PC += 3
|
|
system.FrameCycles += 4
|
|
|
|
case 0x0a, 0x06, 0x16, 0x0e, 0x1e: // ASL
|
|
address, value := preProcessShift(addressMode)
|
|
setC((value & 0x80) != 0)
|
|
value = (value << 1) & 0xff
|
|
setZ(value)
|
|
setN(value)
|
|
postProcessShift(addressMode, address, value)
|
|
case 0x4a, 0x46, 0x56, 0x4e, 0x5e: // LSR
|
|
address, value := preProcessShift(addressMode)
|
|
setC((value & 0x01) != 0)
|
|
value >>= 1
|
|
setZ(value)
|
|
setN(value)
|
|
postProcessShift(addressMode, address, value)
|
|
case 0x2a, 0x26, 0x36, 0x2e, 0x3e: // ROL
|
|
address, value := preProcessShift(addressMode)
|
|
value16 := uint16(value)
|
|
value16 <<= 1
|
|
if (State.P & CpuFlagC) != 0 {
|
|
value16 |= 0x01
|
|
}
|
|
setC((value16 & 0x100) != 0)
|
|
value = uint8(value16 & 0xff)
|
|
setZ(value)
|
|
setN(value)
|
|
postProcessShift(addressMode, address, value)
|
|
case 0x6a, 0x66, 0x76, 0x6e, 0x7e: // ROR
|
|
address, value := preProcessShift(addressMode)
|
|
value16 := uint16(value)
|
|
if (State.P & CpuFlagC) != 0 {
|
|
value16 |= 0x100
|
|
}
|
|
setC((value16 & 0x01) != 0)
|
|
value = uint8(value16 >> 1)
|
|
setZ(value)
|
|
setN(value)
|
|
postProcessShift(addressMode, address, value)
|
|
|
|
case 0xe6, 0xf6, 0xee, 0xfe: // INC
|
|
address, _ := getAddressFromAddressMode(addressMode)
|
|
value := mmu.ReadMemory(address)
|
|
value = (value + 1) & 0xff
|
|
setZ(value)
|
|
setN(value)
|
|
mmu.WriteMemory(address, value)
|
|
postProcessIncDec(addressMode)
|
|
|
|
case 0xc6, 0xd6, 0xce, 0xde: // DEC
|
|
address, _ := getAddressFromAddressMode(addressMode)
|
|
value := mmu.ReadMemory(address)
|
|
value = (value - 1) & 0xff
|
|
setZ(value)
|
|
setN(value)
|
|
mmu.WriteMemory(address, value)
|
|
postProcessIncDec(addressMode)
|
|
|
|
default:
|
|
fmt.Printf("Unknown opcode $%02x\n", opcode)
|
|
return
|
|
}
|
|
}
|
|
}
|