mirror of
https://github.com/mauiaaron/apple2.git
synced 2024-09-27 09:56:08 +00:00
WIP : 65c02 CPU in ARM assembly
This commit is contained in:
parent
6947240d97
commit
00cec0dcae
67
src/arm/cpu-regs.h
Normal file
67
src/arm/cpu-regs.h
Normal file
@ -0,0 +1,67 @@
|
||||
/*
|
||||
* Apple // emulator for *nix
|
||||
*
|
||||
* This software package is subject to the GNU General Public License
|
||||
* version 2 or later (your choice) as published by the Free Software
|
||||
* Foundation.
|
||||
*
|
||||
* THERE ARE NO WARRANTIES WHATSOEVER.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _CPU_REGS_H_
|
||||
#define _CPU_REGS_H_
|
||||
|
||||
#include "cpu.h"
|
||||
|
||||
// ARM register mappings
|
||||
|
||||
// r0, r1 are scratch regs, with r0 generally as the "important byte"
|
||||
#define EffectiveAddr r2 /* 16bit Effective address */
|
||||
#define PC_Reg r3 /* 16bit 6502 Program Counter */
|
||||
#define SP_Reg r4 /* 16bit 6502 Stack pointer */
|
||||
#define F_Reg r5 /* 8bit 6502 flags */
|
||||
#define Y_Reg r6 /* 8bit 6502 Y register */
|
||||
#define X_Reg r7 /* 8bit 6502 X register */
|
||||
#define A_Reg r8 /* 8bit 6502 A register */
|
||||
// r9 is another scratch variable
|
||||
#define reg_64k r10 /* apple_ii_64k table address */
|
||||
#define reg_vmem_r r11 /* cpu65_vmem_r table address */
|
||||
// r12 unused
|
||||
// r13 ARM SP
|
||||
// r14 ARM return addr
|
||||
// r15 ARM PC
|
||||
|
||||
#define ARM_CF_Bit ... /* ARM carry */
|
||||
#define ARM_AF_Bit ...
|
||||
|
||||
|
||||
// x86-ish instruction macros for legibility =P
|
||||
#define ret mov pc, r14
|
||||
|
||||
|
||||
#ifdef __LP64__
|
||||
# error 20150205 ARM 64bit untested!!!
|
||||
# define LSL_SHIFT #4 // 4<<1 = 8
|
||||
# define SZ_PTR 8
|
||||
# define ROR_BIT 63
|
||||
#else
|
||||
# define LSL_SHIFT #2 // 2<<1 = 4
|
||||
# define SZ_PTR 4
|
||||
# define ROR_BIT 31
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef NO_UNDERSCORES
|
||||
# define SYM(x) x
|
||||
# define SYMX(x,INDEX,SCALE) x(,INDEX,SCALE)
|
||||
# define ENTRY(x) .globl x; .balign 16; x##:
|
||||
# define CALL(x) x
|
||||
#else
|
||||
# define SYM(x) _##x
|
||||
# define SYMX(x,INDEX,SCALE) _##x(,INDEX,SCALE)
|
||||
# define ENTRY(x) .globl _##x; .balign 16; _##x##:
|
||||
# define CALL(x) _##x
|
||||
#endif
|
||||
|
||||
#endif // whole file
|
2404
src/arm/cpu.S
Normal file
2404
src/arm/cpu.S
Normal file
File diff suppressed because it is too large
Load Diff
5
src/arm/genglue
Executable file
5
src/arm/genglue
Executable file
@ -0,0 +1,5 @@
|
||||
#!/bin/sh
|
||||
echo '/* Automatically Generated -- do not edit */'
|
||||
echo '#include "arm/glue-prologue.h"'
|
||||
grep -E -h '^(GLUE_)|(#if)|(#endif)|(#else)|(#elif)' $*
|
||||
exit 0
|
69
src/arm/glue-prologue.h
Normal file
69
src/arm/glue-prologue.h
Normal file
@ -0,0 +1,69 @@
|
||||
/*
|
||||
* Apple // emulator for *nix
|
||||
*
|
||||
* This software package is subject to the GNU General Public License
|
||||
* version 2 or later (your choice) as published by the Free Software
|
||||
* Foundation.
|
||||
*
|
||||
* THERE ARE NO WARRANTIES WHATSOEVER.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "misc.h"
|
||||
#include "cpu-regs.h"
|
||||
|
||||
#define GLUE_BANK_MAYBEREAD(func,pointer) \
|
||||
ENTRY(func) ldr r1, SYM(softswitches); \
|
||||
ldr r0, [r1]; \
|
||||
tst r0, $SS_CXROM; \
|
||||
bne 1f; \
|
||||
ldr r1, SYM(pointer); \
|
||||
blx r1; \
|
||||
ret; \
|
||||
1: ldr r1, SYM(pointer); \
|
||||
ldrb r0, [r1, EffectiveAddr]; \
|
||||
ret;
|
||||
|
||||
#define GLUE_BANK_READ(func,pointer) \
|
||||
ENTRY(func) ldr r1, SYM(pointer); \
|
||||
ldrb r0, [r1, EffectiveAddr]; \
|
||||
ret;
|
||||
|
||||
#define GLUE_BANK_WRITE(func,pointer) \
|
||||
ENTRY(func) ldr r1, SYM(pointer); \
|
||||
strb r0, [r1, EffectiveAddr]; \
|
||||
ret;
|
||||
|
||||
#define GLUE_BANK_MAYBEWRITE(func,pointer) \
|
||||
ENTRY(func) ldr r1, SYM(pointer); \
|
||||
cmp r1, #0; \
|
||||
beq 1f; \
|
||||
strb r0, [r1, EffectiveAddr]; \
|
||||
1: ret;
|
||||
|
||||
|
||||
#define GLUE_C_WRITE(func) \
|
||||
ENTRY(func) push {r0, A_Reg, X_Reg, Y_Reg, F_Reg, SP_Reg, PC_Reg}; \
|
||||
and r0, #0xff; \
|
||||
mov r1, r0; \
|
||||
mov r0, EffectiveAddr; \
|
||||
bl CALL(c_##func); \
|
||||
pop {PC_Reg, SP_Reg, F_Reg, Y_Reg, X_Reg, A_Reg, r0}; \
|
||||
ret;
|
||||
|
||||
#define _GLUE_C_READ(func, ...) \
|
||||
ENTRY(func) push {A_Reg, X_Reg, Y_Reg, F_Reg, SP_Reg, PC_Reg}; \
|
||||
mov r0, EffectiveAddr; \
|
||||
bl CALL(c_##func); \
|
||||
pop {PC_Reg, SP_Reg, F_Reg, Y_Reg, X_Reg, A_Reg}; \
|
||||
__VA_ARGS__ \
|
||||
ret;
|
||||
|
||||
#define GLUE_C_READ(FUNC) _GLUE_C_READ(FUNC)
|
||||
|
||||
#define GLUE_C_READ_ALTZP(FUNC) _GLUE_C_READ(FUNC, \
|
||||
push {r0}; \
|
||||
RestoreAltZP \
|
||||
pop {r0}; \
|
||||
)
|
||||
|
@ -626,8 +626,16 @@ static void initialize_code_tables()
|
||||
val |= N_Flag_6502;
|
||||
}
|
||||
|
||||
#if defined(__i386__) || defined(__x86_64__)
|
||||
cpu65_flags_encode[ i ] = val/* | 0x20 WTF?*/;
|
||||
cpu65_flags_decode[ val ] = i;
|
||||
#elif defined(__arm__)
|
||||
# error TODO FIXME proper map of ARM processor flags
|
||||
#elif defined(__aarch64__)
|
||||
# error soon ...
|
||||
#else
|
||||
# error unknown machine architecture
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
|
15
src/cpu.h
15
src/cpu.h
@ -97,7 +97,20 @@ void cpu65_trace_checkpoint(void);
|
||||
# define Z_Flag 0x40 /* 6502 Zero */
|
||||
# define N_Flag 0x80 /* 6502 Negative */
|
||||
#elif defined(__arm__)
|
||||
# error in progress ...
|
||||
# define V_Flag 0x1
|
||||
# define C_Flag 0x2
|
||||
# define Z_Flag 0x4
|
||||
# define N_Flag 0x8
|
||||
# define NZ_Flags 0xC
|
||||
# define NZC_Flags 0xE
|
||||
# define NVZ_Flags 0xD
|
||||
# define NVZC_Flags 0xF
|
||||
# define X_Flag 0x10
|
||||
# define I_Flag 0x20
|
||||
# define B_Flag 0x40
|
||||
# define D_Flag 0x80
|
||||
# define BX_Flags 0x50
|
||||
# define BI_Flags 0x60
|
||||
#elif defined(__aarch64__)
|
||||
# error soon ...
|
||||
#else
|
||||
|
Loading…
Reference in New Issue
Block a user