mirror of
https://github.com/mauiaaron/apple2.git
synced 2024-06-26 00:29:27 +00:00
Get tests working again
* Refactor naming of saved CPU state variables
* Allows convenient addressing from assembly
This commit is contained in:
Aaron Culliney
parent
a3973b2e35
commit
10e03e9bc5
|
|
@ -16,21 +16,18 @@
|
|||
|
||||
#include "common.h"
|
||||
|
||||
struct cpu65_state cpu65_current = { 0 };
|
||||
struct cpu65_extra cpu65_debug = { 0 };
|
||||
uint16_t cpu65_pc;
|
||||
uint8_t cpu65_a;
|
||||
uint8_t cpu65_f;
|
||||
uint8_t cpu65_x;
|
||||
uint8_t cpu65_y;
|
||||
uint8_t cpu65_sp;
|
||||
|
||||
const uint16_t *_cpu65_pc = &cpu65_current.pc;
|
||||
const uint8_t *_cpu65_a = &cpu65_current.a;
|
||||
const uint8_t *_cpu65_f = &cpu65_current.f;
|
||||
const uint8_t *_cpu65_x = &cpu65_current.x;
|
||||
const uint8_t *_cpu65_y = &cpu65_current.y;
|
||||
const uint8_t *_cpu65_sp = &cpu65_current.sp;
|
||||
|
||||
const uint16_t *_cpu65_ea = &cpu65_debug.ea;
|
||||
const uint8_t *_cpu65_d = &cpu65_debug.d;
|
||||
const uint8_t *_cpu65_rw = &cpu65_debug.rw;
|
||||
const uint8_t *_cpu65_opcode = &cpu65_debug.opcode;
|
||||
const uint8_t *_cpu65_opcycles = &cpu65_debug.opcycles;
|
||||
uint16_t cpu65_ea;
|
||||
uint8_t cpu65_d;
|
||||
uint8_t cpu65_rw;
|
||||
uint8_t cpu65_opcode;
|
||||
uint8_t cpu65_opcycles;
|
||||
|
||||
int16_t cpu65_cycle_count = 0;
|
||||
int16_t cpu65_cycles_to_execute = 0;
|
||||
|
|
|
|||
30
src/cpu.h
30
src/cpu.h
|
|
@ -23,24 +23,18 @@
|
|||
|
||||
/* types */
|
||||
|
||||
struct cpu65_state
|
||||
{
|
||||
uint16_t pc; /* Program counter */
|
||||
uint8_t a; /* Accumulator */
|
||||
uint8_t f; /* Flags (host-order) */
|
||||
uint8_t x; /* X Index register */
|
||||
uint8_t y; /* Y Index register */
|
||||
uint8_t sp; /* Stack Pointer */
|
||||
};
|
||||
extern uint16_t cpu65_pc; // Program counter
|
||||
extern uint8_t cpu65_a; // Accumulator
|
||||
extern uint8_t cpu65_f; // Flags (host-order)
|
||||
extern uint8_t cpu65_x; // X Index register
|
||||
extern uint8_t cpu65_y; // Y Index register
|
||||
extern uint8_t cpu65_sp; // Stack Pointer
|
||||
|
||||
struct cpu65_extra
|
||||
{
|
||||
uint16_t ea; /* Last effective address */
|
||||
uint8_t d; /* Last data byte written */
|
||||
uint8_t rw; /* 1 = read occured, 2 = write, 3 = both */
|
||||
uint8_t opcode; /* Last opcode */
|
||||
uint8_t opcycles; /* Last opcode extra cycles */
|
||||
};
|
||||
extern uint16_t cpu65_ea; // Last effective address
|
||||
extern uint8_t cpu65_d; // Last data byte written
|
||||
extern uint8_t cpu65_rw; // 1 = read occured, 2 = write, 3 = both
|
||||
extern uint8_t cpu65_opcode; // Last opcode
|
||||
extern uint8_t cpu65_opcycles; // Last opcode extra cycles
|
||||
|
||||
/* Set up the processor for a new run. Sets up opcode table. */
|
||||
extern void cpu65_init();
|
||||
|
|
@ -55,8 +49,6 @@ extern void cpu65_direct_write(int ea,int data);
|
|||
|
||||
extern void *cpu65_vmem_r[65536];
|
||||
extern void *cpu65_vmem_w[65536];
|
||||
extern struct cpu65_state cpu65_current;
|
||||
extern struct cpu65_extra cpu65_debug;
|
||||
|
||||
extern unsigned char cpu65_flags_encode[256];
|
||||
extern unsigned char cpu65_flags_decode[256];
|
||||
|
|
|
|||
|
|
@ -175,7 +175,7 @@ ADDRS [0-9a-fA-F]+
|
|||
++debugtext;
|
||||
|
||||
arg1 = (int)strtol(debugtext, &debugtext, 16);
|
||||
dump_mem(cpu65_current.pc, arg1, 0, do_ascii, -1);
|
||||
dump_mem(cpu65_pc, arg1, 0, do_ascii, -1);
|
||||
return MEM;
|
||||
}
|
||||
|
||||
|
|
@ -185,7 +185,7 @@ ADDRS [0-9a-fA-F]+
|
|||
|
||||
if (tolower(debugtext[0]) == 'a')
|
||||
do_ascii = 1;
|
||||
dump_mem(cpu65_current.pc, 256, 0, do_ascii, -1);
|
||||
dump_mem(cpu65_pc, 256, 0, do_ascii, -1);
|
||||
return MEM;
|
||||
}
|
||||
|
||||
|
|
@ -298,7 +298,7 @@ ADDRS [0-9a-fA-F]+
|
|||
|
||||
arg1 = (int)strtol(debugtext, &debugtext, 16);
|
||||
arg2 = 256;
|
||||
if ((arg1 < 0) || (arg1 > 65535)) arg1 = cpu65_current.pc;
|
||||
if ((arg1 < 0) || (arg1 > 65535)) arg1 = cpu65_pc;
|
||||
|
||||
disasm(arg1, arg2, 0, -1);
|
||||
return DIS;
|
||||
|
|
@ -313,7 +313,7 @@ ADDRS [0-9a-fA-F]+
|
|||
|
||||
arg1 = (int)strtol(debugtext, &debugtext, 16);
|
||||
arg2 = 256;
|
||||
if ((arg1 < 0) || (arg1 > 65535)) arg1 = cpu65_current.pc;
|
||||
if ((arg1 < 0) || (arg1 > 65535)) arg1 = cpu65_pc;
|
||||
|
||||
disasm(arg1, arg2, 0, arg3);
|
||||
return DIS;
|
||||
|
|
@ -325,13 +325,13 @@ ADDRS [0-9a-fA-F]+
|
|||
++debugtext;
|
||||
|
||||
arg1 = (int)strtol(debugtext, &debugtext, 16);
|
||||
disasm(cpu65_current.pc, arg1, 0, -1);
|
||||
disasm(cpu65_pc, arg1, 0, -1);
|
||||
return DIS;
|
||||
}
|
||||
|
||||
{BOS}di?s?{EOS} {
|
||||
/* disassemble current location */
|
||||
disasm(cpu65_current.pc, 256, 0, -1);
|
||||
disasm(cpu65_pc, 256, 0, -1);
|
||||
return DIS;
|
||||
}
|
||||
|
||||
|
|
@ -551,7 +551,7 @@ ADDRS [0-9a-fA-F]+
|
|||
|
||||
stepping_struct_t s = {
|
||||
.step_type = UNTILING,
|
||||
.step_pc = cpu65_current.pc + delta
|
||||
.step_pc = cpu65_pc + delta
|
||||
};
|
||||
|
||||
debugger_go(s);
|
||||
|
|
@ -563,7 +563,7 @@ ADDRS [0-9a-fA-F]+
|
|||
while (!isspace(*debugtext)) ++debugtext;
|
||||
|
||||
/* DANGEROUS! */
|
||||
cpu65_current.pc = (int)strtol(debugtext, (char**)NULL, 16);
|
||||
cpu65_pc = (int)strtol(debugtext, (char**)NULL, 16);
|
||||
|
||||
stepping_struct_t s = {
|
||||
.step_type = GOING
|
||||
|
|
@ -584,7 +584,7 @@ ADDRS [0-9a-fA-F]+
|
|||
|
||||
{BOS}wa?t?c?h?{EOS} {
|
||||
/* set watchpoint */
|
||||
set_halt(watchpoints, cpu65_current.pc);
|
||||
set_halt(watchpoints, cpu65_pc);
|
||||
return WATCH;
|
||||
}
|
||||
|
||||
|
|
@ -605,7 +605,7 @@ ADDRS [0-9a-fA-F]+
|
|||
|
||||
{BOS}br?e?a?k?{EOS} {
|
||||
/* set breakpoint */
|
||||
set_halt(breakpoints, cpu65_current.pc);
|
||||
set_halt(breakpoints, cpu65_pc);
|
||||
return BREAK;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -146,7 +146,7 @@ int c_get_current_rambank(int addrs) {
|
|||
get_last_opcode () - returns the last executed opcode
|
||||
------------------------------------------------------------------------- */
|
||||
uint8_t get_last_opcode() {
|
||||
return cpu65_debug.opcode;
|
||||
return cpu65_opcode;
|
||||
}
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
|
|
@ -154,25 +154,25 @@ uint8_t get_last_opcode() {
|
|||
the PC is currently reading from.
|
||||
------------------------------------------------------------------------- */
|
||||
uint8_t get_current_opcode() {
|
||||
int bank = c_get_current_rambank(cpu65_current.pc);
|
||||
int bank = c_get_current_rambank(cpu65_pc);
|
||||
int lcbank = 0;
|
||||
|
||||
/* main RAM */
|
||||
if (cpu65_current.pc < 0xD000)
|
||||
if (cpu65_pc < 0xD000)
|
||||
{
|
||||
return apple_ii_64k[bank][cpu65_current.pc];
|
||||
return apple_ii_64k[bank][cpu65_pc];
|
||||
}
|
||||
|
||||
/* LC RAM */
|
||||
if (cpu65_current.pc >= 0xE000)
|
||||
if (cpu65_pc >= 0xE000)
|
||||
{
|
||||
if (softswitches & SS_LCRAM)
|
||||
{
|
||||
return language_card[bank][cpu65_current.pc-0xE000];
|
||||
return language_card[bank][cpu65_pc-0xE000];
|
||||
}
|
||||
else
|
||||
{
|
||||
return apple_ii_64k[bank][cpu65_current.pc];
|
||||
return apple_ii_64k[bank][cpu65_pc];
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -184,11 +184,11 @@ uint8_t get_current_opcode() {
|
|||
|
||||
if (softswitches & SS_LCRAM)
|
||||
{
|
||||
return language_banks[bank][cpu65_current.pc-0xD000+lcbank];
|
||||
return language_banks[bank][cpu65_pc-0xD000+lcbank];
|
||||
}
|
||||
else
|
||||
{
|
||||
return apple_ii_64k[bank][cpu65_current.pc];
|
||||
return apple_ii_64k[bank][cpu65_pc];
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -216,7 +216,7 @@ void dump_mem(int addrs, int len, int lc, int do_ascii, int rambank) {
|
|||
|
||||
if ((addrs < 0) || (addrs > 0xffff))
|
||||
{
|
||||
addrs = cpu65_current.pc;
|
||||
addrs = cpu65_pc;
|
||||
orig_addrs = addrs;
|
||||
}
|
||||
|
||||
|
|
@ -313,10 +313,10 @@ void search_mem(char *hexstr, int lc, int rambank) {
|
|||
|
||||
end = (lc) ? 0x3000 : 0x10000;
|
||||
|
||||
/* check which rambank for cpu65_current.pc */
|
||||
/* check which rambank for cpu65_pc */
|
||||
if (rambank == -1)
|
||||
{
|
||||
rambank = c_get_current_rambank(cpu65_current.pc);
|
||||
rambank = c_get_current_rambank(cpu65_pc);
|
||||
}
|
||||
|
||||
/* iterate over memory */
|
||||
|
|
@ -507,7 +507,7 @@ void disasm(int addrs, int len, int lc, int rambank) {
|
|||
char arg1, arg2;
|
||||
int i, j, k, end, orig_addrs = addrs;
|
||||
|
||||
/* check which rambank for cpu65_current.pc */
|
||||
/* check which rambank for cpu65_pc */
|
||||
if (rambank == -1)
|
||||
{
|
||||
rambank = c_get_current_rambank(addrs);
|
||||
|
|
@ -522,7 +522,7 @@ void disasm(int addrs, int len, int lc, int rambank) {
|
|||
/* handle invalid address request */
|
||||
if ((addrs < 0) || (addrs > 0xffff))
|
||||
{
|
||||
addrs = cpu65_current.pc;
|
||||
addrs = cpu65_pc;
|
||||
orig_addrs = addrs;
|
||||
}
|
||||
|
||||
|
|
@ -664,46 +664,46 @@ void disasm(int addrs, int len, int lc, int rambank) {
|
|||
------------------------------------------------------------------------- */
|
||||
|
||||
void show_regs() {
|
||||
sprintf(second_buf[num_buffer_lines++], "PC = %04X EA = %04X SP = %04X", cpu65_current.pc, cpu65_debug.ea, cpu65_current.sp + 0x0100);
|
||||
sprintf(second_buf[num_buffer_lines++], "X = %02X Y = %02X A = %02X F = %02X", cpu65_current.x, cpu65_current.y, cpu65_current.a, cpu65_current.f);
|
||||
sprintf(second_buf[num_buffer_lines++], "PC = %04X EA = %04X SP = %04X", cpu65_pc, cpu65_ea, cpu65_sp + 0x0100);
|
||||
sprintf(second_buf[num_buffer_lines++], "X = %02X Y = %02X A = %02X F = %02X", cpu65_x, cpu65_y, cpu65_a, cpu65_f);
|
||||
|
||||
memset(second_buf[num_buffer_lines], ' ', BUF_X);
|
||||
if (cpu65_current.f & C_Flag_6502)
|
||||
if (cpu65_f & C_Flag_6502)
|
||||
{
|
||||
second_buf[num_buffer_lines][0]='C';
|
||||
}
|
||||
|
||||
if (cpu65_current.f & X_Flag_6502)
|
||||
if (cpu65_f & X_Flag_6502)
|
||||
{
|
||||
second_buf[num_buffer_lines][1]='X';
|
||||
}
|
||||
|
||||
if (cpu65_current.f & I_Flag_6502)
|
||||
if (cpu65_f & I_Flag_6502)
|
||||
{
|
||||
second_buf[num_buffer_lines][2]='I';
|
||||
}
|
||||
|
||||
if (cpu65_current.f & V_Flag_6502)
|
||||
if (cpu65_f & V_Flag_6502)
|
||||
{
|
||||
second_buf[num_buffer_lines][3]='V';
|
||||
}
|
||||
|
||||
if (cpu65_current.f & B_Flag_6502)
|
||||
if (cpu65_f & B_Flag_6502)
|
||||
{
|
||||
second_buf[num_buffer_lines][4]='B';
|
||||
}
|
||||
|
||||
if (cpu65_current.f & D_Flag_6502)
|
||||
if (cpu65_f & D_Flag_6502)
|
||||
{
|
||||
second_buf[num_buffer_lines][5]='D';
|
||||
}
|
||||
|
||||
if (cpu65_current.f & Z_Flag_6502)
|
||||
if (cpu65_f & Z_Flag_6502)
|
||||
{
|
||||
second_buf[num_buffer_lines][6]='Z';
|
||||
}
|
||||
|
||||
if (cpu65_current.f & N_Flag_6502)
|
||||
if (cpu65_f & N_Flag_6502)
|
||||
{
|
||||
second_buf[num_buffer_lines][7]='N';
|
||||
}
|
||||
|
|
@ -726,23 +726,23 @@ static int will_branch() {
|
|||
switch (op)
|
||||
{
|
||||
case 0x10: /* BPL */
|
||||
return (int) !(cpu65_current.f & N_Flag_6502);
|
||||
return (int) !(cpu65_f & N_Flag_6502);
|
||||
case 0x30: /* BMI */
|
||||
return (int) (cpu65_current.f & N_Flag_6502);
|
||||
return (int) (cpu65_f & N_Flag_6502);
|
||||
case 0x50: /* BVC */
|
||||
return (int) !(cpu65_current.f & V_Flag_6502);
|
||||
return (int) !(cpu65_f & V_Flag_6502);
|
||||
case 0x70: /* BVS */
|
||||
return (int) (cpu65_current.f & V_Flag_6502);
|
||||
return (int) (cpu65_f & V_Flag_6502);
|
||||
case 0x80: /* BRA */
|
||||
return 1;
|
||||
case 0x90: /* BCC */
|
||||
return (int) !(cpu65_current.f & C_Flag_6502);
|
||||
return (int) !(cpu65_f & C_Flag_6502);
|
||||
case 0xb0: /* BCS */
|
||||
return (int) (cpu65_current.f & C_Flag_6502);
|
||||
return (int) (cpu65_f & C_Flag_6502);
|
||||
case 0xd0: /* BNE */
|
||||
return (int) !(cpu65_current.f & Z_Flag_6502);
|
||||
return (int) !(cpu65_f & Z_Flag_6502);
|
||||
case 0xf0: /* BEQ */
|
||||
return (int) (cpu65_current.f & Z_Flag_6502);
|
||||
return (int) (cpu65_f & Z_Flag_6502);
|
||||
}
|
||||
|
||||
return BRANCH_NA;
|
||||
|
|
@ -859,28 +859,28 @@ int at_haltpt() {
|
|||
uint8_t op = get_last_opcode();
|
||||
if (op_breakpoints[op])
|
||||
{
|
||||
sprintf(second_buf[num_buffer_lines++], "stopped at %04X bank %d instruction %02X", cpu65_current.pc, c_get_current_rambank(cpu65_current.pc), op);
|
||||
sprintf(second_buf[num_buffer_lines++], "stopped at %04X bank %d instruction %02X", cpu65_pc, c_get_current_rambank(cpu65_pc), op);
|
||||
++count;
|
||||
}
|
||||
|
||||
for (int i = 0; i < MAX_BRKPTS; i++)
|
||||
{
|
||||
if (cpu65_current.pc == breakpoints[i])
|
||||
if (cpu65_pc == breakpoints[i])
|
||||
{
|
||||
sprintf(second_buf[num_buffer_lines++], "stopped at %04X bank %d", breakpoints[i], c_get_current_rambank(cpu65_current.pc));
|
||||
sprintf(second_buf[num_buffer_lines++], "stopped at %04X bank %d", breakpoints[i], c_get_current_rambank(cpu65_pc));
|
||||
++count;
|
||||
}
|
||||
}
|
||||
|
||||
if (cpu65_debug.rw) /* only check watchpoints if read/write occured */
|
||||
if (cpu65_rw) /* only check watchpoints if read/write occured */
|
||||
{
|
||||
for (int i = 0; i < MAX_BRKPTS; i++)
|
||||
{
|
||||
if (cpu65_debug.ea == watchpoints[i])
|
||||
if (cpu65_ea == watchpoints[i])
|
||||
{
|
||||
if (cpu65_debug.rw & 0x2)
|
||||
if (cpu65_rw & 0x2)
|
||||
{
|
||||
sprintf(second_buf[num_buffer_lines++], "wrote: %04X: %02X", watchpoints[i], cpu65_debug.d);
|
||||
sprintf(second_buf[num_buffer_lines++], "wrote: %04X: %02X", watchpoints[i], cpu65_d);
|
||||
++count;
|
||||
}
|
||||
else
|
||||
|
|
@ -889,7 +889,7 @@ int at_haltpt() {
|
|||
++count;
|
||||
}
|
||||
|
||||
cpu65_debug.rw = 0; /* only allow WP to trip once */
|
||||
cpu65_rw = 0; /* only allow WP to trip once */
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1233,7 +1233,7 @@ bool c_debugger_should_break() {
|
|||
|
||||
case UNTILING:
|
||||
{
|
||||
if (stepping_struct.step_pc == cpu65_current.pc) {
|
||||
if (stepping_struct.step_pc == cpu65_pc) {
|
||||
stepping_struct.should_break = true;
|
||||
}
|
||||
}
|
||||
|
|
@ -1275,7 +1275,7 @@ int debugger_go(stepping_struct_t s) {
|
|||
#if !defined(TESTING)
|
||||
if (stepping_struct.step_type != LOADING) {
|
||||
clear_debugger_screen();
|
||||
disasm(cpu65_current.pc, 1, 0, -1);
|
||||
disasm(cpu65_pc, 1, 0, -1);
|
||||
int branch = will_branch();
|
||||
if (branch != BRANCH_NA) {
|
||||
sprintf(second_buf[num_buffer_lines++], "%s", (branch) ? "will branch" : "will not branch");
|
||||
|
|
|
|||
5480
src/test/testcpu.c
5480
src/test/testcpu.c
File diff suppressed because it is too large
Load Diff
|
|
@ -18,11 +18,11 @@
|
|||
#include "apple2.h"
|
||||
#include "misc.h"
|
||||
|
||||
#define DebugCurrEA SN(_cpu65_ea)
|
||||
#define DebugCurrByte SN(_cpu65_d)
|
||||
#define DebugCurrRW SN(_cpu65_rw)
|
||||
#define DebugCurrOpcode SN(_cpu65_opcode)
|
||||
#define DebugCycleCount SN(_cpu65_opcycles)
|
||||
#define DebugCurrEA SN(cpu65_ea)
|
||||
#define DebugCurrByte SN(cpu65_d)
|
||||
#define DebugCurrRW SN(cpu65_rw)
|
||||
#define DebugCurrOpcode SN(cpu65_opcode)
|
||||
#define DebugCycleCount SN(cpu65_opcycles)
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
CPU (6502) Helper Routines
|
||||
|
|
@ -2111,13 +2111,13 @@ E(cpu65_run)
|
|||
// Restore CPU state when being called from C.
|
||||
movLQ $0x0100, SP_Reg_X
|
||||
movzwLQ DebugCurrEA, EffectiveAddr_X
|
||||
movzwLQ SN(_cpu65_pc), PC_Reg_X
|
||||
movzbLQ SN(_cpu65_a), AF_Reg_X
|
||||
movzbLQ SN(_cpu65_f), _XAX
|
||||
movzwLQ SN(cpu65_pc), PC_Reg_X
|
||||
movzbLQ SN(cpu65_a), AF_Reg_X
|
||||
movzbLQ SN(cpu65_f), _XAX
|
||||
movb SNX(cpu65_flags_decode,_XAX,1), F_Reg
|
||||
movzbLQ SN(_cpu65_x), XY_Reg_X
|
||||
movb SN(_cpu65_y), Y_Reg
|
||||
movb SN(_cpu65_sp), SP_Reg_L
|
||||
movzbLQ SN(cpu65_x), XY_Reg_X
|
||||
movb SN(cpu65_y), Y_Reg
|
||||
movb SN(cpu65_sp), SP_Reg_L
|
||||
#ifdef APPLE2_VM
|
||||
RestoreAltZP
|
||||
#endif
|
||||
|
|
@ -2136,15 +2136,15 @@ E(cpu65_run)
|
|||
exit_cpu65_run:
|
||||
// Save CPU state when returning from being called from C
|
||||
movw EffectiveAddr, DebugCurrEA
|
||||
movw PC_Reg, SN(_cpu65_pc)
|
||||
movb A_Reg, SN(_cpu65_a)
|
||||
movw PC_Reg, SN(cpu65_pc)
|
||||
movb A_Reg, SN(cpu65_a)
|
||||
xorw %ax, %ax
|
||||
movb F_Reg, %al
|
||||
movb SNX(cpu65_flags_encode,_XAX,1), %al
|
||||
movb %al, SN(_cpu65_f)
|
||||
movb X_Reg, SN(_cpu65_x)
|
||||
movb Y_Reg, SN(_cpu65_y)
|
||||
movb SP_Reg_L, SN(_cpu65_sp)
|
||||
movb %al, SN(cpu65_f)
|
||||
movb X_Reg, SN(cpu65_x)
|
||||
movb Y_Reg, SN(cpu65_y)
|
||||
movb SP_Reg_L, SN(cpu65_sp)
|
||||
jmp exit_frame
|
||||
|
||||
emul_reinit: movb $0, SN(cpu65__signal)
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user