diff --git a/src/cpu.h b/src/cpu.h
index 6da412d9..783e507f 100644
--- a/src/cpu.h
+++ b/src/cpu.h
@@ -23,6 +23,9 @@
 
 /* types */
 
+#define MEM_READ_FLAG  (1<<0)
+#define MEM_WRITE_FLAG (1<<1)
+
 extern uint16_t cpu65_pc;       // Program counter
 extern uint8_t  cpu65_a;        // Accumulator
 extern uint8_t  cpu65_f;        // Flags (host-order)
@@ -32,7 +35,7 @@ extern uint8_t  cpu65_sp;       // Stack Pointer
 
 extern uint16_t cpu65_ea;       // Last effective address
 extern uint8_t  cpu65_d;        // Last data byte written
-extern uint8_t  cpu65_rw;       // 1 = read occured, 2 = write, 3 = both
+extern uint8_t  cpu65_rw;       // MEM_READ_FLAG = read occured, MEM_WRITE_FLAG = write
 extern uint8_t  cpu65_opcode;   // Last opcode
 extern uint8_t  cpu65_opcycles; // Last opcode extra cycles
 
diff --git a/src/misc.c b/src/misc.c
index a5927667..ec752edf 100644
--- a/src/misc.c
+++ b/src/misc.c
@@ -262,12 +262,12 @@ void c_initialize_tables() {
     cpu65_vmem_r[0xC01E] = iie_check_altchar;
 
     /* SLOTC3ROM switch */
-    cpu65_vmem_w[0xC00A] = iie_c3rom_internal; // HACK FIXME TODO VERIFY : the pattern here is reversed from cxrom?
+    cpu65_vmem_w[0xC00A] = iie_c3rom_internal;
     cpu65_vmem_w[0xC00B] = iie_c3rom_peripheral;
     cpu65_vmem_r[0xC017] = iie_check_c3rom;
 
     /* SLOTCXROM switch */
-    cpu65_vmem_w[0xC006] = iie_cxrom_peripheral; // HACK FIXME TODO VERIFY : the pattern here is reversed from c3rom?
+    cpu65_vmem_w[0xC006] = iie_cxrom_peripheral;
     cpu65_vmem_w[0xC007] = iie_cxrom_internal;
     cpu65_vmem_r[0xC015] = iie_check_cxrom;
 
@@ -367,7 +367,7 @@ void c_initialize_tables() {
 
     /* Annunciator */
     for (i = 0xC058; i <= 0xC05D; i++) {
-        cpu65_vmem_w[i] = cpu65_vmem_r[i] = iie_annunciator_noop;
+        cpu65_vmem_w[i] = cpu65_vmem_r[i] = iie_annunciator;
     }
 
     /* DHIRES */
@@ -430,13 +430,9 @@ void c_initialize_tables() {
 
     for (i = 0xC800; i < 0xD000; i++)
     {
-        cpu65_vmem_r[i] =
-            iie_read_slot_expansion;    /* expansion rom */
+        cpu65_vmem_r[i] = iie_read_slot_expansion;
     }
-
-    cpu65_vmem_r[0xCFFF] =
-        cpu65_vmem_w[0xCFFF] =
-            iie_disable_slot_expansion;
+    cpu65_vmem_w[0xCFFF] = iie_read_slot_expansion;
 
     video_set(0);
 
diff --git a/src/misc.h b/src/misc.h
index 21240889..ce6bf680 100644
--- a/src/misc.h
+++ b/src/misc.h
@@ -192,7 +192,7 @@ iie_cxrom_peripheral(),
 iie_cxrom_internal(),
 iie_ioudis_on(),
 iie_ioudis_off(),
-iie_annunciator_noop(),
+iie_annunciator(),
 iie_dhires_on(),
 iie_dhires_off(),
 iie_hires_off(),
diff --git a/src/test/testdisk.c b/src/test/testdisk.c
index 1d374be5..c2cfa395 100644
--- a/src/test/testdisk.c
+++ b/src/test/testdisk.c
@@ -237,8 +237,8 @@ TEST test_boot_disk_cputrace() {
 }
 #endif
 
-#define EXPECTED_CPUTRACE_HELLO_DSK_FILE_SIZE 107523409
-#define EXPECTED_CPUTRACE_HELLO_DSK_SHA "586F218EC3C368C73DE1945B7EF441919E0D5B0F"
+#define EXPECTED_CPUTRACE_HELLO_FILE_SIZE 107500760
+#define EXPECTED_CPUTRACE_HELLO_SHA "CAF2507BAB937488F85377528041705114F06CA4"
 TEST test_cputrace_hello_dsk() {
     test_setup_boot_disk(BLANK_DSK, 0);
 
@@ -267,18 +267,18 @@ TEST test_cputrace_hello_dsk() {
         FILE *fp = fopen(output, "r");
         fseek(fp, 0, SEEK_END);
         long expectedSize = ftell(fp);
-        ASSERT(expectedSize == EXPECTED_CPUTRACE_HELLO_DSK_FILE_SIZE);
+        ASSERT(expectedSize == EXPECTED_CPUTRACE_HELLO_FILE_SIZE);
         fseek(fp, 0, SEEK_SET);
-        unsigned char *buf = malloc(EXPECTED_CPUTRACE_HELLO_DSK_FILE_SIZE);
-        if (fread(buf, 1, EXPECTED_CPUTRACE_HELLO_DSK_FILE_SIZE, fp) != EXPECTED_CPUTRACE_HELLO_DSK_FILE_SIZE) {
+        unsigned char *buf = malloc(EXPECTED_CPUTRACE_HELLO_FILE_SIZE);
+        if (fread(buf, 1, EXPECTED_CPUTRACE_HELLO_FILE_SIZE, fp) != EXPECTED_CPUTRACE_HELLO_FILE_SIZE) {
             ASSERT(false);
         }
         fclose(fp); fp = NULL;
-        SHA1(buf, EXPECTED_CPUTRACE_HELLO_DSK_FILE_SIZE, md);
+        SHA1(buf, EXPECTED_CPUTRACE_HELLO_FILE_SIZE, md);
         FREE(buf);
 
         sha1_to_str(md, mdstr0);
-        ASSERT(strcmp(mdstr0, EXPECTED_CPUTRACE_HELLO_DSK_SHA) == 0);
+        ASSERT(strcmp(mdstr0, EXPECTED_CPUTRACE_HELLO_SHA) == 0);
     } while(0);
 
     unlink(output);
@@ -287,8 +287,8 @@ TEST test_cputrace_hello_dsk() {
     PASS();
 }
 
-#define EXPECTED_CPUTRACE_HELLO_NIB_FILE_SIZE 12888005
-#define EXPECTED_CPUTRACE_HELLO_NIB_SHA "539A628524ACCF066A82FA67D0A488C8D3DC01BF"
+#define EXPECTED_CPUTRACE_HELLO_NIB_FILE_SIZE 12887880
+#define EXPECTED_CPUTRACE_HELLO_NIB_SHA "CE14642D70BA42B214C22BFB460F00AA54C8BB5C"
 TEST test_cputrace_hello_nib() {
     test_setup_boot_disk(BLANK_NIB, 0);
 
@@ -337,8 +337,6 @@ TEST test_cputrace_hello_nib() {
     PASS();
 }
 
-#define EXPECTED_CPUTRACE_HELLO_PO_FILE_SIZE 107523284
-#define EXPECTED_CPUTRACE_HELLO_PO_SHA "A99C1D02B898E02662DEDBF235C55B175D01D05D"
 TEST test_cputrace_hello_po() {
     test_setup_boot_disk(BLANK_PO, 0);
 
@@ -367,18 +365,18 @@ TEST test_cputrace_hello_po() {
         FILE *fp = fopen(output, "r");
         fseek(fp, 0, SEEK_END);
         long expectedSize = ftell(fp);
-        ASSERT(expectedSize == EXPECTED_CPUTRACE_HELLO_PO_FILE_SIZE);
+        ASSERT(expectedSize == EXPECTED_CPUTRACE_HELLO_FILE_SIZE);
         fseek(fp, 0, SEEK_SET);
-        unsigned char *buf = malloc(EXPECTED_CPUTRACE_HELLO_PO_FILE_SIZE);
-        if (fread(buf, 1, EXPECTED_CPUTRACE_HELLO_PO_FILE_SIZE, fp) != EXPECTED_CPUTRACE_HELLO_PO_FILE_SIZE) {
+        unsigned char *buf = malloc(EXPECTED_CPUTRACE_HELLO_FILE_SIZE);
+        if (fread(buf, 1, EXPECTED_CPUTRACE_HELLO_FILE_SIZE, fp) != EXPECTED_CPUTRACE_HELLO_FILE_SIZE) {
             ASSERT(false);
         }
         fclose(fp); fp = NULL;
-        SHA1(buf, EXPECTED_CPUTRACE_HELLO_PO_FILE_SIZE, md);
+        SHA1(buf, EXPECTED_CPUTRACE_HELLO_FILE_SIZE, md);
         FREE(buf);
 
         sha1_to_str(md, mdstr0);
-        ASSERT(strcmp(mdstr0, EXPECTED_CPUTRACE_HELLO_PO_SHA) == 0);
+        ASSERT(strcmp(mdstr0, EXPECTED_CPUTRACE_HELLO_SHA) == 0);
     } while(0);
 
     unlink(output);
@@ -387,8 +385,8 @@ TEST test_cputrace_hello_po() {
     PASS();
 }
 
-#define EXPECTED_VM_TRACE_FILE_SIZE 2830810
-#define EXPECTED_VM_TRACE_SHA "8B7A8169E34354773F82442DB6A0C3D6B69741D9"
+#define EXPECTED_VM_TRACE_FILE_SIZE 2830792
+#define EXPECTED_VM_TRACE_SHA "0659556B878848A6421D93057F18B3FB518A7D76"
 TEST test_boot_disk_vmtrace() {
     char *homedir = getenv("HOME");
     char *disk = NULL;
@@ -433,8 +431,8 @@ TEST test_boot_disk_vmtrace() {
     PASS();
 }
 
-#define EXPECTED_VM_TRACE_NIB_FILE_SIZE 2930074
-#define EXPECTED_VM_TRACE_NIB_SHA "BD2BA2B9C8E7712F9E6ABF1049ED8D2C4D979934"
+#define EXPECTED_VM_TRACE_NIB_FILE_SIZE 2930056
+#define EXPECTED_VM_TRACE_NIB_SHA "9C1B64255B1946011FAAF5DF53C24114401485EE"
 TEST test_boot_disk_vmtrace_nib() {
     test_setup_boot_disk(BLANK_NIB, 0);
 
@@ -481,8 +479,8 @@ TEST test_boot_disk_vmtrace_nib() {
     PASS();
 }
 
-#define EXPECTED_VM_TRACE_PO_FILE_SIZE 2830810
-#define EXPECTED_VM_TRACE_PO_SHA "3432149815E9142FDAD6D9DF94C8621FEB56F7D7"
+#define EXPECTED_VM_TRACE_PO_FILE_SIZE EXPECTED_VM_TRACE_FILE_SIZE
+#define EXPECTED_VM_TRACE_PO_SHA "23236C80A9CC38E75BB27F2E70359234B6B8D4DA"
 TEST test_boot_disk_vmtrace_po() {
     test_setup_boot_disk(BLANK_PO, 0);
 
diff --git a/src/vm.c b/src/vm.c
index 8d5b92b8..7b62ed66 100644
--- a/src/vm.c
+++ b/src/vm.c
@@ -124,12 +124,12 @@ typedef struct vm_trace_range_t {
 
 GLUE_C_READ(ram_nop)
 {
-    return 0x0;
+    return (cpu65_rw&MEM_WRITE_FLAG) ? 0x0 : floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(read_unmapped_softswitch)
 {
-    return apple_ii_64k[0][ea];
+    return c_ram_nop(ea);
 }
 
 GLUE_C_WRITE(write_unmapped_softswitch)
@@ -164,7 +164,7 @@ GLUE_C_READ(speaker_toggle)
 #ifdef AUDIO_ENABLED
     SpkrToggle();
 #endif
-    return 0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 // ----------------------------------------------------------------------------
@@ -173,7 +173,7 @@ GLUE_C_READ(speaker_toggle)
 GLUE_C_READ(iie_page2_off)
 {
     if (!(softswitches & SS_PAGE2)) {
-        return 0x0; // TODO: no early return?
+        return floating_bus(cpu65_cycle_count);
     }
 
     softswitches &= ~(SS_PAGE2|SS_SCREEN);
@@ -191,13 +191,13 @@ GLUE_C_READ(iie_page2_off)
 
     video_setpage(0);
 
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_page2_on)
 {
     if (softswitches & SS_PAGE2) {
-        return 0x0; // TODO: no early return?
+        return floating_bus(cpu65_cycle_count);
     }
 
     softswitches |= SS_PAGE2;
@@ -216,7 +216,7 @@ GLUE_C_READ(iie_page2_on)
         video_setpage(1);
     }
 
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_check_page2)
@@ -230,7 +230,7 @@ GLUE_C_READ(read_switch_graphics)
         softswitches &= ~SS_TEXT;
         video_redraw();
     }
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(read_switch_text)
@@ -239,7 +239,7 @@ GLUE_C_READ(read_switch_text)
         softswitches |= SS_TEXT;
         video_redraw();
     }
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_check_text)
@@ -253,7 +253,7 @@ GLUE_C_READ(read_switch_no_mixed)
         softswitches &= ~SS_MIXED;
         video_redraw();
     }
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(read_switch_mixed)
@@ -262,7 +262,7 @@ GLUE_C_READ(read_switch_mixed)
         softswitches |= SS_MIXED;
         video_redraw();
     }
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_check_mixed)
@@ -270,15 +270,18 @@ GLUE_C_READ(iie_check_mixed)
     return (softswitches & SS_MIXED) ? 0x80 : 0x00;
 }
 
-GLUE_C_READ(iie_annunciator_noop)
+GLUE_C_READ(iie_annunciator)
 {
-    return 0x0;// TBD : mem_floating_bus()
+    if ((ea >= 0xC058) && (ea <= 0xC05B)) {
+        // TODO: alternate joystick management?
+    }
+    return (cpu65_rw&MEM_WRITE_FLAG) ? 0x0 : floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_hires_off)
 {
     if (!(softswitches & SS_HIRES)) {
-        return 0x0; // TODO: no early return?
+        return floating_bus(cpu65_cycle_count);
     }
 
     softswitches &= ~(SS_HIRES|SS_HGRRD|SS_HGRWRT);
@@ -296,13 +299,13 @@ GLUE_C_READ(iie_hires_off)
     }
 
     video_redraw();
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_hires_on)
 {
     if (softswitches & SS_HIRES) {
-        return 0x0; // TODO: no early return?
+        return floating_bus(cpu65_cycle_count);
     }
 
     softswitches |= SS_HIRES;
@@ -320,7 +323,7 @@ GLUE_C_READ(iie_hires_on)
     }
 
     video_redraw();
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_check_hires)
@@ -366,7 +369,7 @@ GLUE_C_READ(read_gc_strobe)
     }
 
     // NOTE (possible TODO FIXME): unimplemented GC2 and GC3 timers since they were not wired on the //e ...
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(read_gc0)
@@ -391,12 +394,12 @@ GLUE_C_READ(read_gc1)
 
 GLUE_C_READ(iie_read_gc2)
 {
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_read_gc3)
 {
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 // ----------------------------------------------------------------------------
@@ -428,7 +431,7 @@ GLUE_C_READ(iie_c080)
     if (softswitches & SS_ALTZP) {
         _lc_to_auxmem();
     }
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_c081)
@@ -448,7 +451,7 @@ GLUE_C_READ(iie_c081)
     if (softswitches & SS_ALTZP) {
         _lc_to_auxmem();
     }
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(lc_c082)
@@ -462,7 +465,7 @@ GLUE_C_READ(lc_c082)
     base_d000_wrt = 0;
     base_e000_wrt = 0;
 
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_c083)
@@ -480,7 +483,7 @@ GLUE_C_READ(iie_c083)
     if (softswitches & SS_ALTZP) {
         _lc_to_auxmem();
     }
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_c088)
@@ -497,7 +500,7 @@ GLUE_C_READ(iie_c088)
     if (softswitches & SS_ALTZP) {
         _lc_to_auxmem();
     }
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_c089)
@@ -517,7 +520,7 @@ GLUE_C_READ(iie_c089)
     if (softswitches & SS_ALTZP) {
         _lc_to_auxmem();
     }
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(lc_c08a)
@@ -530,7 +533,7 @@ GLUE_C_READ(lc_c08a)
     base_d000_wrt = 0;
     base_e000_wrt = 0;
 
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_c08b)
@@ -550,7 +553,7 @@ GLUE_C_READ(iie_c08b)
     if (softswitches & SS_ALTZP) {
         _lc_to_auxmem();
     }
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_check_bank)
@@ -569,7 +572,7 @@ GLUE_C_READ(iie_check_lcram)
 GLUE_C_READ(iie_80store_off)
 {
     if (!(softswitches & SS_80STORE)) {
-        return 0x0; // TODO: no early return?
+        return floating_bus(cpu65_cycle_count);
     }
 
     softswitches &= ~(SS_80STORE|SS_TEXTRD|SS_TEXTWRT|SS_HGRRD|SS_HGRWRT);
@@ -596,13 +599,13 @@ GLUE_C_READ(iie_80store_off)
         video_setpage(1);
     }
 
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_80store_on)
 {
     if (softswitches & SS_80STORE) {
-        return 0x0; // TODO: no early return?
+        return floating_bus(cpu65_cycle_count);
     }
 
     softswitches |= SS_80STORE;
@@ -629,7 +632,7 @@ GLUE_C_READ(iie_80store_on)
 
     softswitches &= ~SS_SCREEN;
     video_setpage(0);
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_check_80store)
@@ -640,7 +643,7 @@ GLUE_C_READ(iie_check_80store)
 GLUE_C_READ(iie_ramrd_main)
 {
     if (!(softswitches & SS_RAMRD)) {
-        return 0x0; // TODO: no early return?
+        return floating_bus(cpu65_cycle_count);
     }
 
     softswitches &= ~SS_RAMRD;
@@ -657,13 +660,13 @@ GLUE_C_READ(iie_ramrd_main)
         base_hgrrd  = apple_ii_64k[0];
     }
 
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_ramrd_aux)
 {
     if (softswitches & SS_RAMRD) {
-        return 0x0; // TODO: no early return?
+        return floating_bus(cpu65_cycle_count);
     }
 
     softswitches |= SS_RAMRD;
@@ -680,7 +683,7 @@ GLUE_C_READ(iie_ramrd_aux)
         base_hgrrd  = apple_ii_64k[1];
     }
 
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_check_ramrd)
@@ -691,7 +694,7 @@ GLUE_C_READ(iie_check_ramrd)
 GLUE_C_READ(iie_ramwrt_main)
 {
     if (!(softswitches & SS_RAMWRT)) {
-        return 0x0; // TODO: no early return?
+        return floating_bus(cpu65_cycle_count);
     }
 
     softswitches &= ~SS_RAMWRT;
@@ -708,13 +711,13 @@ GLUE_C_READ(iie_ramwrt_main)
         base_hgrwrt  = apple_ii_64k[0];
     }
 
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_ramwrt_aux)
 {
     if (softswitches & SS_RAMWRT) {
-        return 0x0; // TODO: no early return?
+        return floating_bus(cpu65_cycle_count);
     }
 
     softswitches |= SS_RAMWRT;
@@ -731,7 +734,7 @@ GLUE_C_READ(iie_ramwrt_aux)
         base_hgrwrt  = apple_ii_64k[1];
     }
 
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_check_ramwrt)
@@ -743,7 +746,7 @@ GLUE_C_READ_ALTZP(iie_altzp_main)
 {
     if (!(softswitches & SS_ALTZP)) {
         /* NOTE : test if ALTZP already off - due to d000-bank issues it is *needed*, not just a shortcut */
-        return 0x0;
+        return floating_bus(cpu65_cycle_count);
     }
 
     softswitches &= ~SS_ALTZP;
@@ -759,14 +762,14 @@ GLUE_C_READ_ALTZP(iie_altzp_main)
         base_e000_wrt = language_card[0] - 0xE000;
     }
 
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ_ALTZP(iie_altzp_aux)
 {
     if (softswitches & SS_ALTZP) {
         /* NOTE : test if ALTZP already on - due to d000-bank issues it is *needed*, not just a shortcut */
-        return 0x0;
+        return floating_bus(cpu65_cycle_count);
     }
 
     softswitches |= SS_ALTZP;
@@ -774,7 +777,7 @@ GLUE_C_READ_ALTZP(iie_altzp_aux)
 
     _lc_to_auxmem();
 
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_check_altzp)
@@ -785,7 +788,7 @@ GLUE_C_READ(iie_check_altzp)
 GLUE_C_READ(iie_80col_off)
 {
     if (!(softswitches & SS_80COL)) {
-        return 0x0; // TODO: no early return?
+        return floating_bus(cpu65_cycle_count);
     }
 
     softswitches &= ~SS_80COL;
@@ -794,13 +797,13 @@ GLUE_C_READ(iie_80col_off)
         video_redraw();
     }
 
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_80col_on)
 {
     if (softswitches & SS_80COL) {
-        return 0x0;
+        return floating_bus(cpu65_cycle_count);
     }
 
     softswitches |= SS_80COL;
@@ -809,7 +812,7 @@ GLUE_C_READ(iie_80col_on)
         video_redraw();
     }
 
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_check_80col)
@@ -823,7 +826,7 @@ GLUE_C_READ(iie_altchar_off)
         softswitches &= ~SS_ALTCHAR;
         c_set_primary_char();
     }
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_altchar_on)
@@ -832,7 +835,7 @@ GLUE_C_READ(iie_altchar_on)
         softswitches |= SS_ALTCHAR;
         c_set_altchar();
     }
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_check_altchar)
@@ -860,22 +863,20 @@ GLUE_C_READ(iie_check_ioudis)
 
 GLUE_C_READ(iie_dhires_on)
 {
-    // FIXME : does this depend on IOUDIS?
     if (!(softswitches & SS_DHIRES)) {
         softswitches |= SS_DHIRES;
         video_redraw();
     }
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_dhires_off)
 {
-    // FIXME : does this depend on IOUDIS?
     if (softswitches & SS_DHIRES) {
         softswitches &= ~SS_DHIRES;
         video_redraw();
     }
-    return 0x0;
+    return floating_bus(cpu65_cycle_count);
 }
 
 GLUE_C_READ(iie_check_dhires)
@@ -949,16 +950,12 @@ GLUE_C_READ(iie_read_slot_expansion)
 {
     // HACK TODO FIXME : how does the expansion slot get referenced?  Need to handle other ROMs that might use this area
     // ... Also Need moar tests ...
+    if (ea == 0xCFFF) {
+        // disable expansion ROM
+    }
     return apple_ii_64k[1][ea];
 }
 
-GLUE_C_READ(iie_disable_slot_expansion)
-{
-    // HACK TODO FIXME : how does the expansion slot get referenced?  Need to handle other ROMs that might use this area
-    // ... Also Need moar tests ...
-    return 0x0;
-}
-
 // ----------------------------------------------------------------------------
 
 void debug_print_softwitches(void) {