switch internal/peripheral rom on CXROM flag

* fixes a bug where op_BRK doesn't work when Mockingboard installed
    * this is still hackish and hardcoded ... ultimately we need an interface to add/remove virtual peripherals

src/glue-prologue.h

@@ -15,7 +15,8 @@
  */
 
 #define __ASSEMBLY__
-#include <apple2.h>
+#include "apple2.h"
+#include "misc.h"
 
 #define GLUE_FIXED_READ(func,address)			\
 E(func)			movb	SN(address)(%edi),%al;  \
@@ -25,6 +26,16 @@ E(func)			movb	SN(address)(%edi),%al;  \
 E(func)			movb	%al,SN(address)(%edi);  \
 			ret;
 
+#define GLUE_BANK_MAYBEREAD(func,pointer) \
+E(func)                 testl   $SS_CXROM, SN(softswitches); \
+                        jnz     1f; \
+                        call    *SN(pointer); \
+                        ret; \
+1:                      addl    SN(pointer),%edi; \
+                        movb    (%edi),%al; \
+                        subl    SN(pointer),%edi; \
+                        ret;
+
 #define GLUE_BANK_READ(func,pointer) \
 E(func)			addl	SN(pointer),%edi;	\
 			movb	(%edi),%al;		\

src/glue.h

@@ -17,6 +17,7 @@
 #define GLUE_FIXED_READ(func,address)
 #define GLUE_FIXED_WRITE(func,address)
 #define GLUE_BANK_READ(func,pointer)
+#define GLUE_BANK_MAYBEREAD(func,pointer)
 #define GLUE_BANK_WRITE(func,pointer)
 #define GLUE_BANK_MAYBEWRITE(func,pointer)
 

src/memory.S

@@ -922,6 +922,8 @@ E(iie_check_c3rom)
 E(iie_cxrom_peripheral)
 		andl	$~SS_CXROM, SN(softswitches)
 		movl	$SN(apple_ii_64k), SN(base_cxrom)
+		movl	$SN(MB_Read), SN(base_c4rom)
+		movl	$SN(MB_Read), SN(base_c5rom) // HACK FIXME -- MB is hardcoded, what about Phasor?
 		testl	$SS_C3ROM, SN(softswitches)
 		jnz	1f
 		movl	$SN(apple_ii_64k), SN(base_c3rom)
@@ -931,6 +933,8 @@ E(iie_cxrom_internal)
 		orl	$SS_CXROM, SN(softswitches)
 		movl	$SN(apple_ii_64k)+BANK2, SN(base_cxrom)
 		movl	$SN(apple_ii_64k)+BANK2, SN(base_c3rom)
+		movl	$SN(apple_ii_64k)+BANK2, SN(base_c4rom)
+		movl	$SN(apple_ii_64k)+BANK2, SN(base_c5rom)
 		ret
 
 E(iie_check_cxrom)

src/misc.c

@@ -69,6 +69,8 @@ GLUE_BANK_READ(iie_read_ram_zpage_and_stack,base_stackzp)
 GLUE_BANK_WRITE(iie_write_ram_zpage_and_stack,base_stackzp)
 
 GLUE_BANK_READ(iie_read_slot3,base_c3rom)
+GLUE_BANK_MAYBEREAD(iie_read_slot4,base_c4rom)
+GLUE_BANK_MAYBEREAD(iie_read_slot5,base_c5rom)
 GLUE_BANK_READ(iie_read_slotx,base_cxrom)
 
 
@@ -220,7 +222,7 @@ void c_initialize_tables() {
             write_unmapped_softswitch;
     }
 
-    /* slot rom */
+    /* slot rom defaults */
     for (i = 0xC100; i < 0xD000; i++)
     {
         cpu65_vmem[i].r =
@@ -483,10 +485,22 @@ void c_initialize_tables() {
             iie_read_slot3;             /* slot 3 (80col) */
     }
 
-    for (i = 0xC400; i < 0xC800; i++)
+    for (i = 0xC400; i < 0xC500; i++)
     {
         cpu65_vmem[i].r =
-            iie_read_slotx;             /* slots 4 - 7 (x) */
+            iie_read_slot4;             /* slot 4 - MB or Phasor */
+    }
+
+    for (i = 0xC500; i < 0xC600; i++)
+    {
+        cpu65_vmem[i].r =
+            iie_read_slot5;             /* slot 5 - MB #2 */
+    }
+
+    for (i = 0xC600; i < 0xC800; i++)
+    {
+        cpu65_vmem[i].r =
+            iie_read_slotx;             /* slots 6 - 7 (x) */
     }
 
     for (i = 0xC800; i < 0xD000; i++)
@@ -662,6 +676,8 @@ void c_initialize_iie_switches() {
     base_hgrwrt= apple_ii_64k[0];
 
     base_c3rom = apple_ii_64k[1];               /* c3rom internal */
+    base_c4rom = apple_ii_64k[1];               /* c4rom internal */
+    base_c5rom = apple_ii_64k[1];               /* c5rom internal */
     c8rom_offset = 0x10000;                     /* c8rom internal */
     base_cxrom = apple_ii_64k[0];               /* cxrom peripheral */
 }

src/misc.h

@@ -194,6 +194,8 @@ iie_write_screen_hole_hires_page0(),
 iie_read_ram_zpage_and_stack(),
 iie_write_ram_zpage_and_stack(),
 iie_read_slot3(),
+iie_read_slot4(),
+iie_read_slot5(),
 iie_read_slotx(),
 iie_read_slot_expansion(),
 iie_disable_slot_expansion(),

src/mockingboard.c

@@ -1945,7 +1945,7 @@ static void RegisterIoHandler(UINT uSlot, iofunction IOReadC0, iofunction IOWrit
     base_addr = 0xC000 + (uSlot<<8); // uSlot == 4 => 0xC400 , uSlot == 5 => 0xC500
     for (unsigned int i = 0; i < 0x100; i++)
     {
-        cpu65_vmem[base_addr+i].r = IOReadCx;
+        //cpu65_vmem[base_addr+i].r = IOReadCx; -- CANNOT DO THIS HERE -- DEPENDS ON cxrom softswitch
         cpu65_vmem[base_addr+i].w = IOWriteCx;
     }
 }