Apple-2-Tools/apple2ix
1
0
Fork 0
mirror of https://github.com/mauiaaron/apple2.git synced 2025-01-11 14:30:08 +00:00
Code Issues Projects Releases Wiki Activity

Refactoring to isolate full-length registers

Browse Source
This commit is contained in:
Aaron Culliney 2014-06-07 12:06:29 -07:00
parent d7685a2163
commit 32f53a4e57
3 changed files with 82 additions and 75 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
src/x86/cpu-regs.h
View File

@ -13,15 +13,22 @@
#define X_Reg %bl /* 6502 X register in %bl */ #define X_Reg %bl /* 6502 X register in %bl */
#define Y_Reg %bh /* 6502 Y register in %bh */ #define Y_Reg %bh /* 6502 Y register in %bh */
#define XY_Reg_X %ebx /* 6502 X&Y flags */
#define A_Reg %cl /* 6502 A register in %cl */ #define A_Reg %cl /* 6502 A register in %cl */
#define F_Reg %ch /* 6502 flags in %ch */ #define F_Reg %ch /* 6502 flags in %ch */
#define AF_Reg_X %ecx /* 6502 F&A flags */
#define SP_Reg_L %dl /* 6502 Stack pointer low */ #define SP_Reg_L %dl /* 6502 Stack pointer low */
#define SP_Reg_H %dh /* 6502 Stack pointer high */ #define SP_Reg_H %dh /* 6502 Stack pointer high */
#define SP_Reg_X %edx /* 6502 Stack pointer */
#define PC_Reg %si /* 6502 Program Counter */ #define PC_Reg %si /* 6502 Program Counter */
#define PC_Reg_X %esi /* 6502 Program Counter */
#define EffectiveAddr %di /* Effective address */ #define EffectiveAddr %di /* Effective address */
#define EffectiveAddr_X %edi /* Effective address */
#if __LP64__
# error not ready
#else
# define SZ_PTR 4
# define _XAX %eax /* scratch */
# define XY_Reg_X %ebx /* 6502 X&Y flags */
# define AF_Reg_X %ecx /* 6502 F&A flags */
# define SP_Reg_X %edx /* 6502 Stack pointer */
# define PC_Reg_X %esi /* 6502 Program Counter */
# define EffectiveAddr_X %edi /* Effective address */
#endif

118
src/x86/cpu.S
View File

@ -31,51 +31,51 @@
#define GetFromPC_B \ #define GetFromPC_B \
movl PC_Reg_X, EffectiveAddr_X; \ movl PC_Reg_X, EffectiveAddr_X; \
incw PC_Reg; \ incw PC_Reg; \
call *SN(cpu65_vmem)(,EffectiveAddr_X,8); call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2);
#define GetFromPC_W \ #define GetFromPC_W \
movl PC_Reg_X, EffectiveAddr_X; \ movl PC_Reg_X, EffectiveAddr_X; \
incw EffectiveAddr; \ incw EffectiveAddr; \
addw $2, PC_Reg; \ addw $2, PC_Reg; \
call *SN(cpu65_vmem)(,EffectiveAddr_X,8); \ call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2); \
decw EffectiveAddr; \ decw EffectiveAddr; \
movb %al, %ah; \ movb %al, %ah; \
call *SN(cpu65_vmem)(,EffectiveAddr_X,8); call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2);
#define JumpNextInstruction \ #define JumpNextInstruction \
GetFromPC_B \ GetFromPC_B \
movb %al, DebugCurrOpcode; \ movb %al, DebugCurrOpcode; \
movb $0, DebugCycleCount; \ movb $0, DebugCycleCount; \
movb $0, DebugCurrRW; \ movb $0, DebugCurrRW; \
jmp *cpu65__opcodes(,%eax,4); jmp *cpu65__opcodes(,_XAX,SZ_PTR);
#define GetFromEA_B \ #define GetFromEA_B \
orb $1, DebugCurrRW; \ orb $1, DebugCurrRW; \
call *SN(cpu65_vmem)(,EffectiveAddr_X,8); call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2);
#define GetFromEA_W \ #define GetFromEA_W \
incw EffectiveAddr; \ incw EffectiveAddr; \
call *SN(cpu65_vmem)(,EffectiveAddr_X,8); \ call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2); \
decw EffectiveAddr; \ decw EffectiveAddr; \
movb %al, %ah; \ movb %al, %ah; \
call *SN(cpu65_vmem)(,EffectiveAddr_X,8); call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2);
#define PutToEA_B \ #define PutToEA_B \
orb $2, DebugCurrRW; \ orb $2, DebugCurrRW; \
movb %al, DebugCurrByte; \ movb %al, DebugCurrByte; \
call *SN(cpu65_vmem)+4(,EffectiveAddr_X,8); call *SN(cpu65_vmem)+4(,EffectiveAddr_X,SZ_PTR*2);
#define GetFromMem_B(x) \ #define GetFromMem_B(x) \
movl x, EffectiveAddr_X; \ movl x, EffectiveAddr_X; \
call *SN(cpu65_vmem)(,EffectiveAddr_X,8); call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2);
#define GetFromMem_W(x) \ #define GetFromMem_W(x) \
movl x, EffectiveAddr_X; \ movl x, EffectiveAddr_X; \
incw EffectiveAddr; \ incw EffectiveAddr; \
call *SN(cpu65_vmem)(,EffectiveAddr_X,8); \ call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2); \
decw EffectiveAddr; \ decw EffectiveAddr; \
movb %al, %ah; \ movb %al, %ah; \
call *SN(cpu65_vmem)(,EffectiveAddr_X,8); call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2);
#define Continue \ #define Continue \
jmp continue; jmp continue;
@ -84,12 +84,12 @@
* Save CPU state when returning from being called from C * Save CPU state when returning from being called from C
*/ */
#define SaveState \ #define SaveState \
xorl %eax, %eax; \ xorl _XAX, _XAX; \
movw EffectiveAddr, DebugCurrEA; \ movw EffectiveAddr, DebugCurrEA; \
movw PC_Reg, SN(cpu65_current); \ movw PC_Reg, SN(cpu65_current); \
movb A_Reg, SN(cpu65_current)+2; \ movb A_Reg, SN(cpu65_current)+2; \
movb F_Reg, %al; \ movb F_Reg, %al; \
movb SN(cpu65_flags_encode)(,%eax,1), %al; \ movb SN(cpu65_flags_encode)(,_XAX,1), %al; \
movb %al, SN(cpu65_current)+3; \ movb %al, SN(cpu65_current)+3; \
movb X_Reg, SN(cpu65_current)+4; \ movb X_Reg, SN(cpu65_current)+4; \
movb Y_Reg, SN(cpu65_current)+5; \ movb Y_Reg, SN(cpu65_current)+5; \
@ -106,7 +106,7 @@
* it, else aux-stack using programs will crash when debugged.) * it, else aux-stack using programs will crash when debugged.)
*/ */
#define RestoreState \ #define RestoreState \
xorl %eax, %eax; \ xorl _XAX, _XAX; \
xorl %ebx, %ebx; \ xorl %ebx, %ebx; \
xorl %ecx, %ecx; \ xorl %ecx, %ecx; \
movl $0x0100, SP_Reg_X; \ movl $0x0100, SP_Reg_X; \
@ -116,14 +116,14 @@
movw SN(cpu65_current), PC_Reg; \ movw SN(cpu65_current), PC_Reg; \
movb SN(cpu65_current)+2, A_Reg; \ movb SN(cpu65_current)+2, A_Reg; \
movb SN(cpu65_current)+3, %al; \ movb SN(cpu65_current)+3, %al; \
movb SN(cpu65_flags_decode)(,%eax,1), F_Reg; \ movb SN(cpu65_flags_decode)(,_XAX,1), F_Reg; \
movb SN(cpu65_current)+4, X_Reg; \ movb SN(cpu65_current)+4, X_Reg; \
movb SN(cpu65_current)+5, Y_Reg; \ movb SN(cpu65_current)+5, Y_Reg; \
movb SN(cpu65_current)+6, SP_Reg_L; \ movb SN(cpu65_current)+6, SP_Reg_L; \
movl SN(base_stackzp), %eax; \ movl SN(base_stackzp), _XAX; \
subl $SN(apple_ii_64k), %eax; /* $ for pointer addr */ \ subl $SN(apple_ii_64k), _XAX; /* $ for pointer addr */ \
orl %eax, SP_Reg_X; \ orl _XAX, SP_Reg_X; \
xorl %eax, %eax; xorl _XAX, _XAX;
#define BranchXCycles \ #define BranchXCycles \
incb DebugCycleCount; /* +1 branch taken */ \ incb DebugCycleCount; /* +1 branch taken */ \
@ -171,8 +171,8 @@
*/ */
#define FlagNVZC \ #define FlagNVZC \
pushfl; \ pushfl; \
popl %eax; \ popl _XAX; \
andl $0x08C1,%eax; \ andl $0x08C1,_XAX; \
andb $~(N_Flag|V_Flag|Z_Flag|C_Flag), F_Reg; \ andb $~(N_Flag|V_Flag|Z_Flag|C_Flag), F_Reg; \
orb %ah, F_Reg; \ orb %ah, F_Reg; \
orb %al, F_Reg; orb %al, F_Reg;
@ -191,13 +191,13 @@
/* Absolute Addressing - the second byte of the instruction is the low /* Absolute Addressing - the second byte of the instruction is the low
order address, and the third byte is the high order byte. */ order address, and the third byte is the high order byte. */
#define GetAbs GetFromPC_W; \ #define GetAbs GetFromPC_W; \
movl %eax, EffectiveAddr_X; movl _XAX, EffectiveAddr_X;
/* Zero Page Addressing - the second byte of the instruction is an /* Zero Page Addressing - the second byte of the instruction is an
address on the zero page */ address on the zero page */
#define GetZPage \ #define GetZPage \
GetFromPC_B; \ GetFromPC_B; \
movl %eax, EffectiveAddr_X; movl _XAX, EffectiveAddr_X;
/* Zero Page Indexed Addressing - The effective address is calculated by /* Zero Page Indexed Addressing - The effective address is calculated by
adding the second byte to the contents of the index register. Due adding the second byte to the contents of the index register. Due
@ -207,13 +207,13 @@
#define GetZPage_X \ #define GetZPage_X \
GetFromPC_B; \ GetFromPC_B; \
addb X_Reg, %al; \ addb X_Reg, %al; \
movl %eax, EffectiveAddr_X; movl _XAX, EffectiveAddr_X;
// HACK IS THIS EVER USED? // HACK IS THIS EVER USED?
#define GetZPage_Y \ #define GetZPage_Y \
GetFromPC_B; \ GetFromPC_B; \
addb Y_Reg, %al; \ addb Y_Reg, %al; \
movl %eax, EffectiveAddr_X; movl _XAX, EffectiveAddr_X;
/* Absolute Indexed Addressing - The effective address is formed by /* Absolute Indexed Addressing - The effective address is formed by
adding the contents of X or Y to the address contained in the adding the contents of X or Y to the address contained in the
@ -227,11 +227,11 @@
#define GetAbs_X \ #define GetAbs_X \
_GetAbs_X \ _GetAbs_X \
incb DebugCycleCount; /* +1 cycle on page boundary */ \ incb DebugCycleCount; /* +1 cycle on page boundary */ \
9: movl %eax, EffectiveAddr_X; 9: movl _XAX, EffectiveAddr_X;
#define GetAbs_X_STx \ #define GetAbs_X_STx \
_GetAbs_X \ _GetAbs_X \
9: movl %eax, EffectiveAddr_X; 9: movl _XAX, EffectiveAddr_X;
#define _GetAbs_Y \ #define _GetAbs_Y \
GetFromPC_W; \ GetFromPC_W; \
@ -242,11 +242,11 @@
#define GetAbs_Y \ #define GetAbs_Y \
_GetAbs_Y \ _GetAbs_Y \
incb DebugCycleCount; /* +1 cycle on page boundary */ \ incb DebugCycleCount; /* +1 cycle on page boundary */ \
9: movl %eax, EffectiveAddr_X; 9: movl _XAX, EffectiveAddr_X;
#define GetAbs_Y_STA \ #define GetAbs_Y_STA \
_GetAbs_Y \ _GetAbs_Y \
9: movl %eax, EffectiveAddr_X; 9: movl _XAX, EffectiveAddr_X;
/* Absolute Indirect Addressing - The second and third bytes of the /* Absolute Indirect Addressing - The second and third bytes of the
instruction are the low and high bytes of an address, respectively. instruction are the low and high bytes of an address, respectively.
@ -257,7 +257,7 @@
* without the macro) * without the macro)
*/ */
#define GetInd GetFromPC_W; \ #define GetInd GetFromPC_W; \
GetFromMem_W(%eax) GetFromMem_W(_XAX)
/* Zero Page Indirect Addressing (65c02) - The second byte of the /* Zero Page Indirect Addressing (65c02) - The second byte of the
instruction points to a memory location on page zero containing the instruction points to a memory location on page zero containing the
@ -266,13 +266,13 @@
#define GetIndZPage \ #define GetIndZPage \
GetFromPC_B; \ GetFromPC_B; \
incb %al; \ incb %al; \
movl %eax, EffectiveAddr_X; \ movl _XAX, EffectiveAddr_X; \
GetFromEA_B; \ GetFromEA_B; \
movb %al, %ah; \ movb %al, %ah; \
decl EffectiveAddr_X; \ decl EffectiveAddr_X; \
andl $0xFF, EffectiveAddr_X; \ andl $0xFF, EffectiveAddr_X; \
GetFromEA_B; \ GetFromEA_B; \
movl %eax, EffectiveAddr_X; movl _XAX, EffectiveAddr_X;
/* Zero Page Indexed Indirect Addressing - The second byte is added to /* Zero Page Indexed Indirect Addressing - The second byte is added to
the contents of the X index register; the carry is discarded. The the contents of the X index register; the carry is discarded. The
@ -285,13 +285,13 @@
GetFromPC_B; \ GetFromPC_B; \
addb X_Reg, %al; \ addb X_Reg, %al; \
incb %al; \ incb %al; \
movl %eax, EffectiveAddr_X; \ movl _XAX, EffectiveAddr_X; \
GetFromEA_B; \ GetFromEA_B; \
movb %al, %ah; \ movb %al, %ah; \
decl EffectiveAddr_X; \ decl EffectiveAddr_X; \
andl $0xFF, EffectiveAddr_X; \ andl $0xFF, EffectiveAddr_X; \
GetFromEA_B; \ GetFromEA_B; \
movl %eax, EffectiveAddr_X; movl _XAX, EffectiveAddr_X;
/* Indirect Indexed Addressing - The second byte of the instruction /* Indirect Indexed Addressing - The second byte of the instruction
points to a memory location in page zero. The contents of this points to a memory location in page zero. The contents of this
@ -303,7 +303,7 @@
#define _GetIndZPage_Y \ #define _GetIndZPage_Y \
GetFromPC_B; \ GetFromPC_B; \
incb %al; \ incb %al; \
movl %eax, EffectiveAddr_X; \ movl _XAX, EffectiveAddr_X; \
GetFromEA_B; \ GetFromEA_B; \
movb %al, %ah; \ movb %al, %ah; \
decl EffectiveAddr_X; \ decl EffectiveAddr_X; \
@ -316,12 +316,12 @@
_GetIndZPage_Y \ _GetIndZPage_Y \
adcb $0, %ah; \ adcb $0, %ah; \
incb DebugCycleCount; /* +1 cycle on page boundary */ \ incb DebugCycleCount; /* +1 cycle on page boundary */ \
9: movl %eax, EffectiveAddr_X; 9: movl _XAX, EffectiveAddr_X;
#define GetIndZPage_Y_STA \ #define GetIndZPage_Y_STA \
_GetIndZPage_Y \ _GetIndZPage_Y \
adcb $0, %ah; \ adcb $0, %ah; \
9: movl %eax, EffectiveAddr_X; 9: movl _XAX, EffectiveAddr_X;
#define DoADC_b GetFromEA_B \ #define DoADC_b GetFromEA_B \
bt $C_Flag_Bit, AF_Reg_X; \ bt $C_Flag_Bit, AF_Reg_X; \
@ -444,9 +444,9 @@
#define DoROR GetFromEA_B \ #define DoROR GetFromEA_B \
movb F_Reg, %ah; \ movb F_Reg, %ah; \
rorl $1, %eax; \ rorl $1, _XAX; \
orb %al, %al; \ orb %al, %al; \
btr $31, %eax; \ btr $31, _XAX; \
FlagNZC \ FlagNZC \
PutToEA_B PutToEA_B
@ -863,9 +863,9 @@ E(op_BRK)
Push(%ah) Push(%ah)
Push(%al) Push(%al)
orb $(B_Flag|X_Flag), F_Reg orb $(B_Flag|X_Flag), F_Reg
xorl %eax,%eax xorl _XAX,_XAX
movb F_Reg, %al movb F_Reg, %al
movb SN(cpu65_flags_encode)(,%eax,1), %al movb SN(cpu65_flags_encode)(,_XAX,1), %al
Push(%al) Push(%al)
orb $I_Flag, F_Reg orb $I_Flag, F_Reg
movw $0xFFFE, EffectiveAddr // ROM interrupt vector movw $0xFFFE, EffectiveAddr // ROM interrupt vector
@ -1198,14 +1198,14 @@ E(op_JMP_abs)
Continue Continue
E(op_JMP_ind) // 0x6c E(op_JMP_ind) // 0x6c
xorl %eax, %eax xorl _XAX, _XAX
GetFromPC_B GetFromPC_B
xchgb %al, %ah xchgb %al, %ah
GetFromPC_B GetFromPC_B
xchgb %al, %ah xchgb %al, %ah
cmpb $0xFF, %al cmpb $0xFF, %al
je jmp_special je jmp_special
GetFromMem_W(%eax) GetFromMem_W(_XAX)
movw %ax, PC_Reg movw %ax, PC_Reg
Continue Continue
jmp_special: // see JMP indirect note in _Understanding the Apple IIe_ 4-25 jmp_special: // see JMP indirect note in _Understanding the Apple IIe_ 4-25
@ -1222,7 +1222,7 @@ jmp_special: // see JMP indirect note in _Understanding the Apple IIe_ 4-25
E(op_JMP_abs_ind_x) E(op_JMP_abs_ind_x)
GetFromPC_W GetFromPC_W
movw %ax, EffectiveAddr movw %ax, EffectiveAddr
movzbl X_Reg, %eax movzbl X_Reg, _XAX
addw %ax, EffectiveAddr addw %ax, EffectiveAddr
GetFromMem_W(EffectiveAddr_X) GetFromMem_W(EffectiveAddr_X)
movw %ax, PC_Reg movw %ax, PC_Reg
@ -1459,7 +1459,7 @@ E(op_PHA) // 0x48
E(op_PHP) // 0x08 E(op_PHP) // 0x08
movb F_Reg, %al movb F_Reg, %al
movb SN(cpu65_flags_encode)(,%eax,1), %al movb SN(cpu65_flags_encode)(,_XAX,1), %al
Push(%al) Push(%al)
Continue Continue
@ -1496,9 +1496,9 @@ E(op_PLA) // 0x68
---------------------------------- */ ---------------------------------- */
E(op_PLP) // 0x28 E(op_PLP) // 0x28
xorl %eax, %eax xorl _XAX, _XAX
Pop(%al) Pop(%al)
movb SN(cpu65_flags_decode)(,%eax,1), F_Reg movb SN(cpu65_flags_decode)(,_XAX,1), F_Reg
orb $(B_Flag|X_Flag), F_Reg orb $(B_Flag|X_Flag), F_Reg
Continue Continue
@ -1590,9 +1590,9 @@ E(op_ROR_abs_x) // 0x7e
---------------------------------- */ ---------------------------------- */
E(op_RTI) // 0x40 E(op_RTI) // 0x40
xorl %eax, %eax xorl _XAX, _XAX
Pop(%al) Pop(%al)
movb SN(cpu65_flags_decode)(,%eax,1), F_Reg movb SN(cpu65_flags_decode)(,_XAX,1), F_Reg
orb $(B_Flag|X_Flag), F_Reg orb $(B_Flag|X_Flag), F_Reg
Pop(%al) Pop(%al)
Pop(%ah) Pop(%ah)
@ -2010,17 +2010,17 @@ E(op_WAI_65c02)
------------------------------------------------------------------------- */ ------------------------------------------------------------------------- */
continue: continue:
xorl %eax, %eax xorl _XAX, _XAX
movb DebugCurrOpcode, %al movb DebugCurrOpcode, %al
movb SN(cpu65__opcycles)(,%eax,1), %al movb SN(cpu65__opcycles)(,_XAX,1), %al
addb DebugCycleCount, %al addb DebugCycleCount, %al
movb %al, DebugCycleCount movb %al, DebugCycleCount
addw %ax, SN(cpu65_cycle_count) addw %ax, SN(cpu65_cycle_count)
subl %eax, SN(gc_cycles_timer_0) subl _XAX, SN(gc_cycles_timer_0)
subl %eax, SN(gc_cycles_timer_1) subl _XAX, SN(gc_cycles_timer_1)
subw %ax, SN(cpu65_cycles_to_execute) subw %ax, SN(cpu65_cycles_to_execute)
jle exit_cpu65_run jle exit_cpu65_run
continue1: xorl %eax, %eax continue1: xorl _XAX, _XAX
orb SN(cpu65__signal), %al orb SN(cpu65__signal), %al
jnz exception jnz exception
1: JumpNextInstruction 1: JumpNextInstruction
@ -2051,9 +2051,9 @@ ex_irq: testb $I_Flag, F_Reg // Already interrupt
Push(%ah) Push(%ah)
Push(%al) Push(%al)
orb $X_Flag, F_Reg orb $X_Flag, F_Reg
xorl %eax,%eax xorl _XAX,_XAX
movb F_Reg, %al movb F_Reg, %al
movb SN(cpu65_flags_encode)(,%eax,1), %al movb SN(cpu65_flags_encode)(,_XAX,1), %al
Push(%al) Push(%al)
orb $(B_Flag | I_Flag), F_Reg orb $(B_Flag | I_Flag), F_Reg
//andb $~D_Flag, F_Reg // AppleWin clears Decimal bit? //andb $~D_Flag, F_Reg // AppleWin clears Decimal bit?
@ -2079,7 +2079,7 @@ E(cpu65_run)
* *
* Note: dependent on assignment of registers * Note: dependent on assignment of registers
*/ */
xorl %eax, %eax xorl _XAX, _XAX
xorl %ebx, %ebx xorl %ebx, %ebx
xorl %ecx, %ecx xorl %ecx, %ecx
xorl %esi, %esi xorl %esi, %esi
@ -2104,8 +2104,8 @@ E(cpu65_direct_write)
/* NB: dependent on register choices */ /* NB: dependent on register choices */
pushl %edi pushl %edi
movl 8(%esp),%edi movl 8(%esp),%edi
movl 12(%esp),%eax movl 12(%esp),_XAX
call *SN(cpu65_vmem)+4(,EffectiveAddr_X,8) call *SN(cpu65_vmem)+4(,EffectiveAddr_X,SZ_PTR*2)
popl %edi popl %edi
ret ret

22
src/x86/glue-prologue.h
View File

@ -59,13 +59,13 @@ E(func) addl SN(pointer),EffectiveAddr_X; \
// TODO FIXME : implement CDECL prologue/epilogues... // TODO FIXME : implement CDECL prologue/epilogues...
#define GLUE_C_WRITE(func) \ #define GLUE_C_WRITE(func) \
E(func) pushl %eax; \ E(func) pushl _XAX; \
pushl XY_Reg_X; \ pushl XY_Reg_X; \
pushl AF_Reg_X; \ pushl AF_Reg_X; \
pushl SP_Reg_X; \ pushl SP_Reg_X; \
pushl PC_Reg_X; \ pushl PC_Reg_X; \
andl $0xff,%eax; \ andl $0xff,_XAX; \
pushl %eax; \ pushl _XAX; \
pushl EffectiveAddr_X; \ pushl EffectiveAddr_X; \
call SN(c_##func); \ call SN(c_##func); \
popl %edx; /* dummy */ \ popl %edx; /* dummy */ \
@ -74,7 +74,7 @@ E(func) pushl %eax; \
popl SP_Reg_X; \ popl SP_Reg_X; \
popl AF_Reg_X; \ popl AF_Reg_X; \
popl XY_Reg_X; \ popl XY_Reg_X; \
popl %eax; \ popl _XAX; \
ret; ret;
// TODO FIXME : implement CDECL prologue/epilogues... // TODO FIXME : implement CDECL prologue/epilogues...
@ -83,12 +83,12 @@ E(func) pushl XY_Reg_X; \
pushl AF_Reg_X; \ pushl AF_Reg_X; \
pushl SP_Reg_X; \ pushl SP_Reg_X; \
pushl PC_Reg_X; \ pushl PC_Reg_X; \
pushl %eax; /* HACK: works around mysterious issue with generated mov(%eax), %eax ... */ \ pushl _XAX; /* HACK: works around mysterious issue with generated mov(_XAX), _XAX ... */ \
pushl EffectiveAddr_X; \ pushl EffectiveAddr_X; \
call SN(c_##func); \ call SN(c_##func); \
popl %edx; /* dummy */ \ popl %edx; /* dummy */ \
movb %al, %dl; \ movb %al, %dl; \
popl %eax; /* ... ugh */ \ popl _XAX; /* ... ugh */ \
movb %dl, %al; \ movb %dl, %al; \
popl PC_Reg_X; \ popl PC_Reg_X; \
popl SP_Reg_X; \ popl SP_Reg_X; \
@ -101,11 +101,11 @@ E(func) pushl XY_Reg_X; \
#define GLUE_C_READ(FUNC) _GLUE_C_READ(FUNC) #define GLUE_C_READ(FUNC) _GLUE_C_READ(FUNC)
#define GLUE_C_READ_ALTZP(FUNC) _GLUE_C_READ(FUNC, \ #define GLUE_C_READ_ALTZP(FUNC) _GLUE_C_READ(FUNC, \
pushl %eax; \ pushl _XAX; \
andl $0xFFFF, SP_Reg_X; \ andl $0xFFFF, SP_Reg_X; \
movl SN(base_stackzp), %eax; \ movl SN(base_stackzp), _XAX; \
subl $SN(apple_ii_64k), %eax; \ subl $SN(apple_ii_64k), _XAX; \
orl %eax, SP_Reg_X; \ orl _XAX, SP_Reg_X; \
popl %eax; \ popl _XAX; \
) )