mirror of
https://github.com/mauiaaron/apple2.git
synced 2024-12-23 11:31:41 +00:00
Branch tests and misc tweaks
This commit is contained in:
Aaron Culliney
parent
d481d59851
commit
442915b9cb
@ -22,7 +22,8 @@
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#define fV V_Flag_6502 // o[V]erflow
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#define fN N_Flag_6502 // [N]egative
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#define TEST_LOC 0x1f00
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#define TEST_LOC 0x1f82
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#define TEST_LOC_LO 0x82
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#define RW_NONE 0x0
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#define RW_READ 0x1
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@ -1080,7 +1081,6 @@ TEST test_ASL_abs_x(uint8_t regA, uint8_t val, uint8_t regX, uint8_t lobyte, uin
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uint16_t addrs = lobyte | (hibyte<<8);
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addrs = addrs + regX;
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if ((uint8_t)((addrs>>8)&0xff) != (uint8_t)hibyte) {
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fprintf(stderr, "CROSS PG BOUNDARY\n");
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++cycle_count;
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}
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apple_ii_64k[0][addrs] = val;
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@ -1112,6 +1112,417 @@ TEST test_ASL_abs_x(uint8_t regA, uint8_t val, uint8_t regX, uint8_t lobyte, uin
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PASS();
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}
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// ----------------------------------------------------------------------------
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// Branch instructions
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TEST test_BCC(int8_t off, bool flag, uint16_t addrs) {
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HEADER0();
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cpu65_current.pc = addrs;
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flags |= flag ? fC : 0;
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uint8_t cycle_count = 2;
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uint16_t newpc = 0xffff;
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if (flag) {
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newpc = addrs+2;
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} else {
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newpc = addrs+2+off;
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++cycle_count;
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if ((newpc&0xFF00) != (addrs&0xFF00)) {
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++cycle_count;
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}
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}
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apple_ii_64k[0][addrs+0] = 0x90;
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apple_ii_64k[0][addrs+1] = off;
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apple_ii_64k[0][addrs+2] = (uint8_t)random();
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cpu65_current.a = 0xed;
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cpu65_current.x = 0xde;
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cpu65_current.y = 0x05;
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cpu65_current.sp = 0x81;
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cpu65_current.f = flags;
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cpu65_run();
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ASSERT(cpu65_current.pc == newpc);
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ASSERT(cpu65_current.a == 0xed);
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ASSERT(cpu65_current.x == 0xde);
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ASSERT(cpu65_current.y == 0x05);
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ASSERT(cpu65_current.sp == 0x81);
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ASSERT(cpu65_current.f == flags);
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ASSERT(cpu65_debug.ea == addrs+1);
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ASSERT(cpu65_debug.d == 0xff);
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ASSERT(cpu65_debug.rw == 0);
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ASSERT(cpu65_debug.opcode == 0x90);
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ASSERT(cpu65_debug.opcycles == cycle_count);
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PASS();
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}
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TEST test_BCS(int8_t off, bool flag, uint16_t addrs) {
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HEADER0();
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cpu65_current.pc = addrs;
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flags |= flag ? fC : 0;
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uint8_t cycle_count = 2;
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uint16_t newpc = 0xffff;
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if (!flag) {
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newpc = addrs+2;
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} else {
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newpc = addrs+2+off;
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++cycle_count;
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if ((newpc&0xFF00) != (addrs&0xFF00)) {
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++cycle_count;
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}
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}
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apple_ii_64k[0][addrs+0] = 0xB0;
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apple_ii_64k[0][addrs+1] = off;
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apple_ii_64k[0][addrs+2] = (uint8_t)random();
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cpu65_current.a = 0xed;
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cpu65_current.x = 0xde;
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cpu65_current.y = 0x05;
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cpu65_current.sp = 0x81;
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cpu65_current.f = flags;
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cpu65_run();
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ASSERT(cpu65_current.pc == newpc);
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ASSERT(cpu65_current.a == 0xed);
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ASSERT(cpu65_current.x == 0xde);
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ASSERT(cpu65_current.y == 0x05);
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ASSERT(cpu65_current.sp == 0x81);
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ASSERT(cpu65_current.f == flags);
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ASSERT(cpu65_debug.ea == addrs+1);
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ASSERT(cpu65_debug.d == 0xff);
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ASSERT(cpu65_debug.rw == 0);
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ASSERT(cpu65_debug.opcode == 0xB0);
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ASSERT(cpu65_debug.opcycles == cycle_count);
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PASS();
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}
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TEST test_BEQ(int8_t off, bool flag, uint16_t addrs) {
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HEADER0();
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cpu65_current.pc = addrs;
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flags |= flag ? fZ : 0;
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uint8_t cycle_count = 2;
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uint16_t newpc = 0xffff;
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if (!flag) {
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newpc = addrs+2;
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} else {
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newpc = addrs+2+off;
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++cycle_count;
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if ((newpc&0xFF00) != (addrs&0xFF00)) {
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++cycle_count;
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}
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}
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apple_ii_64k[0][addrs+0] = 0xF0;
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apple_ii_64k[0][addrs+1] = off;
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apple_ii_64k[0][addrs+2] = (uint8_t)random();
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cpu65_current.a = 0xed;
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cpu65_current.x = 0xde;
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cpu65_current.y = 0x05;
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cpu65_current.sp = 0x81;
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cpu65_current.f = flags;
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cpu65_run();
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ASSERT(cpu65_current.pc == newpc);
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ASSERT(cpu65_current.a == 0xed);
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ASSERT(cpu65_current.x == 0xde);
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ASSERT(cpu65_current.y == 0x05);
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ASSERT(cpu65_current.sp == 0x81);
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ASSERT(cpu65_current.f == flags);
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ASSERT(cpu65_debug.ea == addrs+1);
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ASSERT(cpu65_debug.d == 0xff);
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ASSERT(cpu65_debug.rw == 0);
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ASSERT(cpu65_debug.opcode == 0xF0);
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ASSERT(cpu65_debug.opcycles == cycle_count);
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PASS();
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}
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TEST test_BNE(int8_t off, bool flag, uint16_t addrs) {
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HEADER0();
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cpu65_current.pc = addrs;
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flags |= flag ? fZ : 0;
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uint8_t cycle_count = 2;
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uint16_t newpc = 0xffff;
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if (flag) {
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newpc = addrs+2;
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} else {
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newpc = addrs+2+off;
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++cycle_count;
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if ((newpc&0xFF00) != (addrs&0xFF00)) {
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++cycle_count;
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}
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}
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apple_ii_64k[0][addrs+0] = 0xD0;
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apple_ii_64k[0][addrs+1] = off;
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apple_ii_64k[0][addrs+2] = (uint8_t)random();
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cpu65_current.a = 0xed;
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cpu65_current.x = 0xde;
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cpu65_current.y = 0x05;
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cpu65_current.sp = 0x81;
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cpu65_current.f = flags;
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cpu65_run();
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ASSERT(cpu65_current.pc == newpc);
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ASSERT(cpu65_current.a == 0xed);
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ASSERT(cpu65_current.x == 0xde);
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ASSERT(cpu65_current.y == 0x05);
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ASSERT(cpu65_current.sp == 0x81);
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ASSERT(cpu65_current.f == flags);
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ASSERT(cpu65_debug.ea == addrs+1);
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ASSERT(cpu65_debug.d == 0xff);
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ASSERT(cpu65_debug.rw == 0);
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ASSERT(cpu65_debug.opcode == 0xD0);
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ASSERT(cpu65_debug.opcycles == cycle_count);
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PASS();
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}
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TEST test_BMI(int8_t off, bool flag, uint16_t addrs) {
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HEADER0();
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cpu65_current.pc = addrs;
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flags |= flag ? fN : 0;
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uint8_t cycle_count = 2;
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uint16_t newpc = 0xffff;
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if (!flag) {
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newpc = addrs+2;
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} else {
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newpc = addrs+2+off;
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++cycle_count;
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if ((newpc&0xFF00) != (addrs&0xFF00)) {
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++cycle_count;
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}
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}
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apple_ii_64k[0][addrs+0] = 0x30;
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apple_ii_64k[0][addrs+1] = off;
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apple_ii_64k[0][addrs+2] = (uint8_t)random();
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cpu65_current.a = 0xed;
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cpu65_current.x = 0xde;
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cpu65_current.y = 0x05;
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cpu65_current.sp = 0x81;
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cpu65_current.f = flags;
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cpu65_run();
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ASSERT(cpu65_current.pc == newpc);
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ASSERT(cpu65_current.a == 0xed);
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ASSERT(cpu65_current.x == 0xde);
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ASSERT(cpu65_current.y == 0x05);
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ASSERT(cpu65_current.sp == 0x81);
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ASSERT(cpu65_current.f == flags);
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ASSERT(cpu65_debug.ea == addrs+1);
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ASSERT(cpu65_debug.d == 0xff);
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ASSERT(cpu65_debug.rw == 0);
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ASSERT(cpu65_debug.opcode == 0x30);
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ASSERT(cpu65_debug.opcycles == cycle_count);
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PASS();
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}
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TEST test_BPL(int8_t off, bool flag, uint16_t addrs) {
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HEADER0();
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cpu65_current.pc = addrs;
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flags |= flag ? fN : 0;
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uint8_t cycle_count = 2;
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uint16_t newpc = 0xffff;
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if (flag) {
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newpc = addrs+2;
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} else {
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newpc = addrs+2+off;
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++cycle_count;
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if ((newpc&0xFF00) != (addrs&0xFF00)) {
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++cycle_count;
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}
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}
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apple_ii_64k[0][addrs+0] = 0x10;
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apple_ii_64k[0][addrs+1] = off;
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apple_ii_64k[0][addrs+2] = (uint8_t)random();
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cpu65_current.a = 0xed;
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cpu65_current.x = 0xde;
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cpu65_current.y = 0x05;
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cpu65_current.sp = 0x81;
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cpu65_current.f = flags;
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cpu65_run();
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ASSERT(cpu65_current.pc == newpc);
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ASSERT(cpu65_current.a == 0xed);
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ASSERT(cpu65_current.x == 0xde);
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ASSERT(cpu65_current.y == 0x05);
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ASSERT(cpu65_current.sp == 0x81);
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ASSERT(cpu65_current.f == flags);
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ASSERT(cpu65_debug.ea == addrs+1);
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ASSERT(cpu65_debug.d == 0xff);
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ASSERT(cpu65_debug.rw == 0);
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ASSERT(cpu65_debug.opcode == 0x10);
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ASSERT(cpu65_debug.opcycles == cycle_count);
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PASS();
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}
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TEST test_BRA(int8_t off, bool flag, uint16_t addrs) {
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HEADER0();
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cpu65_current.pc = addrs;
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flags |= flag ? fN : 0;
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uint8_t cycle_count = 3;
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uint16_t newpc = addrs+2+off;
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if ((newpc&0xFF00) != (addrs&0xFF00)) {
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++cycle_count;
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}
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apple_ii_64k[0][addrs+0] = 0x80;
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apple_ii_64k[0][addrs+1] = off;
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apple_ii_64k[0][addrs+2] = (uint8_t)random();
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cpu65_current.a = 0xed;
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cpu65_current.x = 0xde;
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cpu65_current.y = 0x05;
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cpu65_current.sp = 0x81;
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cpu65_current.f = flags;
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cpu65_run();
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ASSERT(cpu65_current.pc == newpc);
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ASSERT(cpu65_current.a == 0xed);
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ASSERT(cpu65_current.x == 0xde);
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ASSERT(cpu65_current.y == 0x05);
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ASSERT(cpu65_current.sp == 0x81);
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ASSERT(cpu65_current.f == flags);
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ASSERT(cpu65_debug.ea == addrs+1);
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ASSERT(cpu65_debug.d == 0xff);
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ASSERT(cpu65_debug.rw == 0);
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ASSERT(cpu65_debug.opcode == 0x80);
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ASSERT(cpu65_debug.opcycles == cycle_count);
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PASS();
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}
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TEST test_BVC(int8_t off, bool flag, uint16_t addrs) {
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HEADER0();
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cpu65_current.pc = addrs;
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flags |= flag ? fV : 0;
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uint8_t cycle_count = 2;
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uint16_t newpc = 0xffff;
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if (flag) {
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newpc = addrs+2;
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} else {
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newpc = addrs+2+off;
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++cycle_count;
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if ((newpc&0xFF00) != (addrs&0xFF00)) {
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++cycle_count;
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}
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}
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apple_ii_64k[0][addrs+0] = 0x50;
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apple_ii_64k[0][addrs+1] = off;
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apple_ii_64k[0][addrs+2] = (uint8_t)random();
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cpu65_current.a = 0xed;
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cpu65_current.x = 0xde;
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cpu65_current.y = 0x05;
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cpu65_current.sp = 0x81;
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cpu65_current.f = flags;
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cpu65_run();
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ASSERT(cpu65_current.pc == newpc);
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ASSERT(cpu65_current.a == 0xed);
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ASSERT(cpu65_current.x == 0xde);
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ASSERT(cpu65_current.y == 0x05);
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ASSERT(cpu65_current.sp == 0x81);
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ASSERT(cpu65_current.f == flags);
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ASSERT(cpu65_debug.ea == addrs+1);
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ASSERT(cpu65_debug.d == 0xff);
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ASSERT(cpu65_debug.rw == 0);
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ASSERT(cpu65_debug.opcode == 0x50);
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ASSERT(cpu65_debug.opcycles == cycle_count);
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PASS();
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}
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TEST test_BVS(int8_t off, bool flag, uint16_t addrs) {
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HEADER0();
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cpu65_current.pc = addrs;
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flags |= flag ? fV : 0;
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uint8_t cycle_count = 2;
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uint16_t newpc = 0xffff;
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if (!flag) {
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newpc = addrs+2;
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} else {
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newpc = addrs+2+off;
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++cycle_count;
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if ((newpc&0xFF00) != (addrs&0xFF00)) {
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++cycle_count;
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}
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}
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apple_ii_64k[0][addrs+0] = 0x70;
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apple_ii_64k[0][addrs+1] = off;
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apple_ii_64k[0][addrs+2] = (uint8_t)random();
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cpu65_current.a = 0xed;
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cpu65_current.x = 0xde;
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cpu65_current.y = 0x05;
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cpu65_current.sp = 0x81;
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cpu65_current.f = flags;
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cpu65_run();
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ASSERT(cpu65_current.pc == newpc);
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ASSERT(cpu65_current.a == 0xed);
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ASSERT(cpu65_current.x == 0xde);
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ASSERT(cpu65_current.y == 0x05);
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ASSERT(cpu65_current.sp == 0x81);
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ASSERT(cpu65_current.f == flags);
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ASSERT(cpu65_debug.ea == addrs+1);
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ASSERT(cpu65_debug.d == 0xff);
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ASSERT(cpu65_debug.rw == 0);
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ASSERT(cpu65_debug.opcode == 0x70);
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ASSERT(cpu65_debug.opcycles == cycle_count);
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PASS();
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}
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// ----------------------------------------------------------------------------
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// BRK operand (and IRQ handling)
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@ -1119,7 +1530,7 @@ TEST test_BRK() {
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testcpu_set_opcode1(0x00);
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ASSERT(apple_ii_64k[0][0x1ff] != 0x1f);
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ASSERT(apple_ii_64k[0][0x1fe] != 0x01);
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ASSERT(apple_ii_64k[0][0x1fe] != TEST_LOC_LO+2);
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cpu65_current.a = 0x02;
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cpu65_current.x = 0x03;
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@ -1135,7 +1546,7 @@ TEST test_BRK() {
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ASSERT(cpu65_current.sp == 0xfc);
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ASSERT(apple_ii_64k[0][0x1ff] == 0x1f);
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ASSERT(apple_ii_64k[0][0x1fe] == 0x02);
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ASSERT(apple_ii_64k[0][0x1fe] == TEST_LOC_LO+2);
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ASSERT(apple_ii_64k[0][0x1fd] == cpu65_flags_encode[B_Flag|X_Flag]);
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ASSERT(cpu65_debug.ea == 0xfffe);
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@ -1149,7 +1560,7 @@ TEST test_BRK() {
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TEST test_IRQ() {
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// NOTE : not an opcode
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SKIPm("unimplemented for now");
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FAILm("unimplemented for now");
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}
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// ----------------------------------------------------------------------------
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@ -1162,7 +1573,7 @@ TEST test_NOP() {
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cpu65_current.x = 0x03;
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cpu65_current.y = 0x04;
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||||
cpu65_current.sp = 0x80;
|
||||
cpu65_current.f = 0x05;
|
||||
cpu65_current.f = 0x55;
|
||||
|
||||
cpu65_run();
|
||||
|
||||
@ -1170,7 +1581,7 @@ TEST test_NOP() {
|
||||
ASSERT(cpu65_current.a == 0x02);
|
||||
ASSERT(cpu65_current.x == 0x03);
|
||||
ASSERT(cpu65_current.y == 0x04);
|
||||
ASSERT(cpu65_current.f == 0x05);
|
||||
ASSERT(cpu65_current.f == 0x55);
|
||||
ASSERT(cpu65_current.sp == 0x80);
|
||||
|
||||
ASSERT(cpu65_debug.ea == TEST_LOC);
|
||||
@ -1682,6 +2093,38 @@ GREATEST_SUITE(test_suite_cpu) {
|
||||
A2_REMOVE_TEST(func);
|
||||
}
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
// Branch tests :
|
||||
// NOTE : these should be a comprehensive exercise of the branching logic
|
||||
|
||||
greatest_info.flags = GREATEST_FLAG_SILENT_SUCCESS;
|
||||
A2_ADD_TEST(test_BCC);
|
||||
A2_ADD_TEST(test_BCS);
|
||||
A2_ADD_TEST(test_BEQ);
|
||||
A2_ADD_TEST(test_BNE);
|
||||
A2_ADD_TEST(test_BMI);
|
||||
A2_ADD_TEST(test_BPL);
|
||||
A2_ADD_TEST(test_BRA);
|
||||
A2_ADD_TEST(test_BVC);
|
||||
A2_ADD_TEST(test_BVS);
|
||||
HASH_ITER(hh, test_funcs, func, tmp) {
|
||||
fprintf(GREATEST_STDOUT, "\n%s (SILENCED OUTPUT) :\n", func->name);
|
||||
|
||||
// test comprehensive logic in immediate mode (since no addressing to test) ...
|
||||
for (uint16_t addrs = 0x1f02; addrs < 0x2000; addrs+=0x80) {
|
||||
for (uint8_t flag = 0x00; flag < 0x02; flag++) {
|
||||
uint8_t off=0x00;
|
||||
do {
|
||||
A2_RUN_TESTp( func->func, off, flag, addrs);
|
||||
} while (++off);
|
||||
}
|
||||
}
|
||||
|
||||
fprintf(GREATEST_STDOUT, "...OK\n");
|
||||
A2_REMOVE_TEST(func);
|
||||
}
|
||||
greatest_info.flags = 0x0;
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
// Immediate addressing mode tests :
|
||||
// NOTE : these should be a comprehensive exercise of the instruction logic
|
||||
|
||||
Loading…
Reference in New Issue
Block a user