test incrementing instructions

This commit is contained in:
Aaron Culliney 2014-03-02 11:06:02 -08:00
parent de9a3861ed
commit 4e755ad80f

View File

@ -3103,6 +3103,274 @@ TEST test_EOR_ind_zpage(uint8_t regA, uint8_t val, uint8_t arg0, uint8_t lobyte,
PASS();
}
// ----------------------------------------------------------------------------
// INA, INX, INY instructions
static void logic_INx(/*uint8_t*/int _a, uint8_t *result, uint8_t *flags) {
uint8_t a = (uint8_t)_a;
uint8_t res = a+1;
if ((res & 0xff) == 0x0) {
*flags |= fZ;
}
if (res & 0x80) {
*flags |= fN;
}
*result = res;
}
TEST test_INA(uint8_t regA, uint8_t val) {
HEADER0();
logic_INx(regA, &result, &flags);
testcpu_set_opcode1(0x1a);
cpu65_current.a = regA;
cpu65_current.x = 0x03;
cpu65_current.y = 0x04;
cpu65_current.sp = 0x80;
cpu65_current.f = 0x00;
cpu65_run();
ASSERT(cpu65_current.pc == TEST_LOC+1);
ASSERT(cpu65_current.a == result);
ASSERT(cpu65_current.x == 0x03);
ASSERT(cpu65_current.y == 0x04);
ASSERT(cpu65_current.sp == 0x80);
ASSERTm(msgbuf, cpu65_current.a == result);
VERIFY_FLAGS();
ASSERT(cpu65_debug.ea == TEST_LOC);
ASSERT(cpu65_debug.d == 0xff);
ASSERT(cpu65_debug.rw == RW_NONE);
ASSERT(cpu65_debug.opcode == 0x1a);
ASSERT(cpu65_debug.opcycles == (2));
PASS();
}
TEST test_INX(uint8_t regX, uint8_t val) {
HEADER0();
uint8_t regA = 0x31;
logic_INx(regX, &result, &flags);
testcpu_set_opcode1(0xe8);
cpu65_current.a = regA;
cpu65_current.x = regX;
cpu65_current.y = 0x04;
cpu65_current.sp = 0x80;
cpu65_current.f = 0x00;
cpu65_run();
ASSERT(cpu65_current.pc == TEST_LOC+1);
ASSERT(cpu65_current.a == regA);
ASSERT(cpu65_current.x == result);
ASSERT(cpu65_current.y == 0x04);
ASSERT(cpu65_current.sp == 0x80);
VERIFY_FLAGS();
ASSERT(cpu65_debug.ea == TEST_LOC);
ASSERT(cpu65_debug.d == 0xff);
ASSERT(cpu65_debug.rw == RW_NONE);
ASSERT(cpu65_debug.opcode == 0xe8);
ASSERT(cpu65_debug.opcycles == (2));
PASS();
}
TEST test_INY(uint8_t regY, uint8_t val) {
HEADER0();
uint8_t regA = 0x21;
logic_INx(regY, &result, &flags);
testcpu_set_opcode1(0xc8);
cpu65_current.a = regA;
cpu65_current.x = 0x13;
cpu65_current.y = regY;
cpu65_current.sp = 0x80;
cpu65_current.f = 0x00;
cpu65_run();
ASSERT(cpu65_current.pc == TEST_LOC+1);
ASSERT(cpu65_current.a == regA);
ASSERT(cpu65_current.x == 0x13);
ASSERT(cpu65_current.y == result);
ASSERT(cpu65_current.sp == 0x80);
VERIFY_FLAGS();
ASSERT(cpu65_debug.ea == TEST_LOC);
ASSERT(cpu65_debug.d == 0xff);
ASSERT(cpu65_debug.rw == RW_NONE);
ASSERT(cpu65_debug.opcode == 0xc8);
ASSERT(cpu65_debug.opcycles == (2));
PASS();
}
// ----------------------------------------------------------------------------
// INC instructions
TEST test_INC_zpage(uint8_t regA, uint8_t val, uint8_t arg0) {
HEADER0();
logic_INx(val, &result, &flags);
testcpu_set_opcode2(0xe6, arg0);
apple_ii_64k[0][arg0] = val;
cpu65_current.a = regA;
cpu65_current.x = 0x03;
cpu65_current.y = 0x04;
cpu65_current.sp = 0x80;
cpu65_current.f = 0x00;
cpu65_run();
ASSERT(cpu65_current.pc == TEST_LOC+2);
ASSERT(cpu65_current.a == regA);
ASSERT(cpu65_current.x == 0x03);
ASSERT(cpu65_current.y == 0x04);
ASSERT(cpu65_current.sp == 0x80);
ASSERT(apple_ii_64k[0][arg0] == result);
VERIFY_FLAGS();
ASSERT(cpu65_debug.ea == arg0);
ASSERT(cpu65_debug.d == result);
ASSERT(cpu65_debug.rw == (RW_READ|RW_WRITE));
ASSERT(cpu65_debug.opcode == 0xe6);
ASSERT(cpu65_debug.opcycles == (5));
PASS();
}
TEST test_INC_zpage_x(uint8_t regA, uint8_t val, uint8_t arg0, uint8_t regX) {
HEADER0();
logic_INx(val, &result, &flags);
testcpu_set_opcode2(0xf6, arg0);
uint8_t idx = arg0+regX;
apple_ii_64k[0][idx] = val;
cpu65_current.a = regA;
cpu65_current.x = regX;
cpu65_current.y = 0x05;
cpu65_current.sp = 0x81;
cpu65_current.f = 0x00;
cpu65_run();
ASSERT(cpu65_current.pc == TEST_LOC+2);
ASSERT(cpu65_current.a == regA);
ASSERT(cpu65_current.x == regX);
ASSERT(cpu65_current.y == 0x05);
ASSERT(cpu65_current.sp == 0x81);
ASSERT(apple_ii_64k[0][idx] == result);
VERIFY_FLAGS();
ASSERT(cpu65_debug.ea == idx);
ASSERT(cpu65_debug.d == result);
ASSERT(cpu65_debug.rw == (RW_READ|RW_WRITE));
ASSERT(cpu65_debug.opcode == 0xf6);
ASSERT(cpu65_debug.opcycles == (6));
PASS();
}
TEST test_INC_abs(uint8_t regA, uint8_t val, uint8_t lobyte, uint8_t hibyte) {
HEADER0();
logic_INx(val, &result, &flags);
testcpu_set_opcode3(0xee, lobyte, hibyte);
uint16_t addrs = lobyte | (hibyte<<8);
apple_ii_64k[0][addrs] = val;
cpu65_current.a = regA;
cpu65_current.x = 0xf4;
cpu65_current.y = 0x05;
cpu65_current.sp = 0x81;
cpu65_current.f = 0x00;
cpu65_run();
ASSERT(cpu65_current.pc == TEST_LOC+3);
ASSERT(cpu65_current.a == regA);
ASSERT(cpu65_current.x == 0xf4);
ASSERT(cpu65_current.y == 0x05);
ASSERT(cpu65_current.sp == 0x81);
ASSERT(apple_ii_64k[0][addrs] == result);
VERIFY_FLAGS();
ASSERT(cpu65_debug.ea == addrs);
ASSERT(cpu65_debug.d == result);
ASSERT(cpu65_debug.rw == (RW_READ|RW_WRITE));
ASSERT(cpu65_debug.opcode == 0xee);
ASSERT(cpu65_debug.opcycles == (6));
PASS();
}
TEST test_INC_abs_x(uint8_t regA, uint8_t val, uint8_t regX, uint8_t lobyte, uint8_t hibyte) {
HEADER0();
logic_INx(val, &result, &flags);
testcpu_set_opcode3(0xfe, lobyte, hibyte);
uint8_t cycle_count = 6;
uint16_t addrs = lobyte | (hibyte<<8);
addrs = addrs + regX;
if ((uint8_t)((addrs>>8)&0xff) != (uint8_t)hibyte) {
++cycle_count;
}
apple_ii_64k[0][addrs] = val;
cpu65_current.a = regA;
cpu65_current.x = regX;
cpu65_current.y = 0x05;
cpu65_current.sp = 0x81;
cpu65_current.f = 0x00;
cpu65_run();
ASSERT(cpu65_current.pc == TEST_LOC+3);
ASSERT(cpu65_current.a == regA);
ASSERT(cpu65_current.x == regX);
ASSERT(cpu65_current.y == 0x05);
ASSERT(cpu65_current.sp == 0x81);
ASSERT(apple_ii_64k[0][addrs] == result);
VERIFY_FLAGS();
ASSERT(cpu65_debug.ea == addrs);
ASSERT(cpu65_debug.d == result);
ASSERT(cpu65_debug.rw == (RW_READ|RW_WRITE));
ASSERT(cpu65_debug.opcode == 0xfe);
ASSERT(cpu65_debug.opcycles == cycle_count);
PASS();
}
// ----------------------------------------------------------------------------
// NOP operand
@ -3684,6 +3952,9 @@ GREATEST_SUITE(test_suite_cpu) {
A2_ADD_TEST(test_DEX);
A2_ADD_TEST(test_DEY);
A2_ADD_TEST(test_EOR_imm);
A2_ADD_TEST(test_INA);
A2_ADD_TEST(test_INX);
A2_ADD_TEST(test_INY);
A2_ADD_TEST(test_SBC_imm);
HASH_ITER(hh, test_funcs, func, tmp) {
fprintf(GREATEST_STDOUT, "\n%s (SILENCED OUTPUT) :\n", func->name);
@ -3741,6 +4012,7 @@ GREATEST_SUITE(test_suite_cpu) {
A2_ADD_TEST(test_CPY_zpage);
A2_ADD_TEST(test_DEC_zpage);
A2_ADD_TEST(test_EOR_zpage);
A2_ADD_TEST(test_INC_zpage);
A2_ADD_TEST(test_SBC_zpage);
HASH_ITER(hh, test_funcs, func, tmp) {
fprintf(GREATEST_STDOUT, "\n%s :\n", func->name);
@ -3766,6 +4038,7 @@ GREATEST_SUITE(test_suite_cpu) {
A2_ADD_TEST(test_CMP_zpage_x);
A2_ADD_TEST(test_DEC_zpage_x);
A2_ADD_TEST(test_EOR_zpage_x);
A2_ADD_TEST(test_INC_zpage_x);
A2_ADD_TEST(test_SBC_zpage_x);
HASH_ITER(hh, test_funcs, func, tmp) {
fprintf(GREATEST_STDOUT, "\n%s :\n", func->name);
@ -3791,6 +4064,7 @@ GREATEST_SUITE(test_suite_cpu) {
A2_ADD_TEST(test_CPY_abs);
A2_ADD_TEST(test_DEC_abs);
A2_ADD_TEST(test_EOR_abs);
A2_ADD_TEST(test_INC_abs);
A2_ADD_TEST(test_SBC_abs);
HASH_ITER(hh, test_funcs, func, tmp) {
fprintf(GREATEST_STDOUT, "\n%s :\n", func->name);
@ -3815,6 +4089,7 @@ GREATEST_SUITE(test_suite_cpu) {
A2_ADD_TEST(test_CMP_abs_x);
A2_ADD_TEST(test_DEC_abs_x);
A2_ADD_TEST(test_EOR_abs_x);
A2_ADD_TEST(test_INC_abs_x);
A2_ADD_TEST(test_SBC_abs_x);
HASH_ITER(hh, test_funcs, func, tmp) {
fprintf(GREATEST_STDOUT, "\n%s :\n", func->name);