mirror of
https://github.com/mauiaaron/apple2.git
synced 2024-12-26 00:31:44 +00:00
Streamline CPU tracing codepaths and remove some deadc0de
This commit is contained in:
parent
1de71d1ff4
commit
51d2efba03
@ -47,10 +47,6 @@
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bl CALL(cpu65_trace_prologue);
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# define TRACE_ARG \
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bl CALL(cpu65_trace_arg);
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# define TRACE_ARG1 \
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bl CALL(cpu65_trace_arg1);
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# define TRACE_ARG2 \
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bl CALL(cpu65_trace_arg2);
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# define TRACE_EPILOGUE \
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CommonSaveCPUState; \
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bl CALL(cpu65_trace_epilogue);
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@ -59,8 +55,6 @@
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#else
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# define TRACE_PROLOGUE
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# define TRACE_ARG
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# define TRACE_ARG1
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# define TRACE_ARG2
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# define TRACE_EPILOGUE
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# define TRACE_IRQ
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#endif
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@ -128,12 +122,12 @@
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AddUint16(PC_Reg, #2) \
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ldr r1, [reg_vmem_r, EffectiveAddr, LSL PTR_SHIFT]; \
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blx r1; \
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TRACE_ARG1 \
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TRACE_ARG \
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mov lo_byte, r0; \
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IncUint16(EffectiveAddr) \
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ldr r1, [reg_vmem_r, EffectiveAddr, LSL PTR_SHIFT]; \
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blx r1; \
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TRACE_ARG2; \
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TRACE_ARG; \
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mov hi_byte, hi_byte, LSL #8; \
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orr r0, hi_byte, lo_byte;
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@ -2408,14 +2402,6 @@ continue:
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add r1, r1, cycles_exe
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str r1, [reg_args, #CPU65_CYCLE_COUNT]
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#if CONFORMANT_IRQ_CHECKPOINT
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# error 2018/01/15 untested ...
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ldr r1, [reg_args, #CPU_IRQCHECK] // AppleWin : CheckInterruptSources()
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subs r1, r1, cycles_exe
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str r1, [reg_args, #CPU_IRQCHECK]
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bmi irq_checkpoint
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#endif
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continue1: ldr r1, [reg_args, #CPU65_CYCLES_TO_EXECUTE]
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subs r1, r1, cycles_exe
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str r1, [reg_args, #CPU65_CYCLES_TO_EXECUTE]
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@ -2428,16 +2414,6 @@ continue2: ldrb r0, [reg_args, #CPU65__SIGNAL]
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CPUStatsReset
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JumpNextInstruction
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#if CONFORMANT_IRQ_CHECKPOINT
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# error 2018/01/15 untested ...
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irq_checkpoint:
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bl CALL(cpu_irqCheck);
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//eor r1, r1, r1
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mov r1, #IRQ_CHECK_CYCLES
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str r1, [reg_args, #CPU_IRQCHECK]
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b continue1
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#endif
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/* -------------------------------------------------------------------------
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Exception handlers
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------------------------------------------------------------------------- */
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@ -1,9 +1,9 @@
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/* This file is auto-generated for a specific architecture ABI */
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#define CPU_IRQCHECK 0
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#define UNUSED0 0
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#define CPU65_TRACE_PROLOGUE 4
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#define CPU65_TRACE_ARG 8
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#define CPU65_TRACE_ARG1 12
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#define CPU65_TRACE_ARG2 16
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#define UNUSED1 12
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#define UNUSED2 16
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#define CPU65_TRACE_EPILOGUE 20
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#define CPU65_TRACE_IRQ 24
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#define DEBUG_ILLEGAL_BCD 28
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@ -33,7 +33,7 @@
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#define GC_CYCLES_TIMER_1 124
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#define CPU65_CYCLES_TO_EXECUTE 128
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#define CPU65_CYCLE_COUNT 132
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#define IRQ_CHECK_TIMEOUT 136
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#define UNUSED3 136
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#define INTERRUPT_VECTOR 140
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#define RESET_VECTOR 142
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#define CPU65_PC 144
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@ -610,9 +610,6 @@ static void init_flags_conversion_tables(void) {
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static __attribute__((constructor)) void __init_cpu65(void) {
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// emulator_registerStartupCallback(CTOR_PRIORITY_LATE, &_init_cpu65); -- 2018/01/15 NOTE : too late for testcpu.c
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extern void (*cpu_irqCheck)(uint16_t, uint8_t);
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run_args.cpu_irqCheck = cpu_irqCheck;
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run_args.cpu65_vmem_r = &cpu65_vmem_r[0];
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run_args.cpu65_vmem_w = &cpu65_vmem_w[0];
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run_args.cpu65_flags_encode = &cpu65_flags_encode[0];
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@ -628,10 +625,6 @@ static __attribute__((constructor)) void __init_cpu65(void) {
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run_args.cpu65_trace_prologue = cpu65_trace_prologue;
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extern void (*cpu65_trace_arg)(uint16_t, uint8_t);
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run_args.cpu65_trace_arg = cpu65_trace_arg;
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extern void (*cpu65_trace_arg1)(uint16_t, uint8_t);
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run_args.cpu65_trace_arg1 = cpu65_trace_arg1;
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extern void (*cpu65_trace_arg2)(uint16_t, uint8_t);
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run_args.cpu65_trace_arg2 = cpu65_trace_arg2;
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extern void (*cpu65_trace_epilogue)(uint16_t, uint8_t);
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run_args.cpu65_trace_epilogue = cpu65_trace_epilogue;
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extern void (*cpu65_trace_irq)(uint16_t, uint8_t);
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@ -798,20 +791,6 @@ GLUE_C_WRITE(cpu65_trace_arg)
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opargs[nargs++] = b;
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}
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GLUE_C_WRITE(cpu65_trace_arg1)
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{
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assert(nargs <= 2);
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opargs[2] = b;
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++nargs;
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}
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GLUE_C_WRITE(cpu65_trace_arg2)
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{
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assert(nargs <= 2);
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opargs[1] = b;
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++nargs;
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}
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GLUE_C_WRITE(cpu65_trace_epilogue)
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{
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int8_t arg1 = opargs[1];
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@ -888,11 +867,11 @@ GLUE_C_WRITE(cpu65_trace_epilogue)
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char fmt[64];
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if (UNLIKELY(run_args.cpu65_opcycles >= 10)) {
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// occurs rarely for interrupt + opcode
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snprintf(fmt, 64, "%s", " %s CY:%u irqChk:%d totCyc:%d EA:%04X");
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snprintf(fmt, 64, "%s", " %s CY:%u totCyc:%d EA:%04X");
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} else {
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snprintf(fmt, 64, "%s", " %s CYC:%u irqChk:%d totCyc:%d EA:%04X");
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snprintf(fmt, 64, "%s", " %s CYC:%u totCyc:%d EA:%04X");
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}
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fprintf(cpu_trace_fp, fmt, flags_buf, run_args.cpu65_opcycles, (run_args.irq_check_timeout - run_args.cpu65_opcycles), (cycles_count_total + run_args.cpu65_opcycles), run_args.cpu65_ea);
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fprintf(cpu_trace_fp, fmt, flags_buf, run_args.cpu65_opcycles, (cycles_count_total + run_args.cpu65_opcycles), run_args.cpu65_ea);
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sprintf(fmt, " %s %s", opcodes_65c02[run_args.cpu65_opcode].mnemonic, disasm_templates[opcodes_65c02[run_args.cpu65_opcode].mode]);
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@ -62,8 +62,6 @@ void cpu65_trace_checkpoint(void);
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#endif /* !__ASSEMBLER__ */
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#define IRQ_CHECK_CYCLES 128
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#define ResetSig 0x02
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#define IRQ6522 0x08
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#define IRQSpeech 0x10
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@ -19,12 +19,12 @@ int main (int argc, char **argv) {
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printf("/* This file is auto-generated for a specific architecture ABI */\n");
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OUTPUT_CPU_IRQCHECK();
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OUTPUT_UNUSED0();
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OUTPUT_CPU65_TRACE_PROLOGUE();
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OUTPUT_CPU65_TRACE_ARG();
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OUTPUT_CPU65_TRACE_ARG1();
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OUTPUT_CPU65_TRACE_ARG2();
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OUTPUT_UNUSED1();
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OUTPUT_UNUSED2();
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OUTPUT_CPU65_TRACE_EPILOGUE();
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OUTPUT_CPU65_TRACE_IRQ();
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@ -62,7 +62,7 @@ int main (int argc, char **argv) {
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OUTPUT_CPU65_CYCLES_TO_EXECUTE();
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OUTPUT_CPU65_CYCLE_COUNT();
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OUTPUT_IRQ_CHECK_TIMEOUT();
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OUTPUT_UNUSED3();
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OUTPUT_INTERRUPT_VECTOR();
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OUTPUT_RESET_VECTOR();
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19
src/glue.h
19
src/glue.h
@ -76,19 +76,21 @@
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// Stack struct assembly bridge (avoiding all PIC nastiness)
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typedef struct cpu65_run_args_s {
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void (*cpu_irqCheck)(uint16_t, uint8_t);
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#define OUTPUT_CPU_IRQCHECK() printf("#define CPU_IRQCHECK %ld\n", offsetof(cpu65_run_args_s, cpu_irqCheck))
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void (*unused0)(uint16_t, uint8_t);
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#define OUTPUT_UNUSED0() printf("#define UNUSED0 %ld\n", offsetof(cpu65_run_args_s, unused0))
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void (*cpu65_trace_prologue)(uint16_t, uint8_t);
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#define OUTPUT_CPU65_TRACE_PROLOGUE() printf("#define CPU65_TRACE_PROLOGUE %ld\n", offsetof(cpu65_run_args_s, cpu65_trace_prologue))
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void (*cpu65_trace_arg)(uint16_t, uint8_t);
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#define OUTPUT_CPU65_TRACE_ARG() printf("#define CPU65_TRACE_ARG %ld\n", offsetof(cpu65_run_args_s, cpu65_trace_arg))
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void (*cpu65_trace_arg1)(uint16_t, uint8_t);
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#define OUTPUT_CPU65_TRACE_ARG1() printf("#define CPU65_TRACE_ARG1 %ld\n", offsetof(cpu65_run_args_s, cpu65_trace_arg1))
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void (*cpu65_trace_arg2)(uint16_t, uint8_t);
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#define OUTPUT_CPU65_TRACE_ARG2() printf("#define CPU65_TRACE_ARG2 %ld\n", offsetof(cpu65_run_args_s, cpu65_trace_arg2))
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void (*unused1)(uint16_t, uint8_t);
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#define OUTPUT_UNUSED1() printf("#define UNUSED1 %ld\n", offsetof(cpu65_run_args_s, unused1))
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void (*unused2)(uint16_t, uint8_t);
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#define OUTPUT_UNUSED2() printf("#define UNUSED2 %ld\n", offsetof(cpu65_run_args_s, unused2))
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void (*cpu65_trace_epilogue)(uint16_t, uint8_t);
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#define OUTPUT_CPU65_TRACE_EPILOGUE() printf("#define CPU65_TRACE_EPILOGUE %ld\n", offsetof(cpu65_run_args_s, cpu65_trace_epilogue))
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void (*cpu65_trace_irq)(uint16_t, uint8_t);
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#define OUTPUT_CPU65_TRACE_IRQ() printf("#define CPU65_TRACE_IRQ %ld\n", offsetof(cpu65_run_args_s, cpu65_trace_irq))
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@ -153,8 +155,9 @@ typedef struct cpu65_run_args_s {
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#define OUTPUT_CPU65_CYCLES_TO_EXECUTE() printf("#define CPU65_CYCLES_TO_EXECUTE %ld\n", offsetof(cpu65_run_args_s, cpu65_cycles_to_execute))
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int32_t cpu65_cycle_count; // cycles currently excuted by cpu65_run()
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#define OUTPUT_CPU65_CYCLE_COUNT() printf("#define CPU65_CYCLE_COUNT %ld\n", offsetof(cpu65_run_args_s, cpu65_cycle_count))
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int32_t irq_check_timeout; // cycles to check for raised IRQ
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#define OUTPUT_IRQ_CHECK_TIMEOUT() printf("#define IRQ_CHECK_TIMEOUT %ld\n", offsetof(cpu65_run_args_s, irq_check_timeout))
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int32_t unused3;
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#define OUTPUT_UNUSED3() printf("#define UNUSED3 %ld\n", offsetof(cpu65_run_args_s, unused3))
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uint16_t interrupt_vector;
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#define OUTPUT_INTERRUPT_VECTOR() printf("#define INTERRUPT_VECTOR %ld\n", offsetof(cpu65_run_args_s, interrupt_vector))
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@ -51,7 +51,6 @@ static void testcpu_setup(void *arg) {
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cpu65_uninterrupt(0xff);
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run_args.cpu65_cycle_count = 0;
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run_args.cpu65_cycles_to_execute = 1;
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run_args.irq_check_timeout = 255;
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run_args.cpu65_pc = TEST_LOC;
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run_args.cpu65_a = 0x0;
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@ -145,7 +145,6 @@ void reinitialize(void) {
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cycles_count_total = 0;
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g_dwCyclesThisFrame = 0;
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run_args.irq_check_timeout = IRQ_CHECK_CYCLES;
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#if TESTING
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extern unsigned long (*testing_getCyclesCount)(void);
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if (testing_getCyclesCount) {
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6
src/vm.c
6
src/vm.c
@ -913,12 +913,6 @@ GLUE_C_READ(debug_illegal_bcd)
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return 0;
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}
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GLUE_C_WRITE(cpu_irqCheck)
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{
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MB_UpdateCycles();
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// TODO : other peripheral card interrupt handling
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}
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// ----------------------------------------------------------------------------
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static void _initialize_iie_switches(void) {
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@ -35,10 +35,6 @@
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callLQ *CPU65_TRACE_PROLOGUE(reg_args);
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# define TRACE_ARG \
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callLQ *CPU65_TRACE_ARG(reg_args);
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# define TRACE_ARG1 \
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callLQ *CPU65_TRACE_ARG1(reg_args);
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# define TRACE_ARG2 \
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callLQ *CPU65_TRACE_ARG2(reg_args);
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# define TRACE_EPILOGUE \
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pushLQ _XAX; \
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CommonSaveCPUState; \
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@ -49,8 +45,6 @@
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#else
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# define TRACE_PROLOGUE
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# define TRACE_ARG
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# define TRACE_ARG1
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# define TRACE_ARG2
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# define TRACE_EPILOGUE
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# define TRACE_IRQ
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#endif
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@ -67,14 +61,14 @@
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#define GetFromPC_W \
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movLQ PC_Reg_X, EffectiveAddr_X; \
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incw EffectiveAddr; \
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addw $2, PC_Reg; \
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CALL_IND(CPU65_VMEM_R,EffectiveAddr_X); \
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decw EffectiveAddr; \
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TRACE_ARG2; \
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TRACE_ARG; \
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movb %al, %ah; \
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incw EffectiveAddr; \
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CALL_IND(CPU65_VMEM_R,EffectiveAddr_X); \
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TRACE_ARG1;
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TRACE_ARG; \
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xchgb %al, %ah;
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#define CPUStatsReset \
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movb $0, CPU65_OPCYCLES(reg_args); \
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@ -2108,36 +2102,19 @@ continue:
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addb CPU65_OPCYCLES(reg_args), %al
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movb %al, CPU65_OPCYCLES(reg_args)
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TRACE_EPILOGUE
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addl %eax, CPU65_CYCLE_COUNT(reg_args)
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subl %eax, GC_CYCLES_TIMER_0(reg_args)
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subl %eax, GC_CYCLES_TIMER_1(reg_args)
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#if CONFORMANT_IRQ_CHECKPOINT
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# error 2018/01/15 untested ...
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subl %eax, IRQ_CHECK_TIMEOUT(reg_args)
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jl irq_checkpoint // AppleWin : CheckInterruptSources()
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#endif
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continue1: subl %eax, CPU65_CYCLES_TO_EXECUTE(reg_args)
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jle exit_cpu65_run
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continue2: xorLQ _XAX, _XAX
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orb CPU65__SIGNAL(reg_args), %al
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jnz exception
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CPUStatsReset
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JumpNextInstruction
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#if CONFORMANT_IRQ_CHECKPOINT
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# error 2018/01/15 untested ...
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irq_checkpoint:
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#if __PIC__ && __i386__
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pushl %ebx
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#endif
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callLQ *CPU_IRQCHECK(reg_args)
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#if __PIC__ && __i386__
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popl %ebx
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#endif
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movl $IRQ_CHECK_CYCLES, IRQ_CHECK_TIMEOUT(reg_args)
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jmp continue1
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#endif
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/* -------------------------------------------------------------------------
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Exception handlers
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------------------------------------------------------------------------- */
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@ -1,9 +1,9 @@
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/* This file is auto-generated for a specific architecture ABI */
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#define CPU_IRQCHECK 0
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#define UNUSED0 0
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#define CPU65_TRACE_PROLOGUE 4
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#define CPU65_TRACE_ARG 8
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#define CPU65_TRACE_ARG1 12
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#define CPU65_TRACE_ARG2 16
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#define UNUSED1 12
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#define UNUSED2 16
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#define CPU65_TRACE_EPILOGUE 20
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#define CPU65_TRACE_IRQ 24
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#define DEBUG_ILLEGAL_BCD 28
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@ -33,7 +33,7 @@
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#define GC_CYCLES_TIMER_1 124
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#define CPU65_CYCLES_TO_EXECUTE 128
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#define CPU65_CYCLE_COUNT 132
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#define IRQ_CHECK_TIMEOUT 136
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#define UNUSED3 136
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#define INTERRUPT_VECTOR 140
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#define RESET_VECTOR 142
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#define CPU65_PC 144
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@ -1,9 +1,9 @@
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/* This file is auto-generated for a specific architecture ABI */
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#define CPU_IRQCHECK 0
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#define UNUSED0 0
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#define CPU65_TRACE_PROLOGUE 8
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#define CPU65_TRACE_ARG 16
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#define CPU65_TRACE_ARG1 24
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#define CPU65_TRACE_ARG2 32
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#define UNUSED1 24
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#define UNUSED2 32
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#define CPU65_TRACE_EPILOGUE 40
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#define CPU65_TRACE_IRQ 48
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#define DEBUG_ILLEGAL_BCD 56
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@ -33,7 +33,7 @@
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#define GC_CYCLES_TIMER_1 240
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#define CPU65_CYCLES_TO_EXECUTE 244
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#define CPU65_CYCLE_COUNT 248
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#define IRQ_CHECK_TIMEOUT 252
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#define UNUSED3 252
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#define INTERRUPT_VECTOR 256
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#define RESET_VECTOR 258
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#define CPU65_PC 260
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