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refactor language card switches to C

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This commit is contained in:
Aaron Culliney 2014-05-10 13:40:29 -07:00
parent aef793cfab
commit 5249248aaa
2 changed files with 151 additions and 133 deletions
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133
src/asm386/memory.S
View File

@ -149,139 +149,6 @@
enabled.
----------------------------------------------------------------- */
E(iie_c080)
testl $SS_ALTZP, SN(softswitches)
jz lc_c080
pushl $lc_to_auxmem /* sneak this code in when
* ][+ routine exits */
/* c080: read RAM; no write; use $D000 bank 2. */
lc_c080:
orl $SS_LCRAM|SS_BANK2, SN(softswitches)
andl $~(SS_LCSEC|SS_LCWRT), SN(softswitches)
movl $SN(language_banks)-0xD000, SN(base_d000_rd)
movl $SN(language_card)-0xE000, SN(base_e000_rd)
movl $0, SN(base_d000_wrt)
movl $0, SN(base_e000_wrt)
ret
E(iie_c081)
testl $SS_ALTZP, SN(softswitches)
jz lc_c081
pushl $lc_to_auxmem /* sneak this code in when
* ][+ routine exits */
/* c081: read ROM; write RAM; use $D000 bank 2. */
lc_c081:
testl $SS_LCSEC, SN(softswitches)
je lc_c081_exit
orl $SS_LCWRT, SN(softswitches)
movl $SN(language_banks)-0xD000, SN(base_d000_wrt)
movl $SN(language_card)-0xE000, SN(base_e000_wrt)
lc_c081_exit:
andl $~SS_LCRAM, SN(softswitches)
orl $SS_LCSEC|SS_BANK2, SN(softswitches)
movl $SN(apple_ii_64k), SN(base_d000_rd)
movl $SN(apple_ii_64k), SN(base_e000_rd)
ret
/* There is no iie_c082 --- since the LC is offline, no auxillary memory
* could be exposed. (ditto for c08a) */
/* c082: read ROM; no write; use $D000 bank 2. */
E(lc_c082)
andl $~(SS_LCRAM|SS_LCWRT|SS_LCSEC), SN(softswitches)
orl $SS_BANK2, SN(softswitches)
movl $SN(apple_ii_64k), SN(base_d000_rd)
movl $SN(apple_ii_64k), SN(base_e000_rd)
movl $0, SN(base_d000_wrt)
movl $0, SN(base_e000_wrt)
ret
E(iie_c083)
testl $SS_ALTZP, SN(softswitches)
jz lc_c083
pushl $lc_to_auxmem /* sneak this code in when
* ][+ routine exits */
/* c083: read and write RAM; no write; use $D000 bank 2. */
lc_c083: testl $SS_LCSEC, SN(softswitches)
je lc_c083_exit
orl $SS_LCWRT, SN(softswitches)
movl $SN(language_banks)-0xD000, SN(base_d000_wrt)
movl $SN(language_card)-0xE000, SN(base_e000_wrt)
lc_c083_exit:
orl $(SS_LCSEC|SS_LCRAM|SS_BANK2), SN(softswitches)
movl $SN(language_banks)-0xD000, SN(base_d000_rd)
movl $SN(language_card)-0xE000, SN(base_e000_rd)
ret
E(iie_c088)
testl $SS_ALTZP, SN(softswitches)
jz lc_c088
pushl $lc_to_auxmem /* sneak this code in when
* ][+ routine exits */
/* c088: read RAM; no write; use $D000 bank 1. */
lc_c088:
orl $(SS_LCRAM), SN(softswitches)
andl $~(SS_LCWRT|SS_LCSEC|SS_BANK2), SN(softswitches)
movl $SN(language_banks)-0xC000, SN(base_d000_rd)
movl $SN(language_card)-0xE000, SN(base_e000_rd)
movl $0, SN(base_d000_wrt)
movl $0, SN(base_e000_wrt)
ret
E(iie_c089)
testl $SS_ALTZP, SN(softswitches)
jz lc_c089
pushl $lc_to_auxmem /* sneak this code in when
* ][+ routine exits */
/* c089: read ROM; write RAM; use $D000 bank 1. */
lc_c089:
testl $SS_LCSEC, SN(softswitches)
jz lc_c089_exit
orl $SS_LCWRT, SN(softswitches)
movl $SN(language_banks)-0xC000, SN(base_d000_wrt)
movl $SN(language_card)-0xE000, SN(base_e000_wrt)
lc_c089_exit:
andl $~(SS_LCRAM|SS_BANK2), SN(softswitches)
orl $(SS_LCSEC), SN(softswitches)
movl $SN(apple_ii_64k), SN(base_d000_rd)
movl $SN(apple_ii_64k), SN(base_e000_rd)
ret
/* there is no iie_c08a */
/* c08a: read ROM; no write; use $D000 bank 1. */
E(lc_c08a)
andl $~(SS_LCRAM|SS_LCWRT|SS_LCSEC|SS_BANK2), SN(softswitches)
movl $SN(apple_ii_64k), SN(base_d000_rd)
movl $SN(apple_ii_64k), SN(base_e000_rd)
movl $0, SN(base_d000_wrt)
movl $0, SN(base_e000_wrt)
ret
E(iie_c08b)
testl $SS_ALTZP, SN(softswitches)
jz lc_c08b
pushl $lc_to_auxmem /* sneak this code in when
* ][+ routine exits */
/* c08b: read and write RAM; use $D000 bank 1. */
lc_c08b:
testl $SS_LCSEC, SN(softswitches)
jz lc_c08b_exit
orl $SS_LCWRT, SN(softswitches)
movl $SN(language_banks)-0xC000, SN(base_d000_wrt)
movl $SN(language_card)-0xE000, SN(base_e000_wrt)
lc_c08b_exit:
orl $(SS_LCRAM|SS_LCSEC), SN(softswitches)
andl $~SS_BANK2,SN(softswitches)
movl $SN(language_banks)-0xC000, SN(base_d000_rd)
movl $SN(language_card)-0xE000, SN(base_e000_rd)
ret
/* -------------------------------------------------------------------------
* misc //e functions
* ------------------------------------------------------------------------- */

151
src/vm.c
View File

@ -268,3 +268,154 @@ GLUE_C_READ(iie_read_gc3)
return 0x0;
}
static inline void _lc_to_auxmem() {
if (softswitches & SS_LCRAM) {
base_d000_rd += 0x2000;
base_e000_rd = language_card[0]-0xC000;
}
if (softswitches & SS_LCWRT) {
base_d000_wrt += 0x2000;
base_e000_wrt = language_card[0]-0xC000;
}
}
GLUE_C_READ(iie_c080)
{
softswitches |= (SS_LCRAM|SS_BANK2);
softswitches &= ~(SS_LCSEC|SS_LCWRT);
base_d000_rd = language_banks[0]-0xD000;
base_e000_rd = language_card[0]-0xE000;
base_d000_wrt = 0;
base_e000_wrt = 0;
if (softswitches & SS_ALTZP) {
_lc_to_auxmem();
}
return 0x0;
}
GLUE_C_READ(iie_c081)
{
if (softswitches & SS_LCSEC) {
softswitches |= SS_LCWRT;
base_d000_wrt = language_banks[0]-0xD000;
base_e000_wrt = language_card[0]-0xE000;
}
softswitches |= (SS_LCSEC|SS_BANK2);
softswitches &= ~SS_LCRAM;
base_d000_rd = apple_ii_64k[0];
base_e000_rd = apple_ii_64k[0];
if (softswitches & SS_ALTZP) {
_lc_to_auxmem();
}
return 0x0;
}
GLUE_C_READ(lc_c082)
{
softswitches &= ~(SS_LCRAM|SS_LCWRT|SS_LCSEC);
softswitches |= SS_BANK2;
base_d000_rd = apple_ii_64k[0];
base_e000_rd = apple_ii_64k[0];
base_d000_wrt = 0;
base_e000_wrt = 0;
return 0x0;
}
GLUE_C_READ(iie_c083)
{
if (softswitches & SS_LCSEC) {
softswitches |= SS_LCWRT;
base_d000_wrt = language_banks[0]-0xD000;
base_e000_wrt = language_card[0]-0xE000;
}
softswitches |= (SS_LCSEC|SS_LCRAM|SS_BANK2);
base_d000_rd = language_banks[0]-0xD000;
base_e000_rd = language_card[0]-0xE000;
if (softswitches & SS_ALTZP) {
_lc_to_auxmem();
}
return 0x0;
}
GLUE_C_READ(iie_c088)
{
softswitches |= SS_LCRAM;
softswitches &= ~(SS_LCWRT|SS_LCSEC|SS_BANK2);
base_d000_rd = language_banks[0]-0xC000;
base_e000_rd = language_card[0]-0xE000;
base_d000_wrt = 0;
base_e000_wrt = 0;
if (softswitches & SS_ALTZP) {
_lc_to_auxmem();
}
return 0x0;
}
GLUE_C_READ(iie_c089)
{
if (softswitches & SS_LCSEC) {
softswitches |= SS_LCWRT;
base_d000_wrt = language_banks[0]-0xC000;
base_e000_wrt = language_card[0]-0xE000;
}
softswitches |= SS_LCSEC;
softswitches &= ~(SS_LCRAM|SS_BANK2);
base_d000_rd = apple_ii_64k[0];
base_e000_rd = apple_ii_64k[0];
if (softswitches & SS_ALTZP) {
_lc_to_auxmem();
}
return 0x0;
}
GLUE_C_READ(lc_c08a)
{
softswitches &= ~(SS_LCRAM|SS_LCWRT|SS_LCSEC|SS_BANK2);
base_d000_rd = apple_ii_64k[0];
base_e000_rd = apple_ii_64k[0];
base_d000_wrt = 0;
base_e000_wrt = 0;
return 0x0;
}
GLUE_C_READ(iie_c08b)
{
if (softswitches & SS_LCSEC) {
softswitches |= SS_LCWRT;
base_d000_wrt = language_banks[0]-0xC000;
base_e000_wrt = language_card[0]-0xE000;
}
softswitches |= (SS_LCRAM|SS_LCSEC);
softswitches &= ~SS_BANK2;
base_d000_rd = language_banks[0]-0xC000;
base_e000_rd = language_card[0]-0xE000;
if (softswitches & SS_ALTZP) {
_lc_to_auxmem();
}
return 0x0;
}