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First cut at DAA and DAS algorithms in ARM and misc assembly cleanup
This commit is contained in:
Aaron Culliney
parent
86e8eeafe2
commit
59d151d684
@ -32,9 +32,6 @@
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// r14 ARM return addr
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// r15 ARM PC
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#define ARM_CF_Bit ... /* ARM carry */
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#define ARM_AF_Bit ...
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#ifdef __aarch64__
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# error 20150205 ARM 64bit untested!!!
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184
src/arm/cpu.S
184
src/arm/cpu.S
@ -194,15 +194,22 @@
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mov r0, r0, LSL #24; \
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mov r0, r0, ASR #24;
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#define _IncOpCycles \
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ldr mem_cycle_count, SYM(cpu65_opcycles); \
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ldrb scratch_count, [mem_cycle_count]; \
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add scratch_count, scratch_count, #1;
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#define IncOpCycles \
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_IncOpCycles \
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strb scratch_count, [mem_cycle_count];
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#define pc_hi_byte r9
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#define mem_cycle_count r1
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#define scratch_count r12
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#define pc_hi_prev r9
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#define pc_hi_next r0
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#define BranchXCycles \
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ldr mem_cycle_count, SYM(cpu65_opcycles); \
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ldrb scratch_count, [mem_cycle_count]; \
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add scratch_count, scratch_count, #1; /* +1 branch taken */ \
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_IncOpCycles \
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mov pc_hi_prev, PC_Reg; \
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mov pc_hi_prev, pc_hi_prev, LSR #8; \
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cbw; \
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@ -217,7 +224,7 @@
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#define arm_flags r12
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#define lahf \
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/* Virtual x86: Load %AH (r12) from Flags */ \
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/* Virtual x86: Load %AH (r12) from ARM CPU Flags */ \
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mov arm_flags, r15, LSR #28;
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#define FlagC \
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@ -343,13 +350,6 @@
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teq ea_hi_prev, ea_hi_next; \
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beq 9f;
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#define PageBoundaryCrossed \
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ldr mem_cycle_count, SYM(cpu65_opcycles); \
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eor scratch_count, scratch_count, scratch_count; /* HACK FIXME TODO VERIFY IN GDB : is this necessary? */ \
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ldrb scratch_count, [mem_cycle_count]; \
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add scratch_count, scratch_count, #1; /* +1 cycle on page_boundary */ \
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strb scratch_count, [mem_cycle_count];
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/* Absolute Indexed Addressing - The effective address is formed by
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adding the contents of X or Y to the address contained in the
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second and third bytes of the instruction. */
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@ -357,25 +357,25 @@
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#define GetAbs_X \
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GetFromPC_W \
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AddIndexRegAndTestPageBoundary(X_Reg) \
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PageBoundaryCrossed \
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IncOpCycles \
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9: mov EffectiveAddr, r0;
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#define GetAbs_X_STx \
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GetFromPC_W \
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AddIndexRegAndTestPageBoundary(X_Reg) \
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/* PageBoundaryCrossed */ \
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/* IncOpCycles */ \
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9: mov EffectiveAddr, r0;
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#define GetAbs_Y \
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GetFromPC_W \
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AddIndexRegAndTestPageBoundary(Y_Reg) \
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PageBoundaryCrossed \
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IncOpCycles \
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9: mov EffectiveAddr, r0;
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#define GetAbs_Y_STA \
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GetFromPC_W \
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AddIndexRegAndTestPageBoundary(Y_Reg) \
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/* PageBoundaryCrossed */ \
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/* IncOpCycles */ \
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9: mov EffectiveAddr, r0;
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/* Zero Page Indirect Addressing (65c02) - The second byte of the
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@ -438,12 +438,12 @@
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#define GetIndZPage_Y \
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_GetIndZPage_Y \
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PageBoundaryCrossed \
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IncOpCycles \
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9: mov EffectiveAddr, r0;
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#define GetIndZPage_Y_STA \
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_GetIndZPage_Y \
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PageBoundaryCrossed \
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IncOpCycles \
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9: mov EffectiveAddr, r0;
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#define bt \
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@ -452,6 +452,11 @@
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biceq r15, r15, #30; \
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orrne r15, r15, #30;
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#define btc \
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/* Virtual x86: Bit Test and Clear (carry flag only) */ \
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tst F_Reg, #C_Flag; \
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biceq r15, r15, #30;
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// ----------------------------------------------------------------------------
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// 65c02 instruction macros
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@ -685,15 +690,23 @@
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ADd memory to accumulator with Carry
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---------------------------------- */
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#define _AF r10
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#define hi_nib r0
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#define lo_nib r9
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// Decimal mode
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ENTRY(op_ADC_dec)
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#warning FIXME TODO op_ADC_dec
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#if 0
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incb SYM(cpu65_opcycles) // +1 cycle
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IncOpCycles
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GetFromEA_B
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DebugBCDCheck
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bt $C_Flag_Bit, AF_Reg_X
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adcb A_Reg, %al
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// initial addition with nybble carry check
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and _AF, A_Reg, #0x10
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bt
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adcs r0, A_Reg, r0
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and r1, A_Reg, #0x10
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eor _AF, _AF, r1
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// DAA algorithm : http://www.ray.masmcode.com/BCDdaa.html
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// CF_old = CF
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// IF (al AND 0Fh > 9) or (the Auxilliary Flag is set)
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@ -705,34 +718,32 @@ ENTRY(op_ADC_dec)
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// al = al + 60h
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// CF set
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// ENDIF
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pushq _XBX
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pushfq
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popq _XBX
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andb $~(N_Flag|V_Flag|Z_Flag|C_Flag), F_Reg
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movb %al, %ah
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andb $0x0f, %ah
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cmpb $9, %ah
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jg _daa_lo_nyb
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btq $X86_AF_Bit, _XBX
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jnc _daa_next0
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_daa_lo_nyb: addb $6, %al // adjust lo nybble
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jc _daa_hi_nyb
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_daa_next0: btq $X86_CF_Bit, _XBX
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jc _daa_hi_nyb
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xorb %ah, %ah
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cmpw $0x99, %ax
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jle _daa_next1
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_daa_hi_nyb: addb $0x60, %al // adjust hi nybble
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orb $C_Flag, F_Reg // FlagC
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_daa_next1: testq $0x80, %rax
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jz _daa_next2
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orb $N_Flag, F_Reg // FlagN
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_daa_next2: testq $0xFF, %rax
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jnz _daa_finish
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orb $Z_Flag, F_Reg // FlagZ
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_daa_finish: popq _XBX
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movb %al, A_Reg
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#endif
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lahf
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bic F_Reg, #NVZC_Flags
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mov r1, r0
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and r1, r1, #0x0f
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cmp r1, #0x09
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bhi _daa_lo_nyb
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teq _AF, #0
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beq _daa_next0
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_daa_lo_nyb: mov r0, r0, LSL #24
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adds r0, r0, #0x06000000 // adjust lo nybble
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mov r0, r0, LSR #24
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bcs _daa_hi_nyb
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_daa_next0: tst arm_flags, #C_Flag
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bne _daa_hi_nyb
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cmp r0, #0x9A
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bmi _daa_next1
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_daa_hi_nyb: add r0, r0, #0x60 // adjust hi nybble
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orr F_Reg, F_Reg, #C_Flag // FlagC
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_daa_next1: tst r0, #0x80
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beq _daa_next2
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orr F_Reg, F_Reg, #N_Flag // FlagN
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_daa_next2: tst r0, #0xFF
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bne _daa_finish
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orr F_Reg, F_Reg, #Z_Flag // FlagZ
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_daa_finish: mov A_Reg, r0
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Continue
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#define maybe_DoADC_d \
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@ -1094,7 +1105,7 @@ ENTRY(op_BRK)
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EncodeFlags
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Push(r0)
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orr F_Reg, F_Reg, #I_Flag
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ldr EffectiveAddr, SYM(interrupt_vector)
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ldr EffectiveAddr, SYM(interrupt_vector)
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ldrh EffectiveAddr, [EffectiveAddr]
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GetFromEA_W
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mov PC_Reg, r0
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@ -1856,15 +1867,18 @@ ENTRY(op_RTS) // 0x60
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SuBtract memory from accumulator with Borrow
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---------------------------------- */
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ENTRY(op_SBC_dec)
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#warning FIXME TODO op_ADC_dec
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#if 0
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incb SYM(cpu65_opcycles) // +1 cycle
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IncOpCycles
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GetFromEA_B
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DebugBCDCheck
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btc $C_Flag_Bit, AF_Reg_X
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xchgb A_Reg, %al
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cmc
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sbbb A_Reg, %al
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// initial subtraction with nybble borrow check
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and _AF, A_Reg, #0x10
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btc
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/*cmc*/
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sbcs r0, A_Reg, r0
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and r1, A_Reg, #0x10
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eor _AF, _AF, r1
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// DAS algorithm : http://www.ray.masmcode.com/BCDdas.html
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// CF_old = CF
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// IF (al AND 0Fh > 9) or (the Auxilliary Flag is set)
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@ -1876,35 +1890,31 @@ ENTRY(op_SBC_dec)
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// al = al - 60h
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// ^CF set
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// ENDIF
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pushq _XBX
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pushfq
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popq _XBX
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andb $~(N_Flag|V_Flag|Z_Flag), F_Reg
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orb $C_Flag, F_Reg
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movb %al, %ah
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andb $0x0f, %ah
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cmpb $9, %ah
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jg _das_lo_nyb
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btq $X86_AF_Bit, _XBX
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jnc _das_next0
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_das_lo_nyb: subb $6, %al // adjust lo nybble
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jc _das_hi_nyb
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_das_next0: btq $X86_CF_Bit, _XBX
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jc _das_hi_nyb
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xorb %ah, %ah
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cmpw $0x99, %ax
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jle _das_next1
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_das_hi_nyb: subb $0x60, %al // adjust hi nybble
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andb $~C_Flag, F_Reg // !FlagC
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_das_next1: testq $0x80, %rax
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jz _das_next2
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orb $N_Flag, F_Reg // FlagN
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_das_next2: testq $0xFF, %rax
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jnz _das_finish
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orb $Z_Flag, F_Reg // FlagZ
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_das_finish: popq _XBX
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movb %al, A_Reg
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#endif
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lahf
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bic F_Reg, F_Reg, #NVZ_Flags
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orr F_Reg, #C_Flag
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mov r1, r0
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and r1, r1, #0x0f
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cmp r1, #0x09
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bhi _das_lo_nyb
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teq _AF, #0
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beq _das_next0
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_das_lo_nyb: sbcs r0, r0, #0x06000000 // adjust lo nybble
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bcs _das_hi_nyb
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_das_next0: tst arm_flags, #C_Flag
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bne _das_hi_nyb
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cmp r0, #0x9A
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bmi _das_next1
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_das_hi_nyb: sub r0, r0, #0x60 // adjust hi nybble
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bic F_Reg, F_Reg, #C_Flag // !FlagC
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_das_next1: tst r0, #0x80
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beq _das_next2
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orr F_Reg, F_Reg, #N_Flag // FlagN
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_das_next2: tst r0, #0xFF
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bne _das_finish
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orr F_Reg, F_Reg, #Z_Flag // FlagZ
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_das_finish: mov A_Reg, r0
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Continue
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#define maybe_DoSBC_d \
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